diff options
author | Peter Chen <peter.chen@freescale.com> | 2015-03-17 05:32:45 -0400 |
---|---|---|
committer | Peter Chen <peter.chen@freescale.com> | 2015-08-13 22:03:58 -0400 |
commit | 96625eadca1bb8832fb502f0899a543695f1ba35 (patch) | |
tree | f9f14300d30bcf9bf0b3b830838bb66e26566741 /drivers/usb/chipidea/core.c | |
parent | bd6e9d115df7fc6f11f3021c6fc05e3eaeb04a32 (diff) |
usb: chipidea: add tx/rx burst size configuration interface
The user can adjust it through dts or platform data
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'drivers/usb/chipidea/core.c')
-rw-r--r-- | drivers/usb/chipidea/core.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index ce0489754fde..50cd23b3b7f1 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c | |||
@@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = { | |||
86 | [OP_DEVICEADDR] = 0x14U, | 86 | [OP_DEVICEADDR] = 0x14U, |
87 | [OP_ENDPTLISTADDR] = 0x18U, | 87 | [OP_ENDPTLISTADDR] = 0x18U, |
88 | [OP_TTCTRL] = 0x1CU, | 88 | [OP_TTCTRL] = 0x1CU, |
89 | [OP_BURSTSIZE] = 0x20U, | ||
89 | [OP_PORTSC] = 0x44U, | 90 | [OP_PORTSC] = 0x44U, |
90 | [OP_DEVLC] = 0x84U, | 91 | [OP_DEVLC] = 0x84U, |
91 | [OP_OTGSC] = 0x64U, | 92 | [OP_OTGSC] = 0x64U, |
@@ -109,6 +110,7 @@ static const u8 ci_regs_lpm[] = { | |||
109 | [OP_DEVICEADDR] = 0x14U, | 110 | [OP_DEVICEADDR] = 0x14U, |
110 | [OP_ENDPTLISTADDR] = 0x18U, | 111 | [OP_ENDPTLISTADDR] = 0x18U, |
111 | [OP_TTCTRL] = 0x1CU, | 112 | [OP_TTCTRL] = 0x1CU, |
113 | [OP_BURSTSIZE] = 0x20U, | ||
112 | [OP_PORTSC] = 0x44U, | 114 | [OP_PORTSC] = 0x44U, |
113 | [OP_DEVLC] = 0x84U, | 115 | [OP_DEVLC] = 0x84U, |
114 | [OP_OTGSC] = 0xC4U, | 116 | [OP_OTGSC] = 0xC4U, |
@@ -441,6 +443,17 @@ void ci_platform_configure(struct ci_hdrc *ci) | |||
441 | if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST) | 443 | if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST) |
442 | hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK, | 444 | hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK, |
443 | ci->platdata->ahb_burst_config); | 445 | ci->platdata->ahb_burst_config); |
446 | |||
447 | /* override burst size, take effect only when ahb_burst_config is 0 */ | ||
448 | if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) { | ||
449 | if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST) | ||
450 | hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK, | ||
451 | ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK)); | ||
452 | |||
453 | if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST) | ||
454 | hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK, | ||
455 | ci->platdata->rx_burst_size); | ||
456 | } | ||
444 | } | 457 | } |
445 | 458 | ||
446 | /** | 459 | /** |
@@ -647,6 +660,28 @@ static int ci_get_platdata(struct device *dev, | |||
647 | platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST; | 660 | platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST; |
648 | } | 661 | } |
649 | 662 | ||
663 | if (of_find_property(dev->of_node, "tx-burst-size-dword", NULL)) { | ||
664 | ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword", | ||
665 | &platdata->tx_burst_size); | ||
666 | if (ret) { | ||
667 | dev_err(dev, | ||
668 | "failed to get tx-burst-size-dword\n"); | ||
669 | return ret; | ||
670 | } | ||
671 | platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST; | ||
672 | } | ||
673 | |||
674 | if (of_find_property(dev->of_node, "rx-burst-size-dword", NULL)) { | ||
675 | ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword", | ||
676 | &platdata->rx_burst_size); | ||
677 | if (ret) { | ||
678 | dev_err(dev, | ||
679 | "failed to get rx-burst-size-dword\n"); | ||
680 | return ret; | ||
681 | } | ||
682 | platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST; | ||
683 | } | ||
684 | |||
650 | return 0; | 685 | return 0; |
651 | } | 686 | } |
652 | 687 | ||