aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/tty
diff options
context:
space:
mode:
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2015-12-13 05:30:03 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-12-13 23:01:47 -0500
commit58362d5be35216f196b4a4d16aa2c6ef938087f0 (patch)
treecabe4cb85993975c9e708c2ce7158519fe30ee8c /drivers/tty
parent4f71a2e0a282611e55bacb60b564eaef5d16c27b (diff)
serial: imx: implement handshaking using gpios with the mctrl_gpio helper
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/Kconfig1
-rw-r--r--drivers/tty/serial/imx.c89
2 files changed, 70 insertions, 20 deletions
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 0bdf4d5c7c65..d27a0c62a75f 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -576,6 +576,7 @@ config SERIAL_IMX
576 depends on ARCH_MXC || COMPILE_TEST 576 depends on ARCH_MXC || COMPILE_TEST
577 select SERIAL_CORE 577 select SERIAL_CORE
578 select RATIONAL 578 select RATIONAL
579 select SERIAL_MCTRL_GPIO if GPIOLIB
579 help 580 help
580 If you have a machine based on a Motorola IMX CPU you 581 If you have a machine based on a Motorola IMX CPU you
581 can enable its onboard serial port by enabling this option. 582 can enable its onboard serial port by enabling this option.
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 591f1c26e3e9..9362f54c816c 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -44,6 +44,8 @@
44#include <linux/platform_data/serial-imx.h> 44#include <linux/platform_data/serial-imx.h>
45#include <linux/platform_data/dma-imx.h> 45#include <linux/platform_data/dma-imx.h>
46 46
47#include "serial_mctrl_gpio.h"
48
47/* Register definitions */ 49/* Register definitions */
48#define URXD0 0x0 /* Receiver Register */ 50#define URXD0 0x0 /* Receiver Register */
49#define URTX0 0x40 /* Transmitter Register */ 51#define URTX0 0x40 /* Transmitter Register */
@@ -209,6 +211,8 @@ struct imx_port {
209 struct clk *clk_per; 211 struct clk *clk_per;
210 const struct imx_uart_data *devdata; 212 const struct imx_uart_data *devdata;
211 213
214 struct mctrl_gpios *gpios;
215
212 /* DMA fields */ 216 /* DMA fields */
213 unsigned int dma_is_inited:1; 217 unsigned int dma_is_inited:1;
214 unsigned int dma_is_enabled:1; 218 unsigned int dma_is_enabled:1;
@@ -311,6 +315,26 @@ static void imx_port_ucrs_restore(struct uart_port *port,
311} 315}
312#endif 316#endif
313 317
318static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2)
319{
320 *ucr2 &= ~UCR2_CTSC;
321 *ucr2 |= UCR2_CTS;
322
323 mctrl_gpio_set(sport->gpios, sport->port.mctrl | TIOCM_RTS);
324}
325
326static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2)
327{
328 *ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
329
330 mctrl_gpio_set(sport->gpios, sport->port.mctrl & ~TIOCM_RTS);
331}
332
333static void imx_port_rts_auto(struct imx_port *sport, unsigned long *ucr2)
334{
335 *ucr2 |= UCR2_CTSC;
336}
337
314/* 338/*
315 * interrupts disabled on entry 339 * interrupts disabled on entry
316 */ 340 */
@@ -334,9 +358,9 @@ static void imx_stop_tx(struct uart_port *port)
334 readl(port->membase + USR2) & USR2_TXDC) { 358 readl(port->membase + USR2) & USR2_TXDC) {
335 temp = readl(port->membase + UCR2); 359 temp = readl(port->membase + UCR2);
336 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) 360 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
337 temp &= ~UCR2_CTS; 361 imx_port_rts_inactive(sport, &temp);
338 else 362 else
339 temp |= UCR2_CTS; 363 imx_port_rts_active(sport, &temp);
340 writel(temp, port->membase + UCR2); 364 writel(temp, port->membase + UCR2);
341 365
342 temp = readl(port->membase + UCR4); 366 temp = readl(port->membase + UCR4);
@@ -378,6 +402,8 @@ static void imx_enable_ms(struct uart_port *port)
378 struct imx_port *sport = (struct imx_port *)port; 402 struct imx_port *sport = (struct imx_port *)port;
379 403
380 mod_timer(&sport->timer, jiffies); 404 mod_timer(&sport->timer, jiffies);
405
406 mctrl_gpio_enable_ms(sport->gpios);
381} 407}
382 408
383static void imx_dma_tx(struct imx_port *sport); 409static void imx_dma_tx(struct imx_port *sport);
@@ -537,14 +563,14 @@ static void imx_start_tx(struct uart_port *port)
537 unsigned long temp; 563 unsigned long temp;
538 564
539 if (port->rs485.flags & SER_RS485_ENABLED) { 565 if (port->rs485.flags & SER_RS485_ENABLED) {
540 /* enable transmitter and shifter empty irq */
541 temp = readl(port->membase + UCR2); 566 temp = readl(port->membase + UCR2);
542 if (port->rs485.flags & SER_RS485_RTS_ON_SEND) 567 if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
543 temp &= ~UCR2_CTS; 568 imx_port_rts_inactive(sport, &temp);
544 else 569 else
545 temp |= UCR2_CTS; 570 imx_port_rts_active(sport, &temp);
546 writel(temp, port->membase + UCR2); 571 writel(temp, port->membase + UCR2);
547 572
573 /* enable transmitter and shifter empty irq */
548 temp = readl(port->membase + UCR4); 574 temp = readl(port->membase + UCR4);
549 temp |= UCR4_TCEN; 575 temp |= UCR4_TCEN;
550 writel(temp, port->membase + UCR4); 576 writel(temp, port->membase + UCR4);
@@ -759,9 +785,8 @@ static unsigned int imx_tx_empty(struct uart_port *port)
759/* 785/*
760 * We have a modem side uart, so the meanings of RTS and CTS are inverted. 786 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
761 */ 787 */
762static unsigned int imx_get_mctrl(struct uart_port *port) 788static unsigned int imx_get_hwmctrl(struct imx_port *sport)
763{ 789{
764 struct imx_port *sport = (struct imx_port *)port;
765 unsigned int tmp = TIOCM_DSR; 790 unsigned int tmp = TIOCM_DSR;
766 unsigned usr1 = readl(sport->port.membase + USR1); 791 unsigned usr1 = readl(sport->port.membase + USR1);
767 792
@@ -779,6 +804,16 @@ static unsigned int imx_get_mctrl(struct uart_port *port)
779 return tmp; 804 return tmp;
780} 805}
781 806
807static unsigned int imx_get_mctrl(struct uart_port *port)
808{
809 struct imx_port *sport = (struct imx_port *)port;
810 unsigned int ret = imx_get_hwmctrl(sport);
811
812 mctrl_gpio_get(sport->gpios, &ret);
813
814 return ret;
815}
816
782static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 817static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
783{ 818{
784 struct imx_port *sport = (struct imx_port *)port; 819 struct imx_port *sport = (struct imx_port *)port;
@@ -801,6 +836,8 @@ static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
801 if (mctrl & TIOCM_LOOP) 836 if (mctrl & TIOCM_LOOP)
802 temp |= UTS_LOOP; 837 temp |= UTS_LOOP;
803 writel(temp, sport->port.membase + uts_reg(sport)); 838 writel(temp, sport->port.membase + uts_reg(sport));
839
840 mctrl_gpio_set(sport->gpios, mctrl);
804} 841}
805 842
806/* 843/*
@@ -830,7 +867,7 @@ static void imx_mctrl_check(struct imx_port *sport)
830{ 867{
831 unsigned int status, changed; 868 unsigned int status, changed;
832 869
833 status = imx_get_mctrl(&sport->port); 870 status = imx_get_hwmctrl(sport);
834 changed = status ^ sport->old_status; 871 changed = status ^ sport->old_status;
835 872
836 if (changed == 0) 873 if (changed == 0)
@@ -1218,6 +1255,8 @@ static void imx_shutdown(struct uart_port *port)
1218 imx_uart_dma_exit(sport); 1255 imx_uart_dma_exit(sport);
1219 } 1256 }
1220 1257
1258 mctrl_gpio_disable_ms(sport->gpios);
1259
1221 spin_lock_irqsave(&sport->port.lock, flags); 1260 spin_lock_irqsave(&sport->port.lock, flags);
1222 temp = readl(sport->port.membase + UCR2); 1261 temp = readl(sport->port.membase + UCR2);
1223 temp &= ~(UCR2_TXEN); 1262 temp &= ~(UCR2_TXEN);
@@ -1295,9 +1334,10 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
1295{ 1334{
1296 struct imx_port *sport = (struct imx_port *)port; 1335 struct imx_port *sport = (struct imx_port *)port;
1297 unsigned long flags; 1336 unsigned long flags;
1298 unsigned int ucr2, old_ucr1, old_ucr2, baud, quot; 1337 unsigned long ucr2, old_ucr1, old_ucr2;
1338 unsigned int baud, quot;
1299 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; 1339 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
1300 unsigned int div, ufcr; 1340 unsigned long div, ufcr;
1301 unsigned long num, denom; 1341 unsigned long num, denom;
1302 uint64_t tdiv64; 1342 uint64_t tdiv64;
1303 1343
@@ -1326,19 +1366,25 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
1326 * it under manual control and keep transmitter 1366 * it under manual control and keep transmitter
1327 * disabled. 1367 * disabled.
1328 */ 1368 */
1329 if (!(port->rs485.flags & 1369 if (port->rs485.flags &
1330 SER_RS485_RTS_AFTER_SEND)) 1370 SER_RS485_RTS_AFTER_SEND)
1331 ucr2 |= UCR2_CTS; 1371 imx_port_rts_inactive(sport, &ucr2);
1372 else
1373 imx_port_rts_active(sport, &ucr2);
1332 } else { 1374 } else {
1333 ucr2 |= UCR2_CTSC; 1375 imx_port_rts_auto(sport, &ucr2);
1334 } 1376 }
1335 } else { 1377 } else {
1336 termios->c_cflag &= ~CRTSCTS; 1378 termios->c_cflag &= ~CRTSCTS;
1337 } 1379 }
1338 } else if (port->rs485.flags & SER_RS485_ENABLED) 1380 } else if (port->rs485.flags & SER_RS485_ENABLED) {
1339 /* disable transmitter */ 1381 /* disable transmitter */
1340 if (!(port->rs485.flags & SER_RS485_RTS_AFTER_SEND)) 1382 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
1341 ucr2 |= UCR2_CTS; 1383 imx_port_rts_inactive(sport, &ucr2);
1384 else
1385 imx_port_rts_active(sport, &ucr2);
1386 }
1387
1342 1388
1343 if (termios->c_cflag & CSTOPB) 1389 if (termios->c_cflag & CSTOPB)
1344 ucr2 |= UCR2_STPB; 1390 ucr2 |= UCR2_STPB;
@@ -1579,11 +1625,10 @@ static int imx_rs485_config(struct uart_port *port,
1579 1625
1580 /* disable transmitter */ 1626 /* disable transmitter */
1581 temp = readl(sport->port.membase + UCR2); 1627 temp = readl(sport->port.membase + UCR2);
1582 temp &= ~UCR2_CTSC;
1583 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND) 1628 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
1584 temp &= ~UCR2_CTS; 1629 imx_port_rts_inactive(sport, &temp);
1585 else 1630 else
1586 temp |= UCR2_CTS; 1631 imx_port_rts_active(sport, &temp);
1587 writel(temp, sport->port.membase + UCR2); 1632 writel(temp, sport->port.membase + UCR2);
1588 } 1633 }
1589 1634
@@ -1956,6 +2001,10 @@ static int serial_imx_probe(struct platform_device *pdev)
1956 sport->timer.function = imx_timeout; 2001 sport->timer.function = imx_timeout;
1957 sport->timer.data = (unsigned long)sport; 2002 sport->timer.data = (unsigned long)sport;
1958 2003
2004 sport->gpios = mctrl_gpio_init(&sport->port, 0);
2005 if (IS_ERR(sport->gpios))
2006 return PTR_ERR(sport->gpios);
2007
1959 sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 2008 sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1960 if (IS_ERR(sport->clk_ipg)) { 2009 if (IS_ERR(sport->clk_ipg)) {
1961 ret = PTR_ERR(sport->clk_ipg); 2010 ret = PTR_ERR(sport->clk_ipg);