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authorThomas Abraham <thomas.abraham@linaro.org>2011-10-24 05:48:21 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-12-22 20:06:59 -0500
commit0dfb3b41be4ca3c9d1688f6c2d00bfa178356494 (patch)
treec0ea3c6ef69c90156016d8e9ec51cfa3c46226f9 /drivers/tty
parent0cfb26e1fb9d7afe9c79a40a257808eafb2aff34 (diff)
serial: samsung: merge all SoC specific port reset functions
The port reset function in each of the platform specific extension performs the same operations and hence all the reset port functions can be merged into one and moved into the common samsung uart driver. The SoC specific port reset functions are removed from SoC extensions. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/s3c2410.c18
-rw-r--r--drivers/tty/serial/s3c2412.c24
-rw-r--r--drivers/tty/serial/s3c2440.c24
-rw-r--r--drivers/tty/serial/s3c6400.c24
-rw-r--r--drivers/tty/serial/s5pv210.c22
-rw-r--r--drivers/tty/serial/samsung.c23
6 files changed, 19 insertions, 116 deletions
diff --git a/drivers/tty/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c
index e668a9d2bbc9..1491c32d1436 100644
--- a/drivers/tty/serial/s3c2410.c
+++ b/drivers/tty/serial/s3c2410.c
@@ -25,23 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s3c2410_serial_resetport(struct uart_port *port,
29 struct s3c2410_uartcfg *cfg)
30{
31 dbg("s3c2410_serial_resetport: port=%p (%08lx), cfg=%p\n",
32 port, port->mapbase, cfg);
33
34 wr_regl(port, S3C2410_UCON, cfg->ucon);
35 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
36
37 /* reset both fifos */
38
39 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
40 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
41
42 return 0;
43}
44
45static struct s3c24xx_uart_info s3c2410_uart_inf = { 28static struct s3c24xx_uart_info s3c2410_uart_inf = {
46 .name = "Samsung S3C2410 UART", 29 .name = "Samsung S3C2410 UART",
47 .type = PORT_S3C2410, 30 .type = PORT_S3C2410,
@@ -56,7 +39,6 @@ static struct s3c24xx_uart_info s3c2410_uart_inf = {
56 .num_clks = 2, 39 .num_clks = 2,
57 .clksel_mask = S3C2410_UCON_CLKMASK, 40 .clksel_mask = S3C2410_UCON_CLKMASK,
58 .clksel_shift = S3C2410_UCON_CLKSHIFT, 41 .clksel_shift = S3C2410_UCON_CLKSHIFT,
59 .reset_port = s3c2410_serial_resetport,
60}; 42};
61 43
62static int s3c2410_serial_probe(struct platform_device *dev) 44static int s3c2410_serial_probe(struct platform_device *dev)
diff --git a/drivers/tty/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c
index 5b85c1953c51..38ae730307df 100644
--- a/drivers/tty/serial/s3c2412.c
+++ b/drivers/tty/serial/s3c2412.c
@@ -25,29 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s3c2412_serial_resetport(struct uart_port *port,
29 struct s3c2410_uartcfg *cfg)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 dbg("%s: port=%p (%08lx), cfg=%p\n",
34 __func__, port, port->mapbase, cfg);
35
36 /* ensure we don't change the clock settings... */
37
38 ucon &= S3C2412_UCON_CLKMASK;
39
40 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
41 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
42
43 /* reset both fifos */
44
45 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
46 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
47
48 return 0;
49}
50
51static struct s3c24xx_uart_info s3c2412_uart_inf = { 28static struct s3c24xx_uart_info s3c2412_uart_inf = {
52 .name = "Samsung S3C2412 UART", 29 .name = "Samsung S3C2412 UART",
53 .type = PORT_S3C2412, 30 .type = PORT_S3C2412,
@@ -63,7 +40,6 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
63 .num_clks = 4, 40 .num_clks = 4,
64 .clksel_mask = S3C2412_UCON_CLKMASK, 41 .clksel_mask = S3C2412_UCON_CLKMASK,
65 .clksel_shift = S3C2412_UCON_CLKSHIFT, 42 .clksel_shift = S3C2412_UCON_CLKSHIFT,
66 .reset_port = s3c2412_serial_resetport,
67}; 43};
68 44
69/* device management */ 45/* device management */
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
index 39930f819fa2..70652f56ab60 100644
--- a/drivers/tty/serial/s3c2440.c
+++ b/drivers/tty/serial/s3c2440.c
@@ -25,29 +25,6 @@
25 25
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s3c2440_serial_resetport(struct uart_port *port,
29 struct s3c2410_uartcfg *cfg)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n",
34 port, port->mapbase, cfg);
35
36 /* ensure we don't change the clock settings... */
37
38 ucon &= (S3C2440_UCON0_DIVMASK | (3<<10));
39
40 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
41 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
42
43 /* reset both fifos */
44
45 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
46 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
47
48 return 0;
49}
50
51static struct s3c24xx_uart_info s3c2440_uart_inf = { 28static struct s3c24xx_uart_info s3c2440_uart_inf = {
52 .name = "Samsung S3C2440 UART", 29 .name = "Samsung S3C2440 UART",
53 .type = PORT_S3C2440, 30 .type = PORT_S3C2440,
@@ -62,7 +39,6 @@ static struct s3c24xx_uart_info s3c2440_uart_inf = {
62 .num_clks = 4, 39 .num_clks = 4,
63 .clksel_mask = S3C2440_UCON_CLKMASK, 40 .clksel_mask = S3C2440_UCON_CLKMASK,
64 .clksel_shift = S3C2440_UCON_CLKSHIFT, 41 .clksel_shift = S3C2440_UCON_CLKSHIFT,
65 .reset_port = s3c2440_serial_resetport,
66}; 42};
67 43
68/* device management */ 44/* device management */
diff --git a/drivers/tty/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c
index c5a6d4645089..30a69f1cd3e6 100644
--- a/drivers/tty/serial/s3c6400.c
+++ b/drivers/tty/serial/s3c6400.c
@@ -26,29 +26,6 @@
26 26
27#include "samsung.h" 27#include "samsung.h"
28 28
29static int s3c6400_serial_resetport(struct uart_port *port,
30 struct s3c2410_uartcfg *cfg)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 dbg("s3c6400_serial_resetport: port=%p (%08lx), cfg=%p\n",
35 port, port->mapbase, cfg);
36
37 /* ensure we don't change the clock settings... */
38
39 ucon &= S3C6400_UCON_CLKMASK;
40
41 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
42 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
43
44 /* reset both fifos */
45
46 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
47 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
48
49 return 0;
50}
51
52static struct s3c24xx_uart_info s3c6400_uart_inf = { 29static struct s3c24xx_uart_info s3c6400_uart_inf = {
53 .name = "Samsung S3C6400 UART", 30 .name = "Samsung S3C6400 UART",
54 .type = PORT_S3C6400, 31 .type = PORT_S3C6400,
@@ -64,7 +41,6 @@ static struct s3c24xx_uart_info s3c6400_uart_inf = {
64 .num_clks = 4, 41 .num_clks = 4,
65 .clksel_mask = S3C6400_UCON_CLKMASK, 42 .clksel_mask = S3C6400_UCON_CLKMASK,
66 .clksel_shift = S3C6400_UCON_CLKSHIFT, 43 .clksel_shift = S3C6400_UCON_CLKSHIFT,
67 .reset_port = s3c6400_serial_resetport,
68}; 44};
69 45
70/* device management */ 46/* device management */
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index 173df5afb0fa..d23209460dd3 100644
--- a/drivers/tty/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
@@ -25,25 +25,6 @@
25#include <plat/regs-serial.h> 25#include <plat/regs-serial.h>
26#include "samsung.h" 26#include "samsung.h"
27 27
28static int s5pv210_serial_resetport(struct uart_port *port,
29 struct s3c2410_uartcfg *cfg)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 ucon &= S5PV210_UCON_CLKMASK;
34 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
35 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
36
37 /* reset both fifos */
38 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
39 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
40
41 /* It is need to delay When reset FIFO register */
42 udelay(1);
43
44 return 0;
45}
46
47#define S5PV210_UART_DEFAULT_INFO(fifo_size) \ 28#define S5PV210_UART_DEFAULT_INFO(fifo_size) \
48 .name = "Samsung S5PV210 UART0", \ 29 .name = "Samsung S5PV210 UART0", \
49 .type = PORT_S3C6400, \ 30 .type = PORT_S3C6400, \
@@ -58,8 +39,7 @@ static int s5pv210_serial_resetport(struct uart_port *port,
58 .def_clk_sel = S3C2410_UCON_CLKSEL0, \ 39 .def_clk_sel = S3C2410_UCON_CLKSEL0, \
59 .num_clks = 2, \ 40 .num_clks = 2, \
60 .clksel_mask = S5PV210_UCON_CLKMASK, \ 41 .clksel_mask = S5PV210_UCON_CLKMASK, \
61 .clksel_shift = S5PV210_UCON_CLKSHIFT, \ 42 .clksel_shift = S5PV210_UCON_CLKSHIFT
62 .reset_port = s5pv210_serial_resetport
63 43
64static struct s3c24xx_uart_info s5p_port_fifo256 = { 44static struct s3c24xx_uart_info s5p_port_fifo256 = {
65 S5PV210_UART_DEFAULT_INFO(256), 45 S5PV210_UART_DEFAULT_INFO(256),
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index dc5a4edbc450..78aea1a49ad8 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -965,16 +965,29 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
965 965
966/* s3c24xx_serial_resetport 966/* s3c24xx_serial_resetport
967 * 967 *
968 * wrapper to call the specific reset for this port (reset the fifos 968 * reset the fifos and other the settings.
969 * and the settings)
970*/ 969*/
971 970
972static inline int s3c24xx_serial_resetport(struct uart_port *port, 971static void s3c24xx_serial_resetport(struct uart_port *port,
973 struct s3c2410_uartcfg *cfg) 972 struct s3c2410_uartcfg *cfg)
974{ 973{
975 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); 974 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
975 unsigned long ucon = rd_regl(port, S3C2410_UCON);
976 unsigned int ucon_mask;
976 977
977 return (info->reset_port)(port, cfg); 978 ucon_mask = info->clksel_mask;
979 if (info->type == PORT_S3C2440)
980 ucon_mask |= S3C2440_UCON0_DIVMASK;
981
982 ucon &= ucon_mask;
983 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
984
985 /* reset both fifos */
986 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
987 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
988
989 /* some delay is required after fifo reset */
990 udelay(1);
978} 991}
979 992
980 993