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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2016-03-24 09:24:22 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-04-30 12:26:55 -0400
commit16804d68bfaa7f5f5a73ab4a016ffeba33e87770 (patch)
tree55a9590a27ce8a78991b18592784fd4259c13806 /drivers/tty/serial
parent4d845a62b3f5672a813777b8dbebca0bad456bac (diff)
serial: imx: make sure unhandled irqs are disabled
Make sure that events that are not handled in the irq function don't trigger an interrupt. When the serial port is operated in DTE mode, the events for DCD and RI events are enabled after a system reset by default. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial')
-rw-r--r--drivers/tty/serial/imx.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 46769168fab7..aa07301df262 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1224,11 +1224,32 @@ static int imx_startup(struct uart_port *port)
1224 temp |= (UCR2_RXEN | UCR2_TXEN); 1224 temp |= (UCR2_RXEN | UCR2_TXEN);
1225 if (!sport->have_rtscts) 1225 if (!sport->have_rtscts)
1226 temp |= UCR2_IRTS; 1226 temp |= UCR2_IRTS;
1227 /*
1228 * make sure the edge sensitive RTS-irq is disabled,
1229 * we're using RTSD instead.
1230 */
1231 if (!is_imx1_uart(sport))
1232 temp &= ~UCR2_RTSEN;
1227 writel(temp, sport->port.membase + UCR2); 1233 writel(temp, sport->port.membase + UCR2);
1228 1234
1229 if (!is_imx1_uart(sport)) { 1235 if (!is_imx1_uart(sport)) {
1230 temp = readl(sport->port.membase + UCR3); 1236 temp = readl(sport->port.membase + UCR3);
1231 temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP; 1237
1238 /*
1239 * The effect of RI and DCD differs depending on the UFCR_DCEDTE
1240 * bit. In DCE mode they control the outputs, in DTE mode they
1241 * enable the respective irqs. At least the DCD irq cannot be
1242 * cleared on i.MX25 at least, so it's not usable and must be
1243 * disabled. I don't have test hardware to check if RI has the
1244 * same problem but I consider this likely so it's disabled for
1245 * now, too.
1246 */
1247 temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP |
1248 UCR3_RI | UCR3_DCD;
1249
1250 if (sport->dte_mode)
1251 temp &= ~(UCR3_RI | UCR3_DCD);
1252
1232 writel(temp, sport->port.membase + UCR3); 1253 writel(temp, sport->port.membase + UCR3);
1233 } 1254 }
1234 1255