diff options
author | Naveen Krishna Chatradhi <ch.naveen@samsung.com> | 2013-12-20 07:19:10 -0500 |
---|---|---|
committer | Eduardo Valentin <edubezval@gmail.com> | 2014-05-06 14:55:42 -0400 |
commit | 923488a53e7890566f298c2f67416af84ba2a21c (patch) | |
tree | 7bb07074128c4f541a9642f96bec1f95e01fe557 /drivers/thermal/samsung/exynos_tmu_data.h | |
parent | 14a11dc7e0dbf4acdd9c7b703ebd088f14def739 (diff) |
thermal: samsung: Add TMU support for Exynos5260 SoCs
This patch adds the registers, bit fields and compatible strings
required to support for the 5 TMU channels on Exynos5260.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu_data.h')
-rw-r--r-- | drivers/thermal/samsung/exynos_tmu_data.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h index 41f06dc70849..d268981b65e5 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.h +++ b/drivers/thermal/samsung/exynos_tmu_data.h | |||
@@ -87,6 +87,7 @@ | |||
87 | #define EXYNOS_TMU_INTEN_FALL0_SHIFT 16 | 87 | #define EXYNOS_TMU_INTEN_FALL0_SHIFT 16 |
88 | #define EXYNOS_TMU_INTEN_FALL1_SHIFT 20 | 88 | #define EXYNOS_TMU_INTEN_FALL1_SHIFT 20 |
89 | #define EXYNOS_TMU_INTEN_FALL2_SHIFT 24 | 89 | #define EXYNOS_TMU_INTEN_FALL2_SHIFT 24 |
90 | #define EXYNOS_TMU_INTEN_FALL3_SHIFT 28 | ||
90 | 91 | ||
91 | #define EXYNOS_EMUL_TIME 0x57F0 | 92 | #define EXYNOS_EMUL_TIME 0x57F0 |
92 | #define EXYNOS_EMUL_TIME_MASK 0xffff | 93 | #define EXYNOS_EMUL_TIME_MASK 0xffff |
@@ -97,6 +98,17 @@ | |||
97 | 98 | ||
98 | #define EXYNOS_MAX_TRIGGER_PER_REG 4 | 99 | #define EXYNOS_MAX_TRIGGER_PER_REG 4 |
99 | 100 | ||
101 | /* Exynos5260 specific */ | ||
102 | #define EXYNOS_TMU_REG_CONTROL1 0x24 | ||
103 | #define EXYNOS5260_TMU_REG_INTEN 0xC0 | ||
104 | #define EXYNOS5260_TMU_REG_INTSTAT 0xC4 | ||
105 | #define EXYNOS5260_TMU_REG_INTCLEAR 0xC8 | ||
106 | #define EXYNOS5260_TMU_CLEAR_RISE_INT 0x1111 | ||
107 | #define EXYNOS5260_TMU_CLEAR_FALL_INT (0x1111 << 16) | ||
108 | #define EXYNOS5260_TMU_RISE_INT_MASK 0x1111 | ||
109 | #define EXYNOS5260_TMU_FALL_INT_MASK 0x1111 | ||
110 | #define EXYNOS5260_EMUL_CON 0x100 | ||
111 | |||
100 | /* Exynos4412 specific */ | 112 | /* Exynos4412 specific */ |
101 | #define EXYNOS4412_MUX_ADDR_VALUE 6 | 113 | #define EXYNOS4412_MUX_ADDR_VALUE 6 |
102 | #define EXYNOS4412_MUX_ADDR_SHIFT 20 | 114 | #define EXYNOS4412_MUX_ADDR_SHIFT 20 |
@@ -157,6 +169,13 @@ extern struct exynos_tmu_init_data const exynos5250_default_tmu_data; | |||
157 | #define EXYNOS5250_TMU_DRV_DATA (NULL) | 169 | #define EXYNOS5250_TMU_DRV_DATA (NULL) |
158 | #endif | 170 | #endif |
159 | 171 | ||
172 | #if defined(CONFIG_SOC_EXYNOS5260) | ||
173 | extern struct exynos_tmu_init_data const exynos5260_default_tmu_data; | ||
174 | #define EXYNOS5260_TMU_DRV_DATA (&exynos5260_default_tmu_data) | ||
175 | #else | ||
176 | #define EXYNOS5260_TMU_DRV_DATA (NULL) | ||
177 | #endif | ||
178 | |||
160 | #if defined(CONFIG_SOC_EXYNOS5420) | 179 | #if defined(CONFIG_SOC_EXYNOS5420) |
161 | extern struct exynos_tmu_init_data const exynos5420_default_tmu_data; | 180 | extern struct exynos_tmu_init_data const exynos5420_default_tmu_data; |
162 | #define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data) | 181 | #define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data) |