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authorBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>2014-11-13 10:01:01 -0500
committerEduardo Valentin <edubezval@gmail.com>2014-11-20 09:52:43 -0500
commitb9504a6a3d668e4995420e311869291b21b81b37 (patch)
tree25eefa140a7b3337553cbfb6474548587185e9b5 /drivers/thermal/samsung/exynos_tmu.h
parentbfb2b88c79df839779586e0247456bd79882b145 (diff)
thermal: exynos: remove needless therm_trip_[mode,mask]_shift abstractions
reg->therm_trip_mode_shift and reg->therm_trip_mode_mask are used only in exynos_tmu_control() and accessed only if pdata->noise_cancel_mode is non-zero. pdata->noise_cancel field is not defined on Exynos4210 (also therm_trip_mode_shift and therm_trip_mode_mask entries are not even assigned in exynos4210_tmu_registers but they are assigned to identical values for all other SoC types) so the abstractions are not needed and can be removed. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/samsung/exynos_tmu.h')
-rw-r--r--drivers/thermal/samsung/exynos_tmu.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 0fb10d158471..88c16d7302cb 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -77,8 +77,6 @@ enum soc_type {
77 * bitfields. The register validity, offsets and bitfield values may vary 77 * bitfields. The register validity, offsets and bitfield values may vary
78 * slightly across different exynos SOC's. 78 * slightly across different exynos SOC's.
79 * @tmu_ctrl: TMU main controller register. 79 * @tmu_ctrl: TMU main controller register.
80 * @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register.
81 * @therm_trip_mode_mask: mask bits of tripping mode in tmu_ctrl register.
82 * @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register. 80 * @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register.
83 * @tmu_cur_temp: register containing the current temperature of the TMU. 81 * @tmu_cur_temp: register containing the current temperature of the TMU.
84 * @threshold_th0: Register containing first set of rising levels. 82 * @threshold_th0: Register containing first set of rising levels.
@@ -102,8 +100,6 @@ enum soc_type {
102 */ 100 */
103struct exynos_tmu_registers { 101struct exynos_tmu_registers {
104 u32 tmu_ctrl; 102 u32 tmu_ctrl;
105 u32 therm_trip_mode_shift;
106 u32 therm_trip_mode_mask;
107 u32 therm_trip_en_shift; 103 u32 therm_trip_en_shift;
108 104
109 u32 tmu_cur_temp; 105 u32 tmu_cur_temp;