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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-17 13:16:27 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-17 13:16:27 -0500
commit2efda9042d76fcab0fb87b7ee8d84da52bf122b0 (patch)
treef390199ae330fbe20b3c9d8fe1021d909f752421 /drivers/thermal/armada_thermal.c
parent0b4954c46943e8f15b9379eed4f133c874a0bc66 (diff)
parent2707dbd09a859b7205917f9baf9d0192944ac46c (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal management update from Zhang Rui: "Summary: - of-thermal extension to allow drivers to register and use its functionality in a better way, without exploiting thermal core. From Lukasz Majewski. - Fix a bug in intel_soc_dts_thermal driver which calls a sleep function in interrupt handler. From Maurice Petallo. - add a thermal UAPI header file for exporting the thermal generic netlink information to user-space. From Florian Fainelli. - First round of refactoring in Exynos driver. Bartlomiej and Lukasz are attempting to make it lean and easier to understand. - New thermal driver for Rockchip (rk3288), with support for DT thermal. From Caesar Wang. - New thermal driver for Nvidia, Tegra124 SOCTHERM driver, with support for DT thermal. From Mikko Perttunen. - New cooling device, based on common clock framework. From Eduardo Valentin. - a couple of small fixes in thermal core framework. From Srinivas Pandruvada, Javi Merino, Luis Henriques. - Dropping Armada A375-Z1 SoC thermal support as the chip is not in the market, armada folks decided to drop its support. - a couple of small fixes and cleanups in int340x thermal driver" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (58 commits) thermal: provide an UAPI header file Thermal/int340x: Clear the error value of the last acpi_bus_get_device() call thermal/powerclamp: add id for braswell cpu thermal: Intel SoC DTS: Don't do thermal zone update inside spin_lock Thermal: fix platform_no_drv_owner.cocci warnings Thermal/int340x: avoid unnecessary pointer casting thermal: int3403: Delete a check before thermal_zone_device_unregister() thermal/int3400: export uuids thermal: of: Extend current of-thermal.c code to allow setting emulated temp thermal: of: Extend of-thermal to export table of trip points thermal: of: Rename struct __thermal_trip to struct thermal_trip thermal: of: Extend of-thermal.c to provide check if trip point is valid thermal: of: Extend of-thermal.c to provide number of trip points thermal: Fix error path in thermal_init() thermal: lock the thermal zone when switching governors thermal: core: ignore invalid trip temperature thermal: armada: Remove support for A375-Z1 SoC thermal: rockchip: add driver for thermal dt-bindings: document Rockchip thermal thermal: exynos: remove exynos_tmu_data.h include ...
Diffstat (limited to 'drivers/thermal/armada_thermal.c')
-rw-r--r--drivers/thermal/armada_thermal.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c
index eaaf59c98ba2..c2556cf5186b 100644
--- a/drivers/thermal/armada_thermal.c
+++ b/drivers/thermal/armada_thermal.c
@@ -35,10 +35,6 @@
35#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30) 35#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
36#define PMU_TDC0_START_CAL_MASK (0x1 << 25) 36#define PMU_TDC0_START_CAL_MASK (0x1 << 25)
37 37
38#define A375_Z1_CAL_RESET_LSB 0x8011e214
39#define A375_Z1_CAL_RESET_MSB 0x30a88019
40#define A375_Z1_WORKAROUND_BIT BIT(9)
41
42#define A375_UNIT_CONTROL_SHIFT 27 38#define A375_UNIT_CONTROL_SHIFT 27
43#define A375_UNIT_CONTROL_MASK 0x7 39#define A375_UNIT_CONTROL_MASK 0x7
44#define A375_READOUT_INVERT BIT(15) 40#define A375_READOUT_INVERT BIT(15)
@@ -124,24 +120,12 @@ static void armada375_init_sensor(struct platform_device *pdev,
124 struct armada_thermal_priv *priv) 120 struct armada_thermal_priv *priv)
125{ 121{
126 unsigned long reg; 122 unsigned long reg;
127 bool quirk_needed =
128 !!of_device_is_compatible(pdev->dev.of_node,
129 "marvell,armada375-z1-thermal");
130
131 if (quirk_needed) {
132 /* Ensure these registers have the default (reset) values */
133 writel(A375_Z1_CAL_RESET_LSB, priv->control);
134 writel(A375_Z1_CAL_RESET_MSB, priv->control + 0x4);
135 }
136 123
137 reg = readl(priv->control + 4); 124 reg = readl(priv->control + 4);
138 reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT); 125 reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
139 reg &= ~A375_READOUT_INVERT; 126 reg &= ~A375_READOUT_INVERT;
140 reg &= ~A375_HW_RESETn; 127 reg &= ~A375_HW_RESETn;
141 128
142 if (quirk_needed)
143 reg |= A375_Z1_WORKAROUND_BIT;
144
145 writel(reg, priv->control + 4); 129 writel(reg, priv->control + 4);
146 mdelay(20); 130 mdelay(20);
147 131
@@ -260,10 +244,6 @@ static const struct of_device_id armada_thermal_id_table[] = {
260 .data = &armada375_data, 244 .data = &armada375_data,
261 }, 245 },
262 { 246 {
263 .compatible = "marvell,armada375-z1-thermal",
264 .data = &armada375_data,
265 },
266 {
267 .compatible = "marvell,armada380-thermal", 247 .compatible = "marvell,armada380-thermal",
268 .data = &armada380_data, 248 .data = &armada380_data,
269 }, 249 },