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authorRafał Miłecki <zajec5@gmail.com>2015-05-13 01:36:38 -0400
committerKalle Valo <kvalo@codeaurora.org>2015-05-20 09:36:06 -0400
commitc411ead995b46f361b92116fd042ae83866044a1 (patch)
tree3d108e1bdb8774034a9aa1674f7e136df94233a6 /drivers/ssb/driver_pcicore.c
parentf673821864899153142365aca888435815ac93f0 (diff)
ssb: extend fix for PCI related silent reboots to all chipsets
Recent fix for BCM4704 reboots has to be extended as the same problem affects Linksys WRT350N v1 (BCM4705). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Reported-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/ssb/driver_pcicore.c')
-rw-r--r--drivers/ssb/driver_pcicore.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 15a7ee3859dd..5fe1c22e289b 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -359,12 +359,13 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
359 359
360 /* 360 /*
361 * Accessing PCI config without a proper delay after devices reset (not 361 * Accessing PCI config without a proper delay after devices reset (not
362 * GPIO reset) was causing reboots on WRT300N v1.0. 362 * GPIO reset) was causing reboots on WRT300N v1.0 (BCM4704).
363 * Tested delay 850 us lowered reboot chance to 50-80%, 1000 us fixed it 363 * Tested delay 850 us lowered reboot chance to 50-80%, 1000 us fixed it
364 * completely. Flushing all writes was also tested but with no luck. 364 * completely. Flushing all writes was also tested but with no luck.
365 * The same problem was reported for WRT350N v1 (BCM4705), so we just
366 * sleep here unconditionally.
365 */ 367 */
366 if (pc->dev->bus->chip_id == 0x4704) 368 usleep_range(1000, 2000);
367 usleep_range(1000, 2000);
368 369
369 /* Enable PCI bridge BAR0 prefetch and burst */ 370 /* Enable PCI bridge BAR0 prefetch and burst */
370 val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; 371 val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;