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authorSeungwon Jeon <tgih.jun@samsung.com>2013-08-31 12:10:22 -0400
committerJames Bottomley <JBottomley@Parallels.com>2013-09-06 19:06:40 -0400
commit53b3d9c3fdda94d14392dd221c67e24700b1fed6 (patch)
treea5198f3de41a71b6f2461fbf9687289254e0eaae /drivers/scsi/ufs/ufshcd.h
parent12b4fdb4f6bccb5459a2f75fbe0eab253bfceab4 (diff)
[SCSI] ufs: add operation for the uic power mode change
Setting PA_PWRMode using DME_SET triggers the power mode change. And then the result will be given by the HCS.UPMCRS. This operation should be done atomically. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Tested-by: Yaniv Gardi <ygardi@codeaurora.org> Signed-off-by: Santosh Y <santoshsy@gmail.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/ufs/ufshcd.h')
-rw-r--r--drivers/scsi/ufs/ufshcd.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index 648ab16d379c..577679a2d189 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -175,6 +175,7 @@ struct ufs_dev_cmd {
175 * @active_uic_cmd: handle of active UIC command 175 * @active_uic_cmd: handle of active UIC command
176 * @uic_cmd_mutex: mutex for uic command 176 * @uic_cmd_mutex: mutex for uic command
177 * @ufshcd_tm_wait_queue: wait queue for task management 177 * @ufshcd_tm_wait_queue: wait queue for task management
178 * @pwr_done: completion for power mode change
178 * @tm_condition: condition variable for task management 179 * @tm_condition: condition variable for task management
179 * @ufshcd_state: UFSHCD states 180 * @ufshcd_state: UFSHCD states
180 * @intr_mask: Interrupt Mask Bits 181 * @intr_mask: Interrupt Mask Bits
@@ -219,6 +220,8 @@ struct ufs_hba {
219 wait_queue_head_t ufshcd_tm_wait_queue; 220 wait_queue_head_t ufshcd_tm_wait_queue;
220 unsigned long tm_condition; 221 unsigned long tm_condition;
221 222
223 struct completion *pwr_done;
224
222 u32 ufshcd_state; 225 u32 ufshcd_state;
223 u32 intr_mask; 226 u32 intr_mask;
224 u16 ee_ctrl_mask; 227 u16 ee_ctrl_mask;