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authorLinus Torvalds <torvalds@linux-foundation.org>2015-11-13 23:35:54 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2015-11-13 23:35:54 -0500
commitd83763f4a6adb2f417c3288ee903982985ae949c (patch)
tree610a7cfd32935ce4b555dc832c26ddeb13dcd003 /drivers/scsi/mpt2sas/mpt2sas_base.c
parent9aa3d651a9199103eb6451aeb0ac1b66a6d770a6 (diff)
parent0a5149ba02bdf75281b8bc94cf6dfa94c527fa6f (diff)
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull final round of SCSI updates from James Bottomley: "Sorry for the delay in this patch which was mostly caused by getting the merger of the mpt2/mpt3sas driver, which was seen as an essential item of maintenance work to do before the drivers diverge too much. Unfortunately, this caused a compile failure (detected by linux-next), which then had to be fixed up and incubated. In addition to the mpt2/3sas rework, there are updates from pm80xx, lpfc, bnx2fc, hpsa, ipr, aacraid, megaraid_sas, storvsc and ufs plus an assortment of changes including some year 2038 issues, a fix for a remove before detach issue in some drivers and a couple of other minor issues" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (141 commits) mpt3sas: fix inline markers on non inline function declarations sd: Clear PS bit before Mode Select. ibmvscsi: set max_lun to 32 ibmvscsi: display default value for max_id, max_lun and max_channel. mptfusion: don't allow negative bytes in kbuf_alloc_2_sgl() scsi: pmcraid: replace struct timeval with ktime_get_real_seconds() mvumi: 64bit value for seconds_since1970 be2iscsi: Fix bogus WARN_ON length check scsi_scan: don't dump trace when scsi_prep_async_scan() is called twice mpt3sas: Bump mpt3sas driver version to 09.102.00.00 mpt3sas: Single driver module which supports both SAS 2.0 & SAS 3.0 HBAs mpt2sas, mpt3sas: Update the driver versions mpt3sas: setpci reset kernel oops fix mpt3sas: Added OEM Gen2 PnP ID branding names mpt3sas: Refcount fw_events and fix unsafe list usage mpt3sas: Refcount sas_device objects and fix unsafe list usage mpt3sas: sysfs attribute to report Backup Rail Monitor Status mpt3sas: Ported WarpDrive product SSS6200 support mpt3sas: fix for driver fails EEH, recovery from injected pci bus error mpt3sas: Manage MSI-X vectors according to HBA device type ...
Diffstat (limited to 'drivers/scsi/mpt2sas/mpt2sas_base.c')
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_base.c4899
1 files changed, 0 insertions, 4899 deletions
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
deleted file mode 100644
index c167911221e9..000000000000
--- a/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ /dev/null
@@ -1,4899 +0,0 @@
1/*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2014 LSI Corporation
7 * Copyright (C) 20013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46#include <linux/kernel.h>
47#include <linux/module.h>
48#include <linux/errno.h>
49#include <linux/init.h>
50#include <linux/slab.h>
51#include <linux/types.h>
52#include <linux/pci.h>
53#include <linux/kdev_t.h>
54#include <linux/blkdev.h>
55#include <linux/delay.h>
56#include <linux/interrupt.h>
57#include <linux/dma-mapping.h>
58#include <linux/sort.h>
59#include <linux/io.h>
60#include <linux/time.h>
61#include <linux/kthread.h>
62#include <linux/aer.h>
63
64#include "mpt2sas_base.h"
65
66static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
67
68#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
69
70#define MAX_HBA_QUEUE_DEPTH 30000
71#define MAX_CHAIN_DEPTH 100000
72static int max_queue_depth = -1;
73module_param(max_queue_depth, int, 0);
74MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
75
76static int max_sgl_entries = -1;
77module_param(max_sgl_entries, int, 0);
78MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
79
80static int msix_disable = -1;
81module_param(msix_disable, int, 0);
82MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
83
84static int max_msix_vectors = -1;
85module_param(max_msix_vectors, int, 0);
86MODULE_PARM_DESC(max_msix_vectors, " max msix vectors ");
87
88static int mpt2sas_fwfault_debug;
89MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
90 "and halt firmware - (default=0)");
91
92static int disable_discovery = -1;
93module_param(disable_discovery, int, 0);
94MODULE_PARM_DESC(disable_discovery, " disable discovery ");
95
96static int
97_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag);
98
99static int
100_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag);
101
102/**
103 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
104 *
105 */
106static int
107_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
108{
109 int ret = param_set_int(val, kp);
110 struct MPT2SAS_ADAPTER *ioc;
111
112 if (ret)
113 return ret;
114
115 /* global ioc spinlock to protect controller list on list operations */
116 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
117 spin_lock(&gioc_lock);
118 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
119 ioc->fwfault_debug = mpt2sas_fwfault_debug;
120 spin_unlock(&gioc_lock);
121 return 0;
122}
123
124module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
125 param_get_int, &mpt2sas_fwfault_debug, 0644);
126
127/**
128 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
129 * @arg: input argument, used to derive ioc
130 *
131 * Return 0 if controller is removed from pci subsystem.
132 * Return -1 for other case.
133 */
134static int mpt2sas_remove_dead_ioc_func(void *arg)
135{
136 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
137 struct pci_dev *pdev;
138
139 if ((ioc == NULL))
140 return -1;
141
142 pdev = ioc->pdev;
143 if ((pdev == NULL))
144 return -1;
145 pci_stop_and_remove_bus_device_locked(pdev);
146 return 0;
147}
148
149
150/**
151 * _base_fault_reset_work - workq handling ioc fault conditions
152 * @work: input argument, used to derive ioc
153 * Context: sleep.
154 *
155 * Return nothing.
156 */
157static void
158_base_fault_reset_work(struct work_struct *work)
159{
160 struct MPT2SAS_ADAPTER *ioc =
161 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
162 unsigned long flags;
163 u32 doorbell;
164 int rc;
165 struct task_struct *p;
166
167 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
168 if (ioc->shost_recovery || ioc->pci_error_recovery)
169 goto rearm_timer;
170 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
171
172 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
173 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
174 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
175 ioc->name, __func__);
176
177 /* It may be possible that EEH recovery can resolve some of
178 * pci bus failure issues rather removing the dead ioc function
179 * by considering controller is in a non-operational state. So
180 * here priority is given to the EEH recovery. If it doesn't
181 * not resolve this issue, mpt2sas driver will consider this
182 * controller to non-operational state and remove the dead ioc
183 * function.
184 */
185 if (ioc->non_operational_loop++ < 5) {
186 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
187 flags);
188 goto rearm_timer;
189 }
190
191 /*
192 * Call _scsih_flush_pending_cmds callback so that we flush all
193 * pending commands back to OS. This call is required to aovid
194 * deadlock at block layer. Dead IOC will fail to do diag reset,
195 * and this call is safe since dead ioc will never return any
196 * command back from HW.
197 */
198 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
199 /*
200 * Set remove_host flag early since kernel thread will
201 * take some time to execute.
202 */
203 ioc->remove_host = 1;
204 /*Remove the Dead Host */
205 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
206 "mpt2sas_dead_ioc_%d", ioc->id);
207 if (IS_ERR(p)) {
208 printk(MPT2SAS_ERR_FMT
209 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
210 ioc->name, __func__);
211 } else {
212 printk(MPT2SAS_ERR_FMT
213 "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
214 ioc->name, __func__);
215 }
216
217 return; /* don't rearm timer */
218 }
219
220 ioc->non_operational_loop = 0;
221
222 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
223 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
224 FORCE_BIG_HAMMER);
225 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
226 __func__, (rc == 0) ? "success" : "failed");
227 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
228 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
229 mpt2sas_base_fault_info(ioc, doorbell &
230 MPI2_DOORBELL_DATA_MASK);
231 }
232
233 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
234 rearm_timer:
235 if (ioc->fault_reset_work_q)
236 queue_delayed_work(ioc->fault_reset_work_q,
237 &ioc->fault_reset_work,
238 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
239 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
240}
241
242/**
243 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
244 * @ioc: per adapter object
245 * Context: sleep.
246 *
247 * Return nothing.
248 */
249void
250mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
251{
252 unsigned long flags;
253
254 if (ioc->fault_reset_work_q)
255 return;
256
257 /* initialize fault polling */
258 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
259 snprintf(ioc->fault_reset_work_q_name,
260 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
261 ioc->fault_reset_work_q =
262 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
263 if (!ioc->fault_reset_work_q) {
264 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
265 ioc->name, __func__, __LINE__);
266 return;
267 }
268 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
269 if (ioc->fault_reset_work_q)
270 queue_delayed_work(ioc->fault_reset_work_q,
271 &ioc->fault_reset_work,
272 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
273 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
274}
275
276/**
277 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
278 * @ioc: per adapter object
279 * Context: sleep.
280 *
281 * Return nothing.
282 */
283void
284mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
285{
286 unsigned long flags;
287 struct workqueue_struct *wq;
288
289 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
290 wq = ioc->fault_reset_work_q;
291 ioc->fault_reset_work_q = NULL;
292 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
293 if (wq) {
294 if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
295 flush_workqueue(wq);
296 destroy_workqueue(wq);
297 }
298}
299
300/**
301 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
302 * @ioc: per adapter object
303 * @fault_code: fault code
304 *
305 * Return nothing.
306 */
307void
308mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
309{
310 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
311 ioc->name, fault_code);
312}
313
314/**
315 * mpt2sas_halt_firmware - halt's mpt controller firmware
316 * @ioc: per adapter object
317 *
318 * For debugging timeout related issues. Writing 0xCOFFEE00
319 * to the doorbell register will halt controller firmware. With
320 * the purpose to stop both driver and firmware, the enduser can
321 * obtain a ring buffer from controller UART.
322 */
323void
324mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
325{
326 u32 doorbell;
327
328 if (!ioc->fwfault_debug)
329 return;
330
331 dump_stack();
332
333 doorbell = readl(&ioc->chip->Doorbell);
334 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
335 mpt2sas_base_fault_info(ioc , doorbell);
336 else {
337 writel(0xC0FFEE00, &ioc->chip->Doorbell);
338 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
339 "timeout\n", ioc->name);
340 }
341
342 panic("panic in %s\n", __func__);
343}
344
345#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
346/**
347 * _base_sas_ioc_info - verbose translation of the ioc status
348 * @ioc: per adapter object
349 * @mpi_reply: reply mf payload returned from firmware
350 * @request_hdr: request mf
351 *
352 * Return nothing.
353 */
354static void
355_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
356 MPI2RequestHeader_t *request_hdr)
357{
358 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
359 MPI2_IOCSTATUS_MASK;
360 char *desc = NULL;
361 u16 frame_sz;
362 char *func_str = NULL;
363
364 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
365 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
366 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
367 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
368 return;
369
370 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
371 return;
372
373 switch (ioc_status) {
374
375/****************************************************************************
376* Common IOCStatus values for all replies
377****************************************************************************/
378
379 case MPI2_IOCSTATUS_INVALID_FUNCTION:
380 desc = "invalid function";
381 break;
382 case MPI2_IOCSTATUS_BUSY:
383 desc = "busy";
384 break;
385 case MPI2_IOCSTATUS_INVALID_SGL:
386 desc = "invalid sgl";
387 break;
388 case MPI2_IOCSTATUS_INTERNAL_ERROR:
389 desc = "internal error";
390 break;
391 case MPI2_IOCSTATUS_INVALID_VPID:
392 desc = "invalid vpid";
393 break;
394 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
395 desc = "insufficient resources";
396 break;
397 case MPI2_IOCSTATUS_INVALID_FIELD:
398 desc = "invalid field";
399 break;
400 case MPI2_IOCSTATUS_INVALID_STATE:
401 desc = "invalid state";
402 break;
403 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
404 desc = "op state not supported";
405 break;
406
407/****************************************************************************
408* Config IOCStatus values
409****************************************************************************/
410
411 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
412 desc = "config invalid action";
413 break;
414 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
415 desc = "config invalid type";
416 break;
417 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
418 desc = "config invalid page";
419 break;
420 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
421 desc = "config invalid data";
422 break;
423 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
424 desc = "config no defaults";
425 break;
426 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
427 desc = "config cant commit";
428 break;
429
430/****************************************************************************
431* SCSI IO Reply
432****************************************************************************/
433
434 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
435 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
436 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
437 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
438 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
439 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
440 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
441 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
442 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
443 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
444 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
445 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
446 break;
447
448/****************************************************************************
449* For use by SCSI Initiator and SCSI Target end-to-end data protection
450****************************************************************************/
451
452 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
453 desc = "eedp guard error";
454 break;
455 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
456 desc = "eedp ref tag error";
457 break;
458 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
459 desc = "eedp app tag error";
460 break;
461
462/****************************************************************************
463* SCSI Target values
464****************************************************************************/
465
466 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
467 desc = "target invalid io index";
468 break;
469 case MPI2_IOCSTATUS_TARGET_ABORTED:
470 desc = "target aborted";
471 break;
472 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
473 desc = "target no conn retryable";
474 break;
475 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
476 desc = "target no connection";
477 break;
478 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
479 desc = "target xfer count mismatch";
480 break;
481 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
482 desc = "target data offset error";
483 break;
484 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
485 desc = "target too much write data";
486 break;
487 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
488 desc = "target iu too short";
489 break;
490 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
491 desc = "target ack nak timeout";
492 break;
493 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
494 desc = "target nak received";
495 break;
496
497/****************************************************************************
498* Serial Attached SCSI values
499****************************************************************************/
500
501 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
502 desc = "smp request failed";
503 break;
504 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
505 desc = "smp data overrun";
506 break;
507
508/****************************************************************************
509* Diagnostic Buffer Post / Diagnostic Release values
510****************************************************************************/
511
512 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
513 desc = "diagnostic released";
514 break;
515 default:
516 break;
517 }
518
519 if (!desc)
520 return;
521
522 switch (request_hdr->Function) {
523 case MPI2_FUNCTION_CONFIG:
524 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
525 func_str = "config_page";
526 break;
527 case MPI2_FUNCTION_SCSI_TASK_MGMT:
528 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
529 func_str = "task_mgmt";
530 break;
531 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
532 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
533 func_str = "sas_iounit_ctl";
534 break;
535 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
536 frame_sz = sizeof(Mpi2SepRequest_t);
537 func_str = "enclosure";
538 break;
539 case MPI2_FUNCTION_IOC_INIT:
540 frame_sz = sizeof(Mpi2IOCInitRequest_t);
541 func_str = "ioc_init";
542 break;
543 case MPI2_FUNCTION_PORT_ENABLE:
544 frame_sz = sizeof(Mpi2PortEnableRequest_t);
545 func_str = "port_enable";
546 break;
547 case MPI2_FUNCTION_SMP_PASSTHROUGH:
548 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
549 func_str = "smp_passthru";
550 break;
551 default:
552 frame_sz = 32;
553 func_str = "unknown";
554 break;
555 }
556
557 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
558 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
559
560 _debug_dump_mf(request_hdr, frame_sz/4);
561}
562
563/**
564 * _base_display_event_data - verbose translation of firmware asyn events
565 * @ioc: per adapter object
566 * @mpi_reply: reply mf payload returned from firmware
567 *
568 * Return nothing.
569 */
570static void
571_base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
572 Mpi2EventNotificationReply_t *mpi_reply)
573{
574 char *desc = NULL;
575 u16 event;
576
577 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
578 return;
579
580 event = le16_to_cpu(mpi_reply->Event);
581
582 switch (event) {
583 case MPI2_EVENT_LOG_DATA:
584 desc = "Log Data";
585 break;
586 case MPI2_EVENT_STATE_CHANGE:
587 desc = "Status Change";
588 break;
589 case MPI2_EVENT_HARD_RESET_RECEIVED:
590 desc = "Hard Reset Received";
591 break;
592 case MPI2_EVENT_EVENT_CHANGE:
593 desc = "Event Change";
594 break;
595 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
596 desc = "Device Status Change";
597 break;
598 case MPI2_EVENT_IR_OPERATION_STATUS:
599 if (!ioc->hide_ir_msg)
600 desc = "IR Operation Status";
601 break;
602 case MPI2_EVENT_SAS_DISCOVERY:
603 {
604 Mpi2EventDataSasDiscovery_t *event_data =
605 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
606 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
607 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
608 "start" : "stop");
609 if (event_data->DiscoveryStatus)
610 printk("discovery_status(0x%08x)",
611 le32_to_cpu(event_data->DiscoveryStatus));
612 printk("\n");
613 return;
614 }
615 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
616 desc = "SAS Broadcast Primitive";
617 break;
618 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
619 desc = "SAS Init Device Status Change";
620 break;
621 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
622 desc = "SAS Init Table Overflow";
623 break;
624 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
625 desc = "SAS Topology Change List";
626 break;
627 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
628 desc = "SAS Enclosure Device Status Change";
629 break;
630 case MPI2_EVENT_IR_VOLUME:
631 if (!ioc->hide_ir_msg)
632 desc = "IR Volume";
633 break;
634 case MPI2_EVENT_IR_PHYSICAL_DISK:
635 if (!ioc->hide_ir_msg)
636 desc = "IR Physical Disk";
637 break;
638 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
639 if (!ioc->hide_ir_msg)
640 desc = "IR Configuration Change List";
641 break;
642 case MPI2_EVENT_LOG_ENTRY_ADDED:
643 if (!ioc->hide_ir_msg)
644 desc = "Log Entry Added";
645 break;
646 case MPI2_EVENT_TEMP_THRESHOLD:
647 desc = "Temperature Threshold";
648 break;
649 }
650
651 if (!desc)
652 return;
653
654 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
655}
656#endif
657
658/**
659 * _base_sas_log_info - verbose translation of firmware log info
660 * @ioc: per adapter object
661 * @log_info: log info
662 *
663 * Return nothing.
664 */
665static void
666_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
667{
668 union loginfo_type {
669 u32 loginfo;
670 struct {
671 u32 subcode:16;
672 u32 code:8;
673 u32 originator:4;
674 u32 bus_type:4;
675 } dw;
676 };
677 union loginfo_type sas_loginfo;
678 char *originator_str = NULL;
679
680 sas_loginfo.loginfo = log_info;
681 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
682 return;
683
684 /* each nexus loss loginfo */
685 if (log_info == 0x31170000)
686 return;
687
688 /* eat the loginfos associated with task aborts */
689 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
690 0x31140000 || log_info == 0x31130000))
691 return;
692
693 switch (sas_loginfo.dw.originator) {
694 case 0:
695 originator_str = "IOP";
696 break;
697 case 1:
698 originator_str = "PL";
699 break;
700 case 2:
701 if (!ioc->hide_ir_msg)
702 originator_str = "IR";
703 else
704 originator_str = "WarpDrive";
705 break;
706 }
707
708 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
709 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
710 originator_str, sas_loginfo.dw.code,
711 sas_loginfo.dw.subcode);
712}
713
714/**
715 * _base_display_reply_info -
716 * @ioc: per adapter object
717 * @smid: system request message index
718 * @msix_index: MSIX table index supplied by the OS
719 * @reply: reply message frame(lower 32bit addr)
720 *
721 * Return nothing.
722 */
723static void
724_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
725 u32 reply)
726{
727 MPI2DefaultReply_t *mpi_reply;
728 u16 ioc_status;
729
730 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
731 if (unlikely(!mpi_reply)) {
732 printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
733 ioc->name, __FILE__, __LINE__, __func__);
734 return;
735 }
736 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
737#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
738 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
739 (ioc->logging_level & MPT_DEBUG_REPLY)) {
740 _base_sas_ioc_info(ioc , mpi_reply,
741 mpt2sas_base_get_msg_frame(ioc, smid));
742 }
743#endif
744 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
745 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
746}
747
748/**
749 * mpt2sas_base_done - base internal command completion routine
750 * @ioc: per adapter object
751 * @smid: system request message index
752 * @msix_index: MSIX table index supplied by the OS
753 * @reply: reply message frame(lower 32bit addr)
754 *
755 * Return 1 meaning mf should be freed from _base_interrupt
756 * 0 means the mf is freed from this function.
757 */
758u8
759mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
760 u32 reply)
761{
762 MPI2DefaultReply_t *mpi_reply;
763
764 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
765 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
766 return 1;
767
768 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
769 return 1;
770
771 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
772 if (mpi_reply) {
773 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
774 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
775 }
776 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
777
778 complete(&ioc->base_cmds.done);
779 return 1;
780}
781
782/**
783 * _base_async_event - main callback handler for firmware asyn events
784 * @ioc: per adapter object
785 * @msix_index: MSIX table index supplied by the OS
786 * @reply: reply message frame(lower 32bit addr)
787 *
788 * Returns void.
789 */
790static void
791_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
792{
793 Mpi2EventNotificationReply_t *mpi_reply;
794 Mpi2EventAckRequest_t *ack_request;
795 u16 smid;
796
797 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
798 if (!mpi_reply)
799 return;
800 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
801 return;
802#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
803 _base_display_event_data(ioc, mpi_reply);
804#endif
805 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
806 goto out;
807 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
808 if (!smid) {
809 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
810 ioc->name, __func__);
811 goto out;
812 }
813
814 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
815 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
816 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
817 ack_request->Event = mpi_reply->Event;
818 ack_request->EventContext = mpi_reply->EventContext;
819 ack_request->VF_ID = 0; /* TODO */
820 ack_request->VP_ID = 0;
821 mpt2sas_base_put_smid_default(ioc, smid);
822
823 out:
824
825 /* scsih callback handler */
826 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
827
828 /* ctl callback handler */
829 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
830
831 return;
832}
833
834/**
835 * _base_get_cb_idx - obtain the callback index
836 * @ioc: per adapter object
837 * @smid: system request message index
838 *
839 * Return callback index.
840 */
841static u8
842_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
843{
844 int i;
845 u8 cb_idx;
846
847 if (smid < ioc->hi_priority_smid) {
848 i = smid - 1;
849 cb_idx = ioc->scsi_lookup[i].cb_idx;
850 } else if (smid < ioc->internal_smid) {
851 i = smid - ioc->hi_priority_smid;
852 cb_idx = ioc->hpr_lookup[i].cb_idx;
853 } else if (smid <= ioc->hba_queue_depth) {
854 i = smid - ioc->internal_smid;
855 cb_idx = ioc->internal_lookup[i].cb_idx;
856 } else
857 cb_idx = 0xFF;
858 return cb_idx;
859}
860
861/**
862 * _base_mask_interrupts - disable interrupts
863 * @ioc: per adapter object
864 *
865 * Disabling ResetIRQ, Reply and Doorbell Interrupts
866 *
867 * Return nothing.
868 */
869static void
870_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
871{
872 u32 him_register;
873
874 ioc->mask_interrupts = 1;
875 him_register = readl(&ioc->chip->HostInterruptMask);
876 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
877 writel(him_register, &ioc->chip->HostInterruptMask);
878 readl(&ioc->chip->HostInterruptMask);
879}
880
881/**
882 * _base_unmask_interrupts - enable interrupts
883 * @ioc: per adapter object
884 *
885 * Enabling only Reply Interrupts
886 *
887 * Return nothing.
888 */
889static void
890_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
891{
892 u32 him_register;
893
894 him_register = readl(&ioc->chip->HostInterruptMask);
895 him_register &= ~MPI2_HIM_RIM;
896 writel(him_register, &ioc->chip->HostInterruptMask);
897 ioc->mask_interrupts = 0;
898}
899
900union reply_descriptor {
901 u64 word;
902 struct {
903 u32 low;
904 u32 high;
905 } u;
906};
907
908/**
909 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
910 * @irq: irq number (not used)
911 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
912 * @r: pt_regs pointer (not used)
913 *
914 * Return IRQ_HANDLE if processed, else IRQ_NONE.
915 */
916static irqreturn_t
917_base_interrupt(int irq, void *bus_id)
918{
919 struct adapter_reply_queue *reply_q = bus_id;
920 union reply_descriptor rd;
921 u32 completed_cmds;
922 u8 request_desript_type;
923 u16 smid;
924 u8 cb_idx;
925 u32 reply;
926 u8 msix_index = reply_q->msix_index;
927 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
928 Mpi2ReplyDescriptorsUnion_t *rpf;
929 u8 rc;
930
931 if (ioc->mask_interrupts)
932 return IRQ_NONE;
933
934 if (!atomic_add_unless(&reply_q->busy, 1, 1))
935 return IRQ_NONE;
936
937 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
938 request_desript_type = rpf->Default.ReplyFlags
939 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
940 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
941 atomic_dec(&reply_q->busy);
942 return IRQ_NONE;
943 }
944
945 completed_cmds = 0;
946 cb_idx = 0xFF;
947 do {
948 rd.word = le64_to_cpu(rpf->Words);
949 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
950 goto out;
951 reply = 0;
952 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
953 if (request_desript_type ==
954 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
955 reply = le32_to_cpu
956 (rpf->AddressReply.ReplyFrameAddress);
957 if (reply > ioc->reply_dma_max_address ||
958 reply < ioc->reply_dma_min_address)
959 reply = 0;
960 } else if (request_desript_type ==
961 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
962 goto next;
963 else if (request_desript_type ==
964 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
965 goto next;
966 if (smid) {
967 cb_idx = _base_get_cb_idx(ioc, smid);
968 if ((likely(cb_idx < MPT_MAX_CALLBACKS))
969 && (likely(mpt_callbacks[cb_idx] != NULL))) {
970 rc = mpt_callbacks[cb_idx](ioc, smid,
971 msix_index, reply);
972 if (reply)
973 _base_display_reply_info(ioc, smid,
974 msix_index, reply);
975 if (rc)
976 mpt2sas_base_free_smid(ioc, smid);
977 }
978 }
979 if (!smid)
980 _base_async_event(ioc, msix_index, reply);
981
982 /* reply free queue handling */
983 if (reply) {
984 ioc->reply_free_host_index =
985 (ioc->reply_free_host_index ==
986 (ioc->reply_free_queue_depth - 1)) ?
987 0 : ioc->reply_free_host_index + 1;
988 ioc->reply_free[ioc->reply_free_host_index] =
989 cpu_to_le32(reply);
990 wmb();
991 writel(ioc->reply_free_host_index,
992 &ioc->chip->ReplyFreeHostIndex);
993 }
994
995 next:
996
997 rpf->Words = cpu_to_le64(ULLONG_MAX);
998 reply_q->reply_post_host_index =
999 (reply_q->reply_post_host_index ==
1000 (ioc->reply_post_queue_depth - 1)) ? 0 :
1001 reply_q->reply_post_host_index + 1;
1002 request_desript_type =
1003 reply_q->reply_post_free[reply_q->reply_post_host_index].
1004 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1005 completed_cmds++;
1006 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1007 goto out;
1008 if (!reply_q->reply_post_host_index)
1009 rpf = reply_q->reply_post_free;
1010 else
1011 rpf++;
1012 } while (1);
1013
1014 out:
1015
1016 if (!completed_cmds) {
1017 atomic_dec(&reply_q->busy);
1018 return IRQ_NONE;
1019 }
1020 wmb();
1021 if (ioc->is_warpdrive) {
1022 writel(reply_q->reply_post_host_index,
1023 ioc->reply_post_host_index[msix_index]);
1024 atomic_dec(&reply_q->busy);
1025 return IRQ_HANDLED;
1026 }
1027 writel(reply_q->reply_post_host_index | (msix_index <<
1028 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
1029 atomic_dec(&reply_q->busy);
1030 return IRQ_HANDLED;
1031}
1032
1033/**
1034 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1035 * @ioc: per adapter object
1036 *
1037 */
1038static inline int
1039_base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
1040{
1041 return (ioc->facts.IOCCapabilities &
1042 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1043}
1044
1045/**
1046 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
1047 * @ioc: per adapter object
1048 * Context: ISR conext
1049 *
1050 * Called when a Task Management request has completed. We want
1051 * to flush the other reply queues so all the outstanding IO has been
1052 * completed back to OS before we process the TM completetion.
1053 *
1054 * Return nothing.
1055 */
1056void
1057mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1058{
1059 struct adapter_reply_queue *reply_q;
1060
1061 /* If MSIX capability is turned off
1062 * then multi-queues are not enabled
1063 */
1064 if (!_base_is_controller_msix_enabled(ioc))
1065 return;
1066
1067 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1068 if (ioc->shost_recovery)
1069 return;
1070 /* TMs are on msix_index == 0 */
1071 if (reply_q->msix_index == 0)
1072 continue;
1073 _base_interrupt(reply_q->vector, (void *)reply_q);
1074 }
1075}
1076
1077/**
1078 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
1079 * @cb_idx: callback index
1080 *
1081 * Return nothing.
1082 */
1083void
1084mpt2sas_base_release_callback_handler(u8 cb_idx)
1085{
1086 mpt_callbacks[cb_idx] = NULL;
1087}
1088
1089/**
1090 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
1091 * @cb_func: callback function
1092 *
1093 * Returns cb_func.
1094 */
1095u8
1096mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1097{
1098 u8 cb_idx;
1099
1100 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1101 if (mpt_callbacks[cb_idx] == NULL)
1102 break;
1103
1104 mpt_callbacks[cb_idx] = cb_func;
1105 return cb_idx;
1106}
1107
1108/**
1109 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
1110 *
1111 * Return nothing.
1112 */
1113void
1114mpt2sas_base_initialize_callback_handler(void)
1115{
1116 u8 cb_idx;
1117
1118 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1119 mpt2sas_base_release_callback_handler(cb_idx);
1120}
1121
1122/**
1123 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
1124 * @ioc: per adapter object
1125 * @paddr: virtual address for SGE
1126 *
1127 * Create a zero length scatter gather entry to insure the IOCs hardware has
1128 * something to use if the target device goes brain dead and tries
1129 * to send data even when none is asked for.
1130 *
1131 * Return nothing.
1132 */
1133void
1134mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1135{
1136 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1137 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1138 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1139 MPI2_SGE_FLAGS_SHIFT);
1140 ioc->base_add_sg_single(paddr, flags_length, -1);
1141}
1142
1143/**
1144 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1145 * @paddr: virtual address for SGE
1146 * @flags_length: SGE flags and data transfer length
1147 * @dma_addr: Physical address
1148 *
1149 * Return nothing.
1150 */
1151static void
1152_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1153{
1154 Mpi2SGESimple32_t *sgel = paddr;
1155
1156 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1157 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1158 sgel->FlagsLength = cpu_to_le32(flags_length);
1159 sgel->Address = cpu_to_le32(dma_addr);
1160}
1161
1162
1163/**
1164 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1165 * @paddr: virtual address for SGE
1166 * @flags_length: SGE flags and data transfer length
1167 * @dma_addr: Physical address
1168 *
1169 * Return nothing.
1170 */
1171static void
1172_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1173{
1174 Mpi2SGESimple64_t *sgel = paddr;
1175
1176 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1177 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1178 sgel->FlagsLength = cpu_to_le32(flags_length);
1179 sgel->Address = cpu_to_le64(dma_addr);
1180}
1181
1182#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1183
1184/**
1185 * _base_config_dma_addressing - set dma addressing
1186 * @ioc: per adapter object
1187 * @pdev: PCI device struct
1188 *
1189 * Returns 0 for success, non-zero for failure.
1190 */
1191static int
1192_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1193{
1194 struct sysinfo s;
1195 u64 consistent_dma_mask;
1196
1197 if (ioc->dma_mask)
1198 consistent_dma_mask = DMA_BIT_MASK(64);
1199 else
1200 consistent_dma_mask = DMA_BIT_MASK(32);
1201
1202 if (sizeof(dma_addr_t) > 4) {
1203 const uint64_t required_mask =
1204 dma_get_required_mask(&pdev->dev);
1205 if ((required_mask > DMA_BIT_MASK(32)) &&
1206 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
1207 !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
1208 ioc->base_add_sg_single = &_base_add_sg_single_64;
1209 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1210 ioc->dma_mask = 64;
1211 goto out;
1212 }
1213 }
1214
1215 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1216 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1217 ioc->base_add_sg_single = &_base_add_sg_single_32;
1218 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1219 ioc->dma_mask = 32;
1220 } else
1221 return -ENODEV;
1222
1223 out:
1224 si_meminfo(&s);
1225 printk(MPT2SAS_INFO_FMT
1226 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1227 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
1228
1229 return 0;
1230}
1231
1232static int
1233_base_change_consistent_dma_mask(struct MPT2SAS_ADAPTER *ioc,
1234 struct pci_dev *pdev)
1235{
1236 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1237 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
1238 return -ENODEV;
1239 }
1240 return 0;
1241}
1242/**
1243 * _base_check_enable_msix - checks MSIX capabable.
1244 * @ioc: per adapter object
1245 *
1246 * Check to see if card is capable of MSIX, and set number
1247 * of available msix vectors
1248 */
1249static int
1250_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1251{
1252 int base;
1253 u16 message_control;
1254
1255
1256 /* Check whether controller SAS2008 B0 controller,
1257 if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
1258 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1259 ioc->pdev->revision == 0x01) {
1260 return -EINVAL;
1261 }
1262
1263 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1264 if (!base) {
1265 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1266 "supported\n", ioc->name));
1267 return -EINVAL;
1268 }
1269
1270 /* get msix vector count */
1271 /* NUMA_IO not supported for older controllers */
1272 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1273 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1274 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1275 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1276 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1277 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1278 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1279 ioc->msix_vector_count = 1;
1280 else {
1281 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1282 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1283 }
1284 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1285 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1286
1287 return 0;
1288}
1289
1290/**
1291 * _base_free_irq - free irq
1292 * @ioc: per adapter object
1293 *
1294 * Freeing respective reply_queue from the list.
1295 */
1296static void
1297_base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1298{
1299 struct adapter_reply_queue *reply_q, *next;
1300
1301 if (list_empty(&ioc->reply_queue_list))
1302 return;
1303
1304 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1305 list_del(&reply_q->list);
1306 irq_set_affinity_hint(reply_q->vector, NULL);
1307 free_cpumask_var(reply_q->affinity_hint);
1308 synchronize_irq(reply_q->vector);
1309 free_irq(reply_q->vector, reply_q);
1310 kfree(reply_q);
1311 }
1312}
1313
1314/**
1315 * _base_request_irq - request irq
1316 * @ioc: per adapter object
1317 * @index: msix index into vector table
1318 * @vector: irq vector
1319 *
1320 * Inserting respective reply_queue into the list.
1321 */
1322static int
1323_base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1324{
1325 struct adapter_reply_queue *reply_q;
1326 int r;
1327
1328 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1329 if (!reply_q) {
1330 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
1331 ioc->name, (int)sizeof(struct adapter_reply_queue));
1332 return -ENOMEM;
1333 }
1334 reply_q->ioc = ioc;
1335 reply_q->msix_index = index;
1336 reply_q->vector = vector;
1337
1338 if (!alloc_cpumask_var(&reply_q->affinity_hint, GFP_KERNEL))
1339 return -ENOMEM;
1340 cpumask_clear(reply_q->affinity_hint);
1341
1342 atomic_set(&reply_q->busy, 0);
1343 if (ioc->msix_enable)
1344 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1345 MPT2SAS_DRIVER_NAME, ioc->id, index);
1346 else
1347 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1348 MPT2SAS_DRIVER_NAME, ioc->id);
1349 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1350 reply_q);
1351 if (r) {
1352 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1353 reply_q->name, vector);
1354 kfree(reply_q);
1355 return -EBUSY;
1356 }
1357
1358 INIT_LIST_HEAD(&reply_q->list);
1359 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1360 return 0;
1361}
1362
1363/**
1364 * _base_assign_reply_queues - assigning msix index for each cpu
1365 * @ioc: per adapter object
1366 *
1367 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1368 *
1369 * It would nice if we could call irq_set_affinity, however it is not
1370 * an exported symbol
1371 */
1372static void
1373_base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1374{
1375 unsigned int cpu, nr_cpus, nr_msix, index = 0;
1376 struct adapter_reply_queue *reply_q;
1377
1378 if (!_base_is_controller_msix_enabled(ioc))
1379 return;
1380
1381 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1382
1383 nr_cpus = num_online_cpus();
1384 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
1385 ioc->facts.MaxMSIxVectors);
1386 if (!nr_msix)
1387 return;
1388
1389 cpu = cpumask_first(cpu_online_mask);
1390
1391 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1392
1393 unsigned int i, group = nr_cpus / nr_msix;
1394
1395 if (cpu >= nr_cpus)
1396 break;
1397
1398 if (index < nr_cpus % nr_msix)
1399 group++;
1400
1401 for (i = 0 ; i < group ; i++) {
1402 ioc->cpu_msix_table[cpu] = index;
1403 cpumask_or(reply_q->affinity_hint,
1404 reply_q->affinity_hint, get_cpu_mask(cpu));
1405 cpu = cpumask_next(cpu, cpu_online_mask);
1406 }
1407
1408 if (irq_set_affinity_hint(reply_q->vector,
1409 reply_q->affinity_hint))
1410 dinitprintk(ioc, pr_info(MPT2SAS_FMT
1411 "error setting affinity hint for irq vector %d\n",
1412 ioc->name, reply_q->vector));
1413 index++;
1414 }
1415}
1416
1417/**
1418 * _base_disable_msix - disables msix
1419 * @ioc: per adapter object
1420 *
1421 */
1422static void
1423_base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1424{
1425 if (ioc->msix_enable) {
1426 pci_disable_msix(ioc->pdev);
1427 ioc->msix_enable = 0;
1428 }
1429}
1430
1431/**
1432 * _base_enable_msix - enables msix, failback to io_apic
1433 * @ioc: per adapter object
1434 *
1435 */
1436static int
1437_base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1438{
1439 struct msix_entry *entries, *a;
1440 int r;
1441 int i;
1442 u8 try_msix = 0;
1443
1444 if (msix_disable == -1 || msix_disable == 0)
1445 try_msix = 1;
1446
1447 if (!try_msix)
1448 goto try_ioapic;
1449
1450 if (_base_check_enable_msix(ioc) != 0)
1451 goto try_ioapic;
1452
1453 ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1454 ioc->msix_vector_count);
1455
1456 if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
1457 max_msix_vectors = 8;
1458
1459 if (max_msix_vectors > 0) {
1460 ioc->reply_queue_count = min_t(int, max_msix_vectors,
1461 ioc->reply_queue_count);
1462 ioc->msix_vector_count = ioc->reply_queue_count;
1463 } else if (max_msix_vectors == 0)
1464 goto try_ioapic;
1465
1466 printk(MPT2SAS_INFO_FMT
1467 "MSI-X vectors supported: %d, no of cores: %d, max_msix_vectors: %d\n",
1468 ioc->name, ioc->msix_vector_count, ioc->cpu_count, max_msix_vectors);
1469
1470 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1471 GFP_KERNEL);
1472 if (!entries) {
1473 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1474 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1475 __LINE__, __func__));
1476 goto try_ioapic;
1477 }
1478
1479 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1480 a->entry = i;
1481
1482 r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
1483 if (r) {
1484 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT
1485 "pci_enable_msix_exact failed (r=%d) !!!\n", ioc->name, r));
1486 kfree(entries);
1487 goto try_ioapic;
1488 }
1489
1490 ioc->msix_enable = 1;
1491 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1492 r = _base_request_irq(ioc, i, a->vector);
1493 if (r) {
1494 _base_free_irq(ioc);
1495 _base_disable_msix(ioc);
1496 kfree(entries);
1497 goto try_ioapic;
1498 }
1499 }
1500
1501 kfree(entries);
1502 return 0;
1503
1504/* failback to io_apic interrupt routing */
1505 try_ioapic:
1506
1507 ioc->reply_queue_count = 1;
1508 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1509
1510 return r;
1511}
1512
1513/**
1514 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1515 * @ioc: per adapter object
1516 *
1517 * Returns 0 for success, non-zero for failure.
1518 */
1519int
1520mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1521{
1522 struct pci_dev *pdev = ioc->pdev;
1523 u32 memap_sz;
1524 u32 pio_sz;
1525 int i, r = 0;
1526 u64 pio_chip = 0;
1527 u64 chip_phys = 0;
1528 struct adapter_reply_queue *reply_q;
1529
1530 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1531 ioc->name, __func__));
1532
1533 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1534 if (pci_enable_device_mem(pdev)) {
1535 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1536 "failed\n", ioc->name);
1537 ioc->bars = 0;
1538 return -ENODEV;
1539 }
1540
1541
1542 if (pci_request_selected_regions(pdev, ioc->bars,
1543 MPT2SAS_DRIVER_NAME)) {
1544 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1545 "failed\n", ioc->name);
1546 ioc->bars = 0;
1547 r = -ENODEV;
1548 goto out_fail;
1549 }
1550
1551 /* AER (Advanced Error Reporting) hooks */
1552 pci_enable_pcie_error_reporting(pdev);
1553
1554 pci_set_master(pdev);
1555
1556 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1557 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1558 ioc->name, pci_name(pdev));
1559 r = -ENODEV;
1560 goto out_fail;
1561 }
1562
1563 for (i = 0, memap_sz = 0, pio_sz = 0; (i < DEVICE_COUNT_RESOURCE) &&
1564 (!memap_sz || !pio_sz); i++) {
1565 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1566 if (pio_sz)
1567 continue;
1568 pio_chip = (u64)pci_resource_start(pdev, i);
1569 pio_sz = pci_resource_len(pdev, i);
1570 } else {
1571 if (memap_sz)
1572 continue;
1573 /* verify memory resource is valid before using */
1574 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1575 ioc->chip_phys = pci_resource_start(pdev, i);
1576 chip_phys = (u64)ioc->chip_phys;
1577 memap_sz = pci_resource_len(pdev, i);
1578 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1579 }
1580 }
1581 }
1582
1583 if (ioc->chip == NULL) {
1584 printk(MPT2SAS_ERR_FMT "unable to map adapter memory! "
1585 "or resource not found\n", ioc->name);
1586 r = -EINVAL;
1587 goto out_fail;
1588 }
1589
1590 _base_mask_interrupts(ioc);
1591
1592 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
1593 if (r)
1594 goto out_fail;
1595
1596 if (!ioc->rdpq_array_enable_assigned) {
1597 ioc->rdpq_array_enable = ioc->rdpq_array_capable;
1598 ioc->rdpq_array_enable_assigned = 1;
1599 }
1600
1601 r = _base_enable_msix(ioc);
1602 if (r)
1603 goto out_fail;
1604
1605 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1606 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1607 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1608 "IO-APIC enabled"), reply_q->vector);
1609
1610 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1611 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1612 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1613 ioc->name, (unsigned long long)pio_chip, pio_sz);
1614
1615 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1616 pci_save_state(pdev);
1617
1618 return 0;
1619
1620 out_fail:
1621 if (ioc->chip_phys)
1622 iounmap(ioc->chip);
1623 ioc->chip_phys = 0;
1624 pci_release_selected_regions(ioc->pdev, ioc->bars);
1625 pci_disable_pcie_error_reporting(pdev);
1626 pci_disable_device(pdev);
1627 return r;
1628}
1629
1630/**
1631 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1632 * @ioc: per adapter object
1633 * @smid: system request message index(smid zero is invalid)
1634 *
1635 * Returns virt pointer to message frame.
1636 */
1637void *
1638mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1639{
1640 return (void *)(ioc->request + (smid * ioc->request_sz));
1641}
1642
1643/**
1644 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1645 * @ioc: per adapter object
1646 * @smid: system request message index
1647 *
1648 * Returns virt pointer to sense buffer.
1649 */
1650void *
1651mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1652{
1653 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1654}
1655
1656/**
1657 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1658 * @ioc: per adapter object
1659 * @smid: system request message index
1660 *
1661 * Returns phys pointer to the low 32bit address of the sense buffer.
1662 */
1663__le32
1664mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1665{
1666 return cpu_to_le32(ioc->sense_dma +
1667 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1668}
1669
1670/**
1671 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1672 * @ioc: per adapter object
1673 * @phys_addr: lower 32 physical addr of the reply
1674 *
1675 * Converts 32bit lower physical addr into a virt address.
1676 */
1677void *
1678mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1679{
1680 if (!phys_addr)
1681 return NULL;
1682 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1683}
1684
1685/**
1686 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1687 * @ioc: per adapter object
1688 * @cb_idx: callback index
1689 *
1690 * Returns smid (zero is invalid)
1691 */
1692u16
1693mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1694{
1695 unsigned long flags;
1696 struct request_tracker *request;
1697 u16 smid;
1698
1699 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1700 if (list_empty(&ioc->internal_free_list)) {
1701 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1702 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1703 ioc->name, __func__);
1704 return 0;
1705 }
1706
1707 request = list_entry(ioc->internal_free_list.next,
1708 struct request_tracker, tracker_list);
1709 request->cb_idx = cb_idx;
1710 smid = request->smid;
1711 list_del(&request->tracker_list);
1712 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1713 return smid;
1714}
1715
1716/**
1717 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1718 * @ioc: per adapter object
1719 * @cb_idx: callback index
1720 * @scmd: pointer to scsi command object
1721 *
1722 * Returns smid (zero is invalid)
1723 */
1724u16
1725mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1726 struct scsi_cmnd *scmd)
1727{
1728 unsigned long flags;
1729 struct scsiio_tracker *request;
1730 u16 smid;
1731
1732 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1733 if (list_empty(&ioc->free_list)) {
1734 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1735 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1736 ioc->name, __func__);
1737 return 0;
1738 }
1739
1740 request = list_entry(ioc->free_list.next,
1741 struct scsiio_tracker, tracker_list);
1742 request->scmd = scmd;
1743 request->cb_idx = cb_idx;
1744 smid = request->smid;
1745 list_del(&request->tracker_list);
1746 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1747 return smid;
1748}
1749
1750/**
1751 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1752 * @ioc: per adapter object
1753 * @cb_idx: callback index
1754 *
1755 * Returns smid (zero is invalid)
1756 */
1757u16
1758mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1759{
1760 unsigned long flags;
1761 struct request_tracker *request;
1762 u16 smid;
1763
1764 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1765 if (list_empty(&ioc->hpr_free_list)) {
1766 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1767 return 0;
1768 }
1769
1770 request = list_entry(ioc->hpr_free_list.next,
1771 struct request_tracker, tracker_list);
1772 request->cb_idx = cb_idx;
1773 smid = request->smid;
1774 list_del(&request->tracker_list);
1775 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1776 return smid;
1777}
1778
1779
1780/**
1781 * mpt2sas_base_free_smid - put smid back on free_list
1782 * @ioc: per adapter object
1783 * @smid: system request message index
1784 *
1785 * Return nothing.
1786 */
1787void
1788mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1789{
1790 unsigned long flags;
1791 int i;
1792 struct chain_tracker *chain_req, *next;
1793
1794 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1795 if (smid < ioc->hi_priority_smid) {
1796 /* scsiio queue */
1797 i = smid - 1;
1798 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1799 list_for_each_entry_safe(chain_req, next,
1800 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1801 list_del_init(&chain_req->tracker_list);
1802 list_add(&chain_req->tracker_list,
1803 &ioc->free_chain_list);
1804 }
1805 }
1806 ioc->scsi_lookup[i].cb_idx = 0xFF;
1807 ioc->scsi_lookup[i].scmd = NULL;
1808 ioc->scsi_lookup[i].direct_io = 0;
1809 list_add(&ioc->scsi_lookup[i].tracker_list,
1810 &ioc->free_list);
1811 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1812
1813 /*
1814 * See _wait_for_commands_to_complete() call with regards
1815 * to this code.
1816 */
1817 if (ioc->shost_recovery && ioc->pending_io_count) {
1818 if (ioc->pending_io_count == 1)
1819 wake_up(&ioc->reset_wq);
1820 ioc->pending_io_count--;
1821 }
1822 return;
1823 } else if (smid < ioc->internal_smid) {
1824 /* hi-priority */
1825 i = smid - ioc->hi_priority_smid;
1826 ioc->hpr_lookup[i].cb_idx = 0xFF;
1827 list_add(&ioc->hpr_lookup[i].tracker_list,
1828 &ioc->hpr_free_list);
1829 } else if (smid <= ioc->hba_queue_depth) {
1830 /* internal queue */
1831 i = smid - ioc->internal_smid;
1832 ioc->internal_lookup[i].cb_idx = 0xFF;
1833 list_add(&ioc->internal_lookup[i].tracker_list,
1834 &ioc->internal_free_list);
1835 }
1836 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1837}
1838
1839/**
1840 * _base_writeq - 64 bit write to MMIO
1841 * @ioc: per adapter object
1842 * @b: data payload
1843 * @addr: address in MMIO space
1844 * @writeq_lock: spin lock
1845 *
1846 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1847 * care of 32 bit environment where its not quarenteed to send the entire word
1848 * in one transfer.
1849 */
1850#ifndef writeq
1851static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1852 spinlock_t *writeq_lock)
1853{
1854 unsigned long flags;
1855 __u64 data_out = cpu_to_le64(b);
1856
1857 spin_lock_irqsave(writeq_lock, flags);
1858 writel((u32)(data_out), addr);
1859 writel((u32)(data_out >> 32), (addr + 4));
1860 spin_unlock_irqrestore(writeq_lock, flags);
1861}
1862#else
1863static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1864 spinlock_t *writeq_lock)
1865{
1866 writeq(cpu_to_le64(b), addr);
1867}
1868#endif
1869
1870static inline u8
1871_base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1872{
1873 return ioc->cpu_msix_table[raw_smp_processor_id()];
1874}
1875
1876/**
1877 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1878 * @ioc: per adapter object
1879 * @smid: system request message index
1880 * @handle: device handle
1881 *
1882 * Return nothing.
1883 */
1884void
1885mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1886{
1887 Mpi2RequestDescriptorUnion_t descriptor;
1888 u64 *request = (u64 *)&descriptor;
1889
1890
1891 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1892 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1893 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1894 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1895 descriptor.SCSIIO.LMID = 0;
1896 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1897 &ioc->scsi_lookup_lock);
1898}
1899
1900
1901/**
1902 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1903 * @ioc: per adapter object
1904 * @smid: system request message index
1905 *
1906 * Return nothing.
1907 */
1908void
1909mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1910{
1911 Mpi2RequestDescriptorUnion_t descriptor;
1912 u64 *request = (u64 *)&descriptor;
1913
1914 descriptor.HighPriority.RequestFlags =
1915 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1916 descriptor.HighPriority.MSIxIndex = 0;
1917 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1918 descriptor.HighPriority.LMID = 0;
1919 descriptor.HighPriority.Reserved1 = 0;
1920 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1921 &ioc->scsi_lookup_lock);
1922}
1923
1924/**
1925 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1926 * @ioc: per adapter object
1927 * @smid: system request message index
1928 *
1929 * Return nothing.
1930 */
1931void
1932mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1933{
1934 Mpi2RequestDescriptorUnion_t descriptor;
1935 u64 *request = (u64 *)&descriptor;
1936
1937 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1938 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1939 descriptor.Default.SMID = cpu_to_le16(smid);
1940 descriptor.Default.LMID = 0;
1941 descriptor.Default.DescriptorTypeDependent = 0;
1942 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1943 &ioc->scsi_lookup_lock);
1944}
1945
1946/**
1947 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1948 * @ioc: per adapter object
1949 * @smid: system request message index
1950 * @io_index: value used to track the IO
1951 *
1952 * Return nothing.
1953 */
1954void
1955mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1956 u16 io_index)
1957{
1958 Mpi2RequestDescriptorUnion_t descriptor;
1959 u64 *request = (u64 *)&descriptor;
1960
1961 descriptor.SCSITarget.RequestFlags =
1962 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1963 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1964 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1965 descriptor.SCSITarget.LMID = 0;
1966 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1967 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1968 &ioc->scsi_lookup_lock);
1969}
1970
1971/**
1972 * _base_display_dell_branding - Disply branding string
1973 * @ioc: per adapter object
1974 *
1975 * Return nothing.
1976 */
1977static void
1978_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1979{
1980 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1981
1982 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1983 return;
1984
1985 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1986 switch (ioc->pdev->subsystem_device) {
1987 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1988 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1989 MPT2SAS_DELL_BRANDING_SIZE - 1);
1990 break;
1991 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1992 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1993 MPT2SAS_DELL_BRANDING_SIZE - 1);
1994 break;
1995 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1996 strncpy(dell_branding,
1997 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1998 MPT2SAS_DELL_BRANDING_SIZE - 1);
1999 break;
2000 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
2001 strncpy(dell_branding,
2002 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
2003 MPT2SAS_DELL_BRANDING_SIZE - 1);
2004 break;
2005 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
2006 strncpy(dell_branding,
2007 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
2008 MPT2SAS_DELL_BRANDING_SIZE - 1);
2009 break;
2010 case MPT2SAS_DELL_PERC_H200_SSDID:
2011 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
2012 MPT2SAS_DELL_BRANDING_SIZE - 1);
2013 break;
2014 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
2015 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
2016 MPT2SAS_DELL_BRANDING_SIZE - 1);
2017 break;
2018 default:
2019 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
2020 break;
2021 }
2022
2023 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
2024 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
2025 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
2026 ioc->pdev->subsystem_device);
2027}
2028
2029/**
2030 * _base_display_intel_branding - Display branding string
2031 * @ioc: per adapter object
2032 *
2033 * Return nothing.
2034 */
2035static void
2036_base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
2037{
2038 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
2039 return;
2040
2041 switch (ioc->pdev->device) {
2042 case MPI2_MFGPAGE_DEVID_SAS2008:
2043 switch (ioc->pdev->subsystem_device) {
2044 case MPT2SAS_INTEL_RMS2LL080_SSDID:
2045 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2046 MPT2SAS_INTEL_RMS2LL080_BRANDING);
2047 break;
2048 case MPT2SAS_INTEL_RMS2LL040_SSDID:
2049 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2050 MPT2SAS_INTEL_RMS2LL040_BRANDING);
2051 break;
2052 case MPT2SAS_INTEL_SSD910_SSDID:
2053 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2054 MPT2SAS_INTEL_SSD910_BRANDING);
2055 break;
2056 default:
2057 break;
2058 }
2059 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2060 switch (ioc->pdev->subsystem_device) {
2061 case MPT2SAS_INTEL_RS25GB008_SSDID:
2062 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2063 MPT2SAS_INTEL_RS25GB008_BRANDING);
2064 break;
2065 case MPT2SAS_INTEL_RMS25JB080_SSDID:
2066 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2067 MPT2SAS_INTEL_RMS25JB080_BRANDING);
2068 break;
2069 case MPT2SAS_INTEL_RMS25JB040_SSDID:
2070 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2071 MPT2SAS_INTEL_RMS25JB040_BRANDING);
2072 break;
2073 case MPT2SAS_INTEL_RMS25KB080_SSDID:
2074 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2075 MPT2SAS_INTEL_RMS25KB080_BRANDING);
2076 break;
2077 case MPT2SAS_INTEL_RMS25KB040_SSDID:
2078 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2079 MPT2SAS_INTEL_RMS25KB040_BRANDING);
2080 break;
2081 case MPT2SAS_INTEL_RMS25LB040_SSDID:
2082 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2083 MPT2SAS_INTEL_RMS25LB040_BRANDING);
2084 break;
2085 case MPT2SAS_INTEL_RMS25LB080_SSDID:
2086 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2087 MPT2SAS_INTEL_RMS25LB080_BRANDING);
2088 break;
2089 default:
2090 break;
2091 }
2092 default:
2093 break;
2094 }
2095}
2096
2097/**
2098 * _base_display_hp_branding - Display branding string
2099 * @ioc: per adapter object
2100 *
2101 * Return nothing.
2102 */
2103static void
2104_base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
2105{
2106 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
2107 return;
2108
2109 switch (ioc->pdev->device) {
2110 case MPI2_MFGPAGE_DEVID_SAS2004:
2111 switch (ioc->pdev->subsystem_device) {
2112 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2113 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2114 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2115 break;
2116 default:
2117 break;
2118 }
2119 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2120 switch (ioc->pdev->subsystem_device) {
2121 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2122 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2123 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2124 break;
2125 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2126 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2127 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2128 break;
2129 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2130 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2131 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2132 break;
2133 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2134 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2135 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2136 break;
2137 default:
2138 break;
2139 }
2140 default:
2141 break;
2142 }
2143}
2144
2145/**
2146 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2147 * @ioc: per adapter object
2148 *
2149 * Return nothing.
2150 */
2151static void
2152_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
2153{
2154 int i = 0;
2155 char desc[16];
2156 u32 iounit_pg1_flags;
2157 u32 bios_version;
2158
2159 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2160 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2161 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
2162 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2163 ioc->name, desc,
2164 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2165 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2166 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2167 ioc->facts.FWVersion.Word & 0x000000FF,
2168 ioc->pdev->revision,
2169 (bios_version & 0xFF000000) >> 24,
2170 (bios_version & 0x00FF0000) >> 16,
2171 (bios_version & 0x0000FF00) >> 8,
2172 bios_version & 0x000000FF);
2173
2174 _base_display_dell_branding(ioc);
2175 _base_display_intel_branding(ioc);
2176 _base_display_hp_branding(ioc);
2177
2178 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2179
2180 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2181 printk("Initiator");
2182 i++;
2183 }
2184
2185 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2186 printk("%sTarget", i ? "," : "");
2187 i++;
2188 }
2189
2190 i = 0;
2191 printk("), ");
2192 printk("Capabilities=(");
2193
2194 if (!ioc->hide_ir_msg) {
2195 if (ioc->facts.IOCCapabilities &
2196 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2197 printk("Raid");
2198 i++;
2199 }
2200 }
2201
2202 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2203 printk("%sTLR", i ? "," : "");
2204 i++;
2205 }
2206
2207 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2208 printk("%sMulticast", i ? "," : "");
2209 i++;
2210 }
2211
2212 if (ioc->facts.IOCCapabilities &
2213 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2214 printk("%sBIDI Target", i ? "," : "");
2215 i++;
2216 }
2217
2218 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2219 printk("%sEEDP", i ? "," : "");
2220 i++;
2221 }
2222
2223 if (ioc->facts.IOCCapabilities &
2224 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2225 printk("%sSnapshot Buffer", i ? "," : "");
2226 i++;
2227 }
2228
2229 if (ioc->facts.IOCCapabilities &
2230 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2231 printk("%sDiag Trace Buffer", i ? "," : "");
2232 i++;
2233 }
2234
2235 if (ioc->facts.IOCCapabilities &
2236 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2237 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
2238 i++;
2239 }
2240
2241 if (ioc->facts.IOCCapabilities &
2242 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2243 printk("%sTask Set Full", i ? "," : "");
2244 i++;
2245 }
2246
2247 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2248 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2249 printk("%sNCQ", i ? "," : "");
2250 i++;
2251 }
2252
2253 printk(")\n");
2254}
2255
2256/**
2257 * mpt2sas_base_update_missing_delay - change the missing delay timers
2258 * @ioc: per adapter object
2259 * @device_missing_delay: amount of time till device is reported missing
2260 * @io_missing_delay: interval IO is returned when there is a missing device
2261 *
2262 * Return nothing.
2263 *
2264 * Passed on the command line, this function will modify the device missing
2265 * delay, as well as the io missing delay. This should be called at driver
2266 * load time.
2267 */
2268void
2269mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2270 u16 device_missing_delay, u8 io_missing_delay)
2271{
2272 u16 dmd, dmd_new, dmd_orignal;
2273 u8 io_missing_delay_original;
2274 u16 sz;
2275 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2276 Mpi2ConfigReply_t mpi_reply;
2277 u8 num_phys = 0;
2278 u16 ioc_status;
2279
2280 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2281 if (!num_phys)
2282 return;
2283
2284 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2285 sizeof(Mpi2SasIOUnit1PhyData_t));
2286 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2287 if (!sas_iounit_pg1) {
2288 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2289 ioc->name, __FILE__, __LINE__, __func__);
2290 goto out;
2291 }
2292 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2293 sas_iounit_pg1, sz))) {
2294 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2295 ioc->name, __FILE__, __LINE__, __func__);
2296 goto out;
2297 }
2298 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2299 MPI2_IOCSTATUS_MASK;
2300 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2301 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2302 ioc->name, __FILE__, __LINE__, __func__);
2303 goto out;
2304 }
2305
2306 /* device missing delay */
2307 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2308 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2309 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2310 else
2311 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2312 dmd_orignal = dmd;
2313 if (device_missing_delay > 0x7F) {
2314 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2315 device_missing_delay;
2316 dmd = dmd / 16;
2317 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2318 } else
2319 dmd = device_missing_delay;
2320 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2321
2322 /* io missing delay */
2323 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2324 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2325
2326 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2327 sz)) {
2328 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2329 dmd_new = (dmd &
2330 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2331 else
2332 dmd_new =
2333 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2334 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2335 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2336 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2337 "new(%d)\n", ioc->name, io_missing_delay_original,
2338 io_missing_delay);
2339 ioc->device_missing_delay = dmd_new;
2340 ioc->io_missing_delay = io_missing_delay;
2341 }
2342
2343out:
2344 kfree(sas_iounit_pg1);
2345}
2346
2347/**
2348 * _base_static_config_pages - static start of day config pages
2349 * @ioc: per adapter object
2350 *
2351 * Return nothing.
2352 */
2353static void
2354_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2355{
2356 Mpi2ConfigReply_t mpi_reply;
2357 u32 iounit_pg1_flags;
2358
2359 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2360 if (ioc->ir_firmware)
2361 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2362 &ioc->manu_pg10);
2363 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2364 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2365 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2366 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2367 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2368 mpt2sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8);
2369 _base_display_ioc_capabilities(ioc);
2370
2371 /*
2372 * Enable task_set_full handling in iounit_pg1 when the
2373 * facts capabilities indicate that its supported.
2374 */
2375 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2376 if ((ioc->facts.IOCCapabilities &
2377 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2378 iounit_pg1_flags &=
2379 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2380 else
2381 iounit_pg1_flags |=
2382 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2383 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2384 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2385
2386 if (ioc->iounit_pg8.NumSensors)
2387 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors;
2388}
2389
2390/**
2391 * _base_release_memory_pools - release memory
2392 * @ioc: per adapter object
2393 *
2394 * Free memory allocated from _base_allocate_memory_pools.
2395 *
2396 * Return nothing.
2397 */
2398static void
2399_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2400{
2401 int i = 0;
2402 struct reply_post_struct *rps;
2403
2404 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2405 __func__));
2406
2407 if (ioc->request) {
2408 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2409 ioc->request, ioc->request_dma);
2410 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2411 ": free\n", ioc->name, ioc->request));
2412 ioc->request = NULL;
2413 }
2414
2415 if (ioc->sense) {
2416 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2417 if (ioc->sense_dma_pool)
2418 pci_pool_destroy(ioc->sense_dma_pool);
2419 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2420 ": free\n", ioc->name, ioc->sense));
2421 ioc->sense = NULL;
2422 }
2423
2424 if (ioc->reply) {
2425 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2426 if (ioc->reply_dma_pool)
2427 pci_pool_destroy(ioc->reply_dma_pool);
2428 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2429 ": free\n", ioc->name, ioc->reply));
2430 ioc->reply = NULL;
2431 }
2432
2433 if (ioc->reply_free) {
2434 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2435 ioc->reply_free_dma);
2436 if (ioc->reply_free_dma_pool)
2437 pci_pool_destroy(ioc->reply_free_dma_pool);
2438 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2439 "(0x%p): free\n", ioc->name, ioc->reply_free));
2440 ioc->reply_free = NULL;
2441 }
2442
2443 if (ioc->reply_post) {
2444 do {
2445 rps = &ioc->reply_post[i];
2446 if (rps->reply_post_free) {
2447 pci_pool_free(
2448 ioc->reply_post_free_dma_pool,
2449 rps->reply_post_free,
2450 rps->reply_post_free_dma);
2451 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2452 "reply_post_free_pool(0x%p): free\n",
2453 ioc->name, rps->reply_post_free));
2454 rps->reply_post_free = NULL;
2455 }
2456 } while (ioc->rdpq_array_enable &&
2457 (++i < ioc->reply_queue_count));
2458
2459 if (ioc->reply_post_free_dma_pool)
2460 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2461 kfree(ioc->reply_post);
2462 }
2463
2464 if (ioc->config_page) {
2465 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2466 "config_page(0x%p): free\n", ioc->name,
2467 ioc->config_page));
2468 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2469 ioc->config_page, ioc->config_page_dma);
2470 }
2471
2472 if (ioc->scsi_lookup) {
2473 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2474 ioc->scsi_lookup = NULL;
2475 }
2476 kfree(ioc->hpr_lookup);
2477 kfree(ioc->internal_lookup);
2478 if (ioc->chain_lookup) {
2479 for (i = 0; i < ioc->chain_depth; i++) {
2480 if (ioc->chain_lookup[i].chain_buffer)
2481 pci_pool_free(ioc->chain_dma_pool,
2482 ioc->chain_lookup[i].chain_buffer,
2483 ioc->chain_lookup[i].chain_buffer_dma);
2484 }
2485 if (ioc->chain_dma_pool)
2486 pci_pool_destroy(ioc->chain_dma_pool);
2487 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2488 ioc->chain_lookup = NULL;
2489 }
2490}
2491
2492
2493/**
2494 * _base_allocate_memory_pools - allocate start of day memory pools
2495 * @ioc: per adapter object
2496 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2497 *
2498 * Returns 0 success, anything else error
2499 */
2500static int
2501_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2502{
2503 struct mpt2sas_facts *facts;
2504 u16 max_sge_elements;
2505 u16 chains_needed_per_io;
2506 u32 sz, total_sz, reply_post_free_sz;
2507 u32 retry_sz;
2508 u16 max_request_credit;
2509 int i;
2510
2511 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2512 __func__));
2513
2514 retry_sz = 0;
2515 facts = &ioc->facts;
2516
2517 /* command line tunables for max sgl entries */
2518 if (max_sgl_entries != -1) {
2519 ioc->shost->sg_tablesize = min_t(unsigned short,
2520 max_sgl_entries, SCSI_MAX_SG_CHAIN_SEGMENTS);
2521 if (ioc->shost->sg_tablesize > MPT2SAS_SG_DEPTH)
2522 printk(MPT2SAS_WARN_FMT
2523 "sg_tablesize(%u) is bigger than kernel defined"
2524 " SCSI_MAX_SG_SEGMENTS(%u)\n", ioc->name,
2525 ioc->shost->sg_tablesize, MPT2SAS_SG_DEPTH);
2526 } else {
2527 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2528 }
2529
2530 /* command line tunables for max controller queue depth */
2531 if (max_queue_depth != -1 && max_queue_depth != 0) {
2532 max_request_credit = min_t(u16, max_queue_depth +
2533 ioc->hi_priority_depth + ioc->internal_depth,
2534 facts->RequestCredit);
2535 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
2536 max_request_credit = MAX_HBA_QUEUE_DEPTH;
2537 } else
2538 max_request_credit = min_t(u16, facts->RequestCredit,
2539 MAX_HBA_QUEUE_DEPTH);
2540
2541 ioc->hba_queue_depth = max_request_credit;
2542 ioc->hi_priority_depth = facts->HighPriorityCredit;
2543 ioc->internal_depth = ioc->hi_priority_depth + 5;
2544
2545 /* request frame size */
2546 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2547
2548 /* reply frame size */
2549 ioc->reply_sz = facts->ReplyFrameSize * 4;
2550
2551 retry_allocation:
2552 total_sz = 0;
2553 /* calculate number of sg elements left over in the 1st frame */
2554 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2555 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2556 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2557
2558 /* now do the same for a chain buffer */
2559 max_sge_elements = ioc->request_sz - ioc->sge_size;
2560 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2561
2562 ioc->chain_offset_value_for_main_message =
2563 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2564 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2565
2566 /*
2567 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2568 */
2569 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2570 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2571 + 1;
2572 if (chains_needed_per_io > facts->MaxChainDepth) {
2573 chains_needed_per_io = facts->MaxChainDepth;
2574 ioc->shost->sg_tablesize = min_t(u16,
2575 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2576 * chains_needed_per_io), ioc->shost->sg_tablesize);
2577 }
2578 ioc->chains_needed_per_io = chains_needed_per_io;
2579
2580 /* reply free queue sizing - taking into account for 64 FW events */
2581 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2582
2583 /* calculate reply descriptor post queue depth */
2584 ioc->reply_post_queue_depth = ioc->hba_queue_depth +
2585 ioc->reply_free_queue_depth + 1;
2586 /* align the reply post queue on the next 16 count boundary */
2587 if (ioc->reply_post_queue_depth % 16)
2588 ioc->reply_post_queue_depth += 16 -
2589 (ioc->reply_post_queue_depth % 16);
2590
2591
2592 if (ioc->reply_post_queue_depth >
2593 facts->MaxReplyDescriptorPostQueueDepth) {
2594 ioc->reply_post_queue_depth =
2595 facts->MaxReplyDescriptorPostQueueDepth -
2596 (facts->MaxReplyDescriptorPostQueueDepth % 16);
2597 ioc->hba_queue_depth =
2598 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
2599 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2600 }
2601
2602 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2603 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2604 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2605 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2606 ioc->chains_needed_per_io));
2607
2608 /* reply post queue, 16 byte align */
2609 reply_post_free_sz = ioc->reply_post_queue_depth *
2610 sizeof(Mpi2DefaultReplyDescriptor_t);
2611
2612 sz = reply_post_free_sz;
2613 if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
2614 sz *= ioc->reply_queue_count;
2615
2616 ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
2617 (ioc->reply_queue_count):1,
2618 sizeof(struct reply_post_struct), GFP_KERNEL);
2619
2620 if (!ioc->reply_post) {
2621 printk(MPT2SAS_ERR_FMT "reply_post_free pool: kcalloc failed\n",
2622 ioc->name);
2623 goto out;
2624 }
2625 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2626 ioc->pdev, sz, 16, 0);
2627 if (!ioc->reply_post_free_dma_pool) {
2628 printk(MPT2SAS_ERR_FMT
2629 "reply_post_free pool: pci_pool_create failed\n",
2630 ioc->name);
2631 goto out;
2632 }
2633 i = 0;
2634 do {
2635 ioc->reply_post[i].reply_post_free =
2636 pci_pool_alloc(ioc->reply_post_free_dma_pool,
2637 GFP_KERNEL,
2638 &ioc->reply_post[i].reply_post_free_dma);
2639 if (!ioc->reply_post[i].reply_post_free) {
2640 printk(MPT2SAS_ERR_FMT
2641 "reply_post_free pool: pci_pool_alloc failed\n",
2642 ioc->name);
2643 goto out;
2644 }
2645 memset(ioc->reply_post[i].reply_post_free, 0, sz);
2646 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2647 "reply post free pool (0x%p): depth(%d),"
2648 "element_size(%d), pool_size(%d kB)\n", ioc->name,
2649 ioc->reply_post[i].reply_post_free,
2650 ioc->reply_post_queue_depth, 8, sz/1024));
2651 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2652 "reply_post_free_dma = (0x%llx)\n", ioc->name,
2653 (unsigned long long)
2654 ioc->reply_post[i].reply_post_free_dma));
2655 total_sz += sz;
2656 } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
2657
2658 if (ioc->dma_mask == 64) {
2659 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
2660 printk(MPT2SAS_WARN_FMT
2661 "no suitable consistent DMA mask for %s\n",
2662 ioc->name, pci_name(ioc->pdev));
2663 goto out;
2664 }
2665 }
2666
2667 ioc->scsiio_depth = ioc->hba_queue_depth -
2668 ioc->hi_priority_depth - ioc->internal_depth;
2669
2670 /* set the scsi host can_queue depth
2671 * with some internal commands that could be outstanding
2672 */
2673 ioc->shost->can_queue = ioc->scsiio_depth;
2674 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2675 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2676
2677 /* contiguous pool for request and chains, 16 byte align, one extra "
2678 * "frame for smid=0
2679 */
2680 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2681 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2682
2683 /* hi-priority queue */
2684 sz += (ioc->hi_priority_depth * ioc->request_sz);
2685
2686 /* internal queue */
2687 sz += (ioc->internal_depth * ioc->request_sz);
2688
2689 ioc->request_dma_sz = sz;
2690 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2691 if (!ioc->request) {
2692 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2693 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2694 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2695 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2696 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2697 goto out;
2698 retry_sz += 64;
2699 ioc->hba_queue_depth = max_request_credit - retry_sz;
2700 goto retry_allocation;
2701 }
2702
2703 if (retry_sz)
2704 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2705 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2706 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2707 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2708
2709
2710 /* hi-priority queue */
2711 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2712 ioc->request_sz);
2713 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2714 ioc->request_sz);
2715
2716 /* internal queue */
2717 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2718 ioc->request_sz);
2719 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2720 ioc->request_sz);
2721
2722
2723 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2724 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2725 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2726 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2727 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2728 ioc->name, (unsigned long long) ioc->request_dma));
2729 total_sz += sz;
2730
2731 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2732 ioc->scsi_lookup_pages = get_order(sz);
2733 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2734 GFP_KERNEL, ioc->scsi_lookup_pages);
2735 if (!ioc->scsi_lookup) {
2736 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2737 "sz(%d)\n", ioc->name, (int)sz);
2738 goto out;
2739 }
2740
2741 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2742 "depth(%d)\n", ioc->name, ioc->request,
2743 ioc->scsiio_depth));
2744
2745 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
2746 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2747 ioc->chain_pages = get_order(sz);
2748
2749 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2750 GFP_KERNEL, ioc->chain_pages);
2751 if (!ioc->chain_lookup) {
2752 printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
2753 "sz(%d)\n", ioc->name, (int)sz);
2754 goto out;
2755 }
2756 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2757 ioc->request_sz, 16, 0);
2758 if (!ioc->chain_dma_pool) {
2759 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2760 "failed\n", ioc->name);
2761 goto out;
2762 }
2763 for (i = 0; i < ioc->chain_depth; i++) {
2764 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2765 ioc->chain_dma_pool , GFP_KERNEL,
2766 &ioc->chain_lookup[i].chain_buffer_dma);
2767 if (!ioc->chain_lookup[i].chain_buffer) {
2768 ioc->chain_depth = i;
2769 goto chain_done;
2770 }
2771 total_sz += ioc->request_sz;
2772 }
2773chain_done:
2774 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2775 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2776 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2777 ioc->request_sz))/1024));
2778
2779 /* initialize hi-priority queue smid's */
2780 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2781 sizeof(struct request_tracker), GFP_KERNEL);
2782 if (!ioc->hpr_lookup) {
2783 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2784 ioc->name);
2785 goto out;
2786 }
2787 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2788 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2789 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2790 ioc->hi_priority_depth, ioc->hi_priority_smid));
2791
2792 /* initialize internal queue smid's */
2793 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2794 sizeof(struct request_tracker), GFP_KERNEL);
2795 if (!ioc->internal_lookup) {
2796 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2797 ioc->name);
2798 goto out;
2799 }
2800 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2801 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2802 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2803 ioc->internal_depth, ioc->internal_smid));
2804
2805 /* sense buffers, 4 byte align */
2806 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2807 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2808 0);
2809 if (!ioc->sense_dma_pool) {
2810 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2811 ioc->name);
2812 goto out;
2813 }
2814 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2815 &ioc->sense_dma);
2816 if (!ioc->sense) {
2817 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2818 ioc->name);
2819 goto out;
2820 }
2821 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2822 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2823 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2824 SCSI_SENSE_BUFFERSIZE, sz/1024));
2825 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2826 ioc->name, (unsigned long long)ioc->sense_dma));
2827 total_sz += sz;
2828
2829 /* reply pool, 4 byte align */
2830 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2831 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2832 0);
2833 if (!ioc->reply_dma_pool) {
2834 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2835 ioc->name);
2836 goto out;
2837 }
2838 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2839 &ioc->reply_dma);
2840 if (!ioc->reply) {
2841 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2842 ioc->name);
2843 goto out;
2844 }
2845 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2846 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2847 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2848 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2849 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2850 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2851 ioc->name, (unsigned long long)ioc->reply_dma));
2852 total_sz += sz;
2853
2854 /* reply free queue, 16 byte align */
2855 sz = ioc->reply_free_queue_depth * 4;
2856 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2857 ioc->pdev, sz, 16, 0);
2858 if (!ioc->reply_free_dma_pool) {
2859 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2860 "failed\n", ioc->name);
2861 goto out;
2862 }
2863 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2864 &ioc->reply_free_dma);
2865 if (!ioc->reply_free) {
2866 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2867 "failed\n", ioc->name);
2868 goto out;
2869 }
2870 memset(ioc->reply_free, 0, sz);
2871 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2872 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2873 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2874 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2875 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2876 total_sz += sz;
2877
2878 ioc->config_page_sz = 512;
2879 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2880 ioc->config_page_sz, &ioc->config_page_dma);
2881 if (!ioc->config_page) {
2882 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2883 "failed\n", ioc->name);
2884 goto out;
2885 }
2886 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2887 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2888 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2889 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2890 total_sz += ioc->config_page_sz;
2891
2892 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2893 ioc->name, total_sz/1024);
2894 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2895 "Max Controller Queue Depth(%d)\n",
2896 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2897 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2898 ioc->name, ioc->shost->sg_tablesize);
2899 return 0;
2900
2901 out:
2902 return -ENOMEM;
2903}
2904
2905
2906/**
2907 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2908 * @ioc: Pointer to MPT_ADAPTER structure
2909 * @cooked: Request raw or cooked IOC state
2910 *
2911 * Returns all IOC Doorbell register bits if cooked==0, else just the
2912 * Doorbell bits in MPI_IOC_STATE_MASK.
2913 */
2914u32
2915mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2916{
2917 u32 s, sc;
2918
2919 s = readl(&ioc->chip->Doorbell);
2920 sc = s & MPI2_IOC_STATE_MASK;
2921 return cooked ? sc : s;
2922}
2923
2924/**
2925 * _base_wait_on_iocstate - waiting on a particular ioc state
2926 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2927 * @timeout: timeout in second
2928 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2929 *
2930 * Returns 0 for success, non-zero for failure.
2931 */
2932static int
2933_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2934 int sleep_flag)
2935{
2936 u32 count, cntdn;
2937 u32 current_state;
2938
2939 count = 0;
2940 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2941 do {
2942 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2943 if (current_state == ioc_state)
2944 return 0;
2945 if (count && current_state == MPI2_IOC_STATE_FAULT)
2946 break;
2947 if (sleep_flag == CAN_SLEEP)
2948 msleep(1);
2949 else
2950 udelay(500);
2951 count++;
2952 } while (--cntdn);
2953
2954 return current_state;
2955}
2956
2957/**
2958 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2959 * a write to the doorbell)
2960 * @ioc: per adapter object
2961 * @timeout: timeout in second
2962 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2963 *
2964 * Returns 0 for success, non-zero for failure.
2965 *
2966 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2967 */
2968static int
2969_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2970 int sleep_flag)
2971{
2972 u32 cntdn, count;
2973 u32 int_status;
2974
2975 count = 0;
2976 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2977 do {
2978 int_status = readl(&ioc->chip->HostInterruptStatus);
2979 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2980 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2981 "successful count(%d), timeout(%d)\n", ioc->name,
2982 __func__, count, timeout));
2983 return 0;
2984 }
2985 if (sleep_flag == CAN_SLEEP)
2986 msleep(1);
2987 else
2988 udelay(500);
2989 count++;
2990 } while (--cntdn);
2991
2992 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2993 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2994 return -EFAULT;
2995}
2996
2997/**
2998 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2999 * @ioc: per adapter object
3000 * @timeout: timeout in second
3001 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3002 *
3003 * Returns 0 for success, non-zero for failure.
3004 *
3005 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3006 * doorbell.
3007 */
3008static int
3009_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
3010 int sleep_flag)
3011{
3012 u32 cntdn, count;
3013 u32 int_status;
3014 u32 doorbell;
3015
3016 count = 0;
3017 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3018 do {
3019 int_status = readl(&ioc->chip->HostInterruptStatus);
3020 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
3021 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
3022 "successful count(%d), timeout(%d)\n", ioc->name,
3023 __func__, count, timeout));
3024 return 0;
3025 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3026 doorbell = readl(&ioc->chip->Doorbell);
3027 if ((doorbell & MPI2_IOC_STATE_MASK) ==
3028 MPI2_IOC_STATE_FAULT) {
3029 mpt2sas_base_fault_info(ioc , doorbell);
3030 return -EFAULT;
3031 }
3032 } else if (int_status == 0xFFFFFFFF)
3033 goto out;
3034
3035 if (sleep_flag == CAN_SLEEP)
3036 msleep(1);
3037 else
3038 udelay(500);
3039 count++;
3040 } while (--cntdn);
3041
3042 out:
3043 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
3044 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
3045 return -EFAULT;
3046}
3047
3048/**
3049 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3050 * @ioc: per adapter object
3051 * @timeout: timeout in second
3052 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3053 *
3054 * Returns 0 for success, non-zero for failure.
3055 *
3056 */
3057static int
3058_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
3059 int sleep_flag)
3060{
3061 u32 cntdn, count;
3062 u32 doorbell_reg;
3063
3064 count = 0;
3065 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3066 do {
3067 doorbell_reg = readl(&ioc->chip->Doorbell);
3068 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
3069 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
3070 "successful count(%d), timeout(%d)\n", ioc->name,
3071 __func__, count, timeout));
3072 return 0;
3073 }
3074 if (sleep_flag == CAN_SLEEP)
3075 msleep(1);
3076 else
3077 udelay(500);
3078 count++;
3079 } while (--cntdn);
3080
3081 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
3082 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
3083 return -EFAULT;
3084}
3085
3086/**
3087 * _base_send_ioc_reset - send doorbell reset
3088 * @ioc: per adapter object
3089 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3090 * @timeout: timeout in second
3091 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3092 *
3093 * Returns 0 for success, non-zero for failure.
3094 */
3095static int
3096_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
3097 int sleep_flag)
3098{
3099 u32 ioc_state;
3100 int r = 0;
3101
3102 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
3103 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
3104 ioc->name, __func__);
3105 return -EFAULT;
3106 }
3107
3108 if (!(ioc->facts.IOCCapabilities &
3109 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3110 return -EFAULT;
3111
3112 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
3113
3114 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3115 &ioc->chip->Doorbell);
3116 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3117 r = -EFAULT;
3118 goto out;
3119 }
3120 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3121 timeout, sleep_flag);
3122 if (ioc_state) {
3123 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3124 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3125 r = -EFAULT;
3126 goto out;
3127 }
3128 out:
3129 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
3130 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3131 return r;
3132}
3133
3134/**
3135 * _base_handshake_req_reply_wait - send request thru doorbell interface
3136 * @ioc: per adapter object
3137 * @request_bytes: request length
3138 * @request: pointer having request payload
3139 * @reply_bytes: reply length
3140 * @reply: pointer to reply payload
3141 * @timeout: timeout in second
3142 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3143 *
3144 * Returns 0 for success, non-zero for failure.
3145 */
3146static int
3147_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
3148 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3149{
3150 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3151 int i;
3152 u8 failed;
3153 u16 dummy;
3154 __le32 *mfp;
3155
3156 /* make sure doorbell is not in use */
3157 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3158 printk(MPT2SAS_ERR_FMT "doorbell is in use "
3159 " (line=%d)\n", ioc->name, __LINE__);
3160 return -EFAULT;
3161 }
3162
3163 /* clear pending doorbell interrupts from previous state changes */
3164 if (readl(&ioc->chip->HostInterruptStatus) &
3165 MPI2_HIS_IOC2SYS_DB_STATUS)
3166 writel(0, &ioc->chip->HostInterruptStatus);
3167
3168 /* send message to ioc */
3169 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3170 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3171 &ioc->chip->Doorbell);
3172
3173 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3174 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3175 "int failed (line=%d)\n", ioc->name, __LINE__);
3176 return -EFAULT;
3177 }
3178 writel(0, &ioc->chip->HostInterruptStatus);
3179
3180 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3181 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3182 "ack failed (line=%d)\n", ioc->name, __LINE__);
3183 return -EFAULT;
3184 }
3185
3186 /* send message 32-bits at a time */
3187 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3188 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3189 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3190 failed = 1;
3191 }
3192
3193 if (failed) {
3194 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3195 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3196 return -EFAULT;
3197 }
3198
3199 /* now wait for the reply */
3200 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3201 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3202 "int failed (line=%d)\n", ioc->name, __LINE__);
3203 return -EFAULT;
3204 }
3205
3206 /* read the first two 16-bits, it gives the total length of the reply */
3207 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3208 & MPI2_DOORBELL_DATA_MASK);
3209 writel(0, &ioc->chip->HostInterruptStatus);
3210 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3211 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3212 "int failed (line=%d)\n", ioc->name, __LINE__);
3213 return -EFAULT;
3214 }
3215 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3216 & MPI2_DOORBELL_DATA_MASK);
3217 writel(0, &ioc->chip->HostInterruptStatus);
3218
3219 for (i = 2; i < default_reply->MsgLength * 2; i++) {
3220 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3221 printk(MPT2SAS_ERR_FMT "doorbell "
3222 "handshake int failed (line=%d)\n", ioc->name,
3223 __LINE__);
3224 return -EFAULT;
3225 }
3226 if (i >= reply_bytes/2) /* overflow case */
3227 dummy = readl(&ioc->chip->Doorbell);
3228 else
3229 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3230 & MPI2_DOORBELL_DATA_MASK);
3231 writel(0, &ioc->chip->HostInterruptStatus);
3232 }
3233
3234 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3235 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3236 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3237 " (line=%d)\n", ioc->name, __LINE__));
3238 }
3239 writel(0, &ioc->chip->HostInterruptStatus);
3240
3241 if (ioc->logging_level & MPT_DEBUG_INIT) {
3242 mfp = (__le32 *)reply;
3243 printk(KERN_INFO "\toffset:data\n");
3244 for (i = 0; i < reply_bytes/4; i++)
3245 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3246 le32_to_cpu(mfp[i]));
3247 }
3248 return 0;
3249}
3250
3251/**
3252 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
3253 * @ioc: per adapter object
3254 * @mpi_reply: the reply payload from FW
3255 * @mpi_request: the request payload sent to FW
3256 *
3257 * The SAS IO Unit Control Request message allows the host to perform low-level
3258 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3259 * to obtain the IOC assigned device handles for a device if it has other
3260 * identifying information about the device, in addition allows the host to
3261 * remove IOC resources associated with the device.
3262 *
3263 * Returns 0 for success, non-zero for failure.
3264 */
3265int
3266mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3267 Mpi2SasIoUnitControlReply_t *mpi_reply,
3268 Mpi2SasIoUnitControlRequest_t *mpi_request)
3269{
3270 u16 smid;
3271 u32 ioc_state;
3272 unsigned long timeleft;
3273 bool issue_reset = false;
3274 int rc;
3275 void *request;
3276 u16 wait_state_count;
3277
3278 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3279 __func__));
3280
3281 mutex_lock(&ioc->base_cmds.mutex);
3282
3283 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3284 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3285 ioc->name, __func__);
3286 rc = -EAGAIN;
3287 goto out;
3288 }
3289
3290 wait_state_count = 0;
3291 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3292 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3293 if (wait_state_count++ == 10) {
3294 printk(MPT2SAS_ERR_FMT
3295 "%s: failed due to ioc not operational\n",
3296 ioc->name, __func__);
3297 rc = -EFAULT;
3298 goto out;
3299 }
3300 ssleep(1);
3301 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3302 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3303 "operational state(count=%d)\n", ioc->name,
3304 __func__, wait_state_count);
3305 }
3306
3307 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3308 if (!smid) {
3309 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3310 ioc->name, __func__);
3311 rc = -EAGAIN;
3312 goto out;
3313 }
3314
3315 rc = 0;
3316 ioc->base_cmds.status = MPT2_CMD_PENDING;
3317 request = mpt2sas_base_get_msg_frame(ioc, smid);
3318 ioc->base_cmds.smid = smid;
3319 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3320 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3321 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3322 ioc->ioc_link_reset_in_progress = 1;
3323 init_completion(&ioc->base_cmds.done);
3324 mpt2sas_base_put_smid_default(ioc, smid);
3325 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3326 msecs_to_jiffies(10000));
3327 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3328 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3329 ioc->ioc_link_reset_in_progress)
3330 ioc->ioc_link_reset_in_progress = 0;
3331 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3332 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3333 ioc->name, __func__);
3334 _debug_dump_mf(mpi_request,
3335 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3336 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3337 issue_reset = true;
3338 goto issue_host_reset;
3339 }
3340 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3341 memcpy(mpi_reply, ioc->base_cmds.reply,
3342 sizeof(Mpi2SasIoUnitControlReply_t));
3343 else
3344 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3345 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3346 goto out;
3347
3348 issue_host_reset:
3349 if (issue_reset)
3350 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3351 FORCE_BIG_HAMMER);
3352 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3353 rc = -EFAULT;
3354 out:
3355 mutex_unlock(&ioc->base_cmds.mutex);
3356 return rc;
3357}
3358
3359
3360/**
3361 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3362 * @ioc: per adapter object
3363 * @mpi_reply: the reply payload from FW
3364 * @mpi_request: the request payload sent to FW
3365 *
3366 * The SCSI Enclosure Processor request message causes the IOC to
3367 * communicate with SES devices to control LED status signals.
3368 *
3369 * Returns 0 for success, non-zero for failure.
3370 */
3371int
3372mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3373 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3374{
3375 u16 smid;
3376 u32 ioc_state;
3377 unsigned long timeleft;
3378 bool issue_reset = false;
3379 int rc;
3380 void *request;
3381 u16 wait_state_count;
3382
3383 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3384 __func__));
3385
3386 mutex_lock(&ioc->base_cmds.mutex);
3387
3388 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3389 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3390 ioc->name, __func__);
3391 rc = -EAGAIN;
3392 goto out;
3393 }
3394
3395 wait_state_count = 0;
3396 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3397 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3398 if (wait_state_count++ == 10) {
3399 printk(MPT2SAS_ERR_FMT
3400 "%s: failed due to ioc not operational\n",
3401 ioc->name, __func__);
3402 rc = -EFAULT;
3403 goto out;
3404 }
3405 ssleep(1);
3406 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3407 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3408 "operational state(count=%d)\n", ioc->name,
3409 __func__, wait_state_count);
3410 }
3411
3412 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3413 if (!smid) {
3414 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3415 ioc->name, __func__);
3416 rc = -EAGAIN;
3417 goto out;
3418 }
3419
3420 rc = 0;
3421 ioc->base_cmds.status = MPT2_CMD_PENDING;
3422 request = mpt2sas_base_get_msg_frame(ioc, smid);
3423 ioc->base_cmds.smid = smid;
3424 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3425 init_completion(&ioc->base_cmds.done);
3426 mpt2sas_base_put_smid_default(ioc, smid);
3427 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3428 msecs_to_jiffies(10000));
3429 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3430 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3431 ioc->name, __func__);
3432 _debug_dump_mf(mpi_request,
3433 sizeof(Mpi2SepRequest_t)/4);
3434 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3435 issue_reset = true;
3436 goto issue_host_reset;
3437 }
3438 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3439 memcpy(mpi_reply, ioc->base_cmds.reply,
3440 sizeof(Mpi2SepReply_t));
3441 else
3442 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3443 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3444 goto out;
3445
3446 issue_host_reset:
3447 if (issue_reset)
3448 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3449 FORCE_BIG_HAMMER);
3450 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3451 rc = -EFAULT;
3452 out:
3453 mutex_unlock(&ioc->base_cmds.mutex);
3454 return rc;
3455}
3456
3457/**
3458 * _base_get_port_facts - obtain port facts reply and save in ioc
3459 * @ioc: per adapter object
3460 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3461 *
3462 * Returns 0 for success, non-zero for failure.
3463 */
3464static int
3465_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3466{
3467 Mpi2PortFactsRequest_t mpi_request;
3468 Mpi2PortFactsReply_t mpi_reply;
3469 struct mpt2sas_port_facts *pfacts;
3470 int mpi_reply_sz, mpi_request_sz, r;
3471
3472 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3473 __func__));
3474
3475 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3476 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3477 memset(&mpi_request, 0, mpi_request_sz);
3478 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3479 mpi_request.PortNumber = port;
3480 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3481 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3482
3483 if (r != 0) {
3484 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3485 ioc->name, __func__, r);
3486 return r;
3487 }
3488
3489 pfacts = &ioc->pfacts[port];
3490 memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
3491 pfacts->PortNumber = mpi_reply.PortNumber;
3492 pfacts->VP_ID = mpi_reply.VP_ID;
3493 pfacts->VF_ID = mpi_reply.VF_ID;
3494 pfacts->MaxPostedCmdBuffers =
3495 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3496
3497 return 0;
3498}
3499
3500/**
3501 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
3502 * @ioc: per adapter object
3503 * @timeout:
3504 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3505 *
3506 * Returns 0 for success, non-zero for failure.
3507 */
3508static int
3509_base_wait_for_iocstate(struct MPT2SAS_ADAPTER *ioc, int timeout,
3510 int sleep_flag)
3511{
3512 u32 ioc_state, doorbell;
3513 int rc;
3514
3515 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3516 __func__));
3517
3518 if (ioc->pci_error_recovery)
3519 return 0;
3520
3521 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
3522 ioc_state = doorbell & MPI2_IOC_STATE_MASK;
3523 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3524 ioc->name, __func__, ioc_state));
3525
3526 switch (ioc_state) {
3527 case MPI2_IOC_STATE_READY:
3528 case MPI2_IOC_STATE_OPERATIONAL:
3529 return 0;
3530 }
3531
3532 if (doorbell & MPI2_DOORBELL_USED) {
3533 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT
3534 "unexpected doorbell activ!e\n", ioc->name));
3535 goto issue_diag_reset;
3536 }
3537
3538 if (ioc_state == MPI2_IOC_STATE_FAULT) {
3539 mpt2sas_base_fault_info(ioc, doorbell &
3540 MPI2_DOORBELL_DATA_MASK);
3541 goto issue_diag_reset;
3542 }
3543
3544 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3545 timeout, sleep_flag);
3546 if (ioc_state) {
3547 printk(MPT2SAS_ERR_FMT
3548 "%s: failed going to ready state (ioc_state=0x%x)\n",
3549 ioc->name, __func__, ioc_state);
3550 return -EFAULT;
3551 }
3552
3553 issue_diag_reset:
3554 rc = _base_diag_reset(ioc, sleep_flag);
3555 return rc;
3556}
3557
3558/**
3559 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3560 * @ioc: per adapter object
3561 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3562 *
3563 * Returns 0 for success, non-zero for failure.
3564 */
3565static int
3566_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3567{
3568 Mpi2IOCFactsRequest_t mpi_request;
3569 Mpi2IOCFactsReply_t mpi_reply;
3570 struct mpt2sas_facts *facts;
3571 int mpi_reply_sz, mpi_request_sz, r;
3572
3573 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3574 __func__));
3575
3576 r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
3577 if (r) {
3578 printk(MPT2SAS_ERR_FMT "%s: failed getting to correct state\n",
3579 ioc->name, __func__);
3580 return r;
3581 }
3582
3583 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3584 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3585 memset(&mpi_request, 0, mpi_request_sz);
3586 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3587 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3588 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3589
3590 if (r != 0) {
3591 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3592 ioc->name, __func__, r);
3593 return r;
3594 }
3595
3596 facts = &ioc->facts;
3597 memset(facts, 0, sizeof(struct mpt2sas_facts));
3598 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3599 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3600 facts->VP_ID = mpi_reply.VP_ID;
3601 facts->VF_ID = mpi_reply.VF_ID;
3602 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3603 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3604 facts->WhoInit = mpi_reply.WhoInit;
3605 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3606 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
3607 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3608 facts->MaxReplyDescriptorPostQueueDepth =
3609 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3610 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3611 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3612 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3613 ioc->ir_firmware = 1;
3614 if ((facts->IOCCapabilities &
3615 MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
3616 ioc->rdpq_array_capable = 1;
3617 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3618 facts->IOCRequestFrameSize =
3619 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3620 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3621 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3622 ioc->shost->max_id = -1;
3623 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3624 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3625 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3626 facts->HighPriorityCredit =
3627 le16_to_cpu(mpi_reply.HighPriorityCredit);
3628 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3629 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3630
3631 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3632 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3633 facts->MaxChainDepth));
3634 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3635 "reply frame size(%d)\n", ioc->name,
3636 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3637 return 0;
3638}
3639
3640/**
3641 * _base_send_ioc_init - send ioc_init to firmware
3642 * @ioc: per adapter object
3643 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3644 *
3645 * Returns 0 for success, non-zero for failure.
3646 */
3647static int
3648_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3649{
3650 Mpi2IOCInitRequest_t mpi_request;
3651 Mpi2IOCInitReply_t mpi_reply;
3652 int i, r = 0;
3653 struct timeval current_time;
3654 u16 ioc_status;
3655 u32 reply_post_free_array_sz = 0;
3656 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
3657 dma_addr_t reply_post_free_array_dma;
3658
3659 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3660 __func__));
3661
3662 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3663 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3664 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3665 mpi_request.VF_ID = 0; /* TODO */
3666 mpi_request.VP_ID = 0;
3667 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3668 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3669
3670 if (_base_is_controller_msix_enabled(ioc))
3671 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3672 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3673 mpi_request.ReplyDescriptorPostQueueDepth =
3674 cpu_to_le16(ioc->reply_post_queue_depth);
3675 mpi_request.ReplyFreeQueueDepth =
3676 cpu_to_le16(ioc->reply_free_queue_depth);
3677
3678 mpi_request.SenseBufferAddressHigh =
3679 cpu_to_le32((u64)ioc->sense_dma >> 32);
3680 mpi_request.SystemReplyAddressHigh =
3681 cpu_to_le32((u64)ioc->reply_dma >> 32);
3682 mpi_request.SystemRequestFrameBaseAddress =
3683 cpu_to_le64((u64)ioc->request_dma);
3684 mpi_request.ReplyFreeQueueAddress =
3685 cpu_to_le64((u64)ioc->reply_free_dma);
3686
3687 if (ioc->rdpq_array_enable) {
3688 reply_post_free_array_sz = ioc->reply_queue_count *
3689 sizeof(Mpi2IOCInitRDPQArrayEntry);
3690 reply_post_free_array = pci_alloc_consistent(ioc->pdev,
3691 reply_post_free_array_sz, &reply_post_free_array_dma);
3692 if (!reply_post_free_array) {
3693 printk(MPT2SAS_ERR_FMT
3694 "reply_post_free_array: pci_alloc_consistent failed\n",
3695 ioc->name);
3696 r = -ENOMEM;
3697 goto out;
3698 }
3699 memset(reply_post_free_array, 0, reply_post_free_array_sz);
3700 for (i = 0; i < ioc->reply_queue_count; i++)
3701 reply_post_free_array[i].RDPQBaseAddress =
3702 cpu_to_le64(
3703 (u64)ioc->reply_post[i].reply_post_free_dma);
3704 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
3705 mpi_request.ReplyDescriptorPostQueueAddress =
3706 cpu_to_le64((u64)reply_post_free_array_dma);
3707 } else {
3708 mpi_request.ReplyDescriptorPostQueueAddress =
3709 cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
3710 }
3711
3712 /* This time stamp specifies number of milliseconds
3713 * since epoch ~ midnight January 1, 1970.
3714 */
3715 do_gettimeofday(&current_time);
3716 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3717 (current_time.tv_usec / 1000));
3718
3719 if (ioc->logging_level & MPT_DEBUG_INIT) {
3720 __le32 *mfp;
3721 int i;
3722
3723 mfp = (__le32 *)&mpi_request;
3724 printk(KERN_INFO "\toffset:data\n");
3725 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3726 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3727 le32_to_cpu(mfp[i]));
3728 }
3729
3730 r = _base_handshake_req_reply_wait(ioc,
3731 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3732 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3733 sleep_flag);
3734
3735 if (r != 0) {
3736 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3737 ioc->name, __func__, r);
3738 goto out;
3739 }
3740
3741 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3742 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3743 mpi_reply.IOCLogInfo) {
3744 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3745 r = -EIO;
3746 }
3747
3748out:
3749 if (reply_post_free_array)
3750 pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
3751 reply_post_free_array,
3752 reply_post_free_array_dma);
3753 return r;
3754}
3755
3756/**
3757 * mpt2sas_port_enable_done - command completion routine for port enable
3758 * @ioc: per adapter object
3759 * @smid: system request message index
3760 * @msix_index: MSIX table index supplied by the OS
3761 * @reply: reply message frame(lower 32bit addr)
3762 *
3763 * Return 1 meaning mf should be freed from _base_interrupt
3764 * 0 means the mf is freed from this function.
3765 */
3766u8
3767mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
3768 u32 reply)
3769{
3770 MPI2DefaultReply_t *mpi_reply;
3771 u16 ioc_status;
3772
3773 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
3774 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
3775 return 1;
3776
3777 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
3778 return 1;
3779
3780 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
3781 if (mpi_reply) {
3782 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
3783 memcpy(ioc->port_enable_cmds.reply, mpi_reply,
3784 mpi_reply->MsgLength*4);
3785 }
3786 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
3787
3788 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3789
3790 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
3791 ioc->port_enable_failed = 1;
3792
3793 if (ioc->is_driver_loading) {
3794 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
3795 mpt2sas_port_enable_complete(ioc);
3796 return 1;
3797 } else {
3798 ioc->start_scan_failed = ioc_status;
3799 ioc->start_scan = 0;
3800 return 1;
3801 }
3802 }
3803 complete(&ioc->port_enable_cmds.done);
3804 return 1;
3805}
3806
3807
3808/**
3809 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3810 * @ioc: per adapter object
3811 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3812 *
3813 * Returns 0 for success, non-zero for failure.
3814 */
3815static int
3816_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3817{
3818 Mpi2PortEnableRequest_t *mpi_request;
3819 Mpi2PortEnableReply_t *mpi_reply;
3820 unsigned long timeleft;
3821 int r = 0;
3822 u16 smid;
3823 u16 ioc_status;
3824
3825 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3826
3827 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3828 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3829 ioc->name, __func__);
3830 return -EAGAIN;
3831 }
3832
3833 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3834 if (!smid) {
3835 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3836 ioc->name, __func__);
3837 return -EAGAIN;
3838 }
3839
3840 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3841 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3842 ioc->port_enable_cmds.smid = smid;
3843 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3844 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3845
3846 init_completion(&ioc->port_enable_cmds.done);
3847 mpt2sas_base_put_smid_default(ioc, smid);
3848 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
3849 300*HZ);
3850 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
3851 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3852 ioc->name, __func__);
3853 _debug_dump_mf(mpi_request,
3854 sizeof(Mpi2PortEnableRequest_t)/4);
3855 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
3856 r = -EFAULT;
3857 else
3858 r = -ETIME;
3859 goto out;
3860 }
3861 mpi_reply = ioc->port_enable_cmds.reply;
3862
3863 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3864 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3865 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
3866 ioc->name, __func__, ioc_status);
3867 r = -EFAULT;
3868 goto out;
3869 }
3870 out:
3871 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
3872 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
3873 "SUCCESS" : "FAILED"));
3874 return r;
3875}
3876
3877/**
3878 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
3879 * @ioc: per adapter object
3880 *
3881 * Returns 0 for success, non-zero for failure.
3882 */
3883int
3884mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
3885{
3886 Mpi2PortEnableRequest_t *mpi_request;
3887 u16 smid;
3888
3889 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3890
3891 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3892 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3893 ioc->name, __func__);
3894 return -EAGAIN;
3895 }
3896
3897 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3898 if (!smid) {
3899 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3900 ioc->name, __func__);
3901 return -EAGAIN;
3902 }
3903
3904 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3905 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3906 ioc->port_enable_cmds.smid = smid;
3907 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3908 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3909
3910 mpt2sas_base_put_smid_default(ioc, smid);
3911 return 0;
3912}
3913
3914/**
3915 * _base_determine_wait_on_discovery - desposition
3916 * @ioc: per adapter object
3917 *
3918 * Decide whether to wait on discovery to complete. Used to either
3919 * locate boot device, or report volumes ahead of physical devices.
3920 *
3921 * Returns 1 for wait, 0 for don't wait
3922 */
3923static int
3924_base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
3925{
3926 /* We wait for discovery to complete if IR firmware is loaded.
3927 * The sas topology events arrive before PD events, so we need time to
3928 * turn on the bit in ioc->pd_handles to indicate PD
3929 * Also, it maybe required to report Volumes ahead of physical
3930 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
3931 */
3932 if (ioc->ir_firmware)
3933 return 1;
3934
3935 /* if no Bios, then we don't need to wait */
3936 if (!ioc->bios_pg3.BiosVersion)
3937 return 0;
3938
3939 /* Bios is present, then we drop down here.
3940 *
3941 * If there any entries in the Bios Page 2, then we wait
3942 * for discovery to complete.
3943 */
3944
3945 /* Current Boot Device */
3946 if ((ioc->bios_pg2.CurrentBootDeviceForm &
3947 MPI2_BIOSPAGE2_FORM_MASK) ==
3948 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3949 /* Request Boot Device */
3950 (ioc->bios_pg2.ReqBootDeviceForm &
3951 MPI2_BIOSPAGE2_FORM_MASK) ==
3952 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3953 /* Alternate Request Boot Device */
3954 (ioc->bios_pg2.ReqAltBootDeviceForm &
3955 MPI2_BIOSPAGE2_FORM_MASK) ==
3956 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
3957 return 0;
3958
3959 return 1;
3960}
3961
3962
3963/**
3964 * _base_unmask_events - turn on notification for this event
3965 * @ioc: per adapter object
3966 * @event: firmware event
3967 *
3968 * The mask is stored in ioc->event_masks.
3969 */
3970static void
3971_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3972{
3973 u32 desired_event;
3974
3975 if (event >= 128)
3976 return;
3977
3978 desired_event = (1 << (event % 32));
3979
3980 if (event < 32)
3981 ioc->event_masks[0] &= ~desired_event;
3982 else if (event < 64)
3983 ioc->event_masks[1] &= ~desired_event;
3984 else if (event < 96)
3985 ioc->event_masks[2] &= ~desired_event;
3986 else if (event < 128)
3987 ioc->event_masks[3] &= ~desired_event;
3988}
3989
3990/**
3991 * _base_event_notification - send event notification
3992 * @ioc: per adapter object
3993 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3994 *
3995 * Returns 0 for success, non-zero for failure.
3996 */
3997static int
3998_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3999{
4000 Mpi2EventNotificationRequest_t *mpi_request;
4001 unsigned long timeleft;
4002 u16 smid;
4003 int r = 0;
4004 int i;
4005
4006 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4007 __func__));
4008
4009 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4010 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
4011 ioc->name, __func__);
4012 return -EAGAIN;
4013 }
4014
4015 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
4016 if (!smid) {
4017 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
4018 ioc->name, __func__);
4019 return -EAGAIN;
4020 }
4021 ioc->base_cmds.status = MPT2_CMD_PENDING;
4022 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
4023 ioc->base_cmds.smid = smid;
4024 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
4025 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
4026 mpi_request->VF_ID = 0; /* TODO */
4027 mpi_request->VP_ID = 0;
4028 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4029 mpi_request->EventMasks[i] =
4030 cpu_to_le32(ioc->event_masks[i]);
4031 init_completion(&ioc->base_cmds.done);
4032 mpt2sas_base_put_smid_default(ioc, smid);
4033 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
4034 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
4035 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
4036 ioc->name, __func__);
4037 _debug_dump_mf(mpi_request,
4038 sizeof(Mpi2EventNotificationRequest_t)/4);
4039 if (ioc->base_cmds.status & MPT2_CMD_RESET)
4040 r = -EFAULT;
4041 else
4042 r = -ETIME;
4043 } else
4044 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
4045 ioc->name, __func__));
4046 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4047 return r;
4048}
4049
4050/**
4051 * mpt2sas_base_validate_event_type - validating event types
4052 * @ioc: per adapter object
4053 * @event: firmware event
4054 *
4055 * This will turn on firmware event notification when application
4056 * ask for that event. We don't mask events that are already enabled.
4057 */
4058void
4059mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
4060{
4061 int i, j;
4062 u32 event_mask, desired_event;
4063 u8 send_update_to_fw;
4064
4065 for (i = 0, send_update_to_fw = 0; i <
4066 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
4067 event_mask = ~event_type[i];
4068 desired_event = 1;
4069 for (j = 0; j < 32; j++) {
4070 if (!(event_mask & desired_event) &&
4071 (ioc->event_masks[i] & desired_event)) {
4072 ioc->event_masks[i] &= ~desired_event;
4073 send_update_to_fw = 1;
4074 }
4075 desired_event = (desired_event << 1);
4076 }
4077 }
4078
4079 if (!send_update_to_fw)
4080 return;
4081
4082 mutex_lock(&ioc->base_cmds.mutex);
4083 _base_event_notification(ioc, CAN_SLEEP);
4084 mutex_unlock(&ioc->base_cmds.mutex);
4085}
4086
4087/**
4088 * _base_diag_reset - the "big hammer" start of day reset
4089 * @ioc: per adapter object
4090 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4091 *
4092 * Returns 0 for success, non-zero for failure.
4093 */
4094static int
4095_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4096{
4097 u32 host_diagnostic;
4098 u32 ioc_state;
4099 u32 count;
4100 u32 hcb_size;
4101
4102 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
4103 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
4104 ioc->name));
4105
4106 count = 0;
4107 do {
4108 /* Write magic sequence to WriteSequence register
4109 * Loop until in diagnostic mode
4110 */
4111 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
4112 "sequence\n", ioc->name));
4113 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4114 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
4115 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
4116 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
4117 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
4118 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
4119 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
4120
4121 /* wait 100 msec */
4122 if (sleep_flag == CAN_SLEEP)
4123 msleep(100);
4124 else
4125 mdelay(100);
4126
4127 if (count++ > 20)
4128 goto out;
4129
4130 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4131 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
4132 "sequence: count(%d), host_diagnostic(0x%08x)\n",
4133 ioc->name, count, host_diagnostic));
4134
4135 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
4136
4137 hcb_size = readl(&ioc->chip->HCBSize);
4138
4139 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
4140 ioc->name));
4141 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
4142 &ioc->chip->HostDiagnostic);
4143
4144 /* This delay allows the chip PCIe hardware time to finish reset tasks*/
4145 if (sleep_flag == CAN_SLEEP)
4146 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4147 else
4148 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4149
4150 /* Approximately 300 second max wait */
4151 for (count = 0; count < (300000000 /
4152 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
4153
4154 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4155
4156 if (host_diagnostic == 0xFFFFFFFF)
4157 goto out;
4158 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
4159 break;
4160
4161 /* Wait to pass the second read delay window */
4162 if (sleep_flag == CAN_SLEEP)
4163 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4164 /1000);
4165 else
4166 mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4167 /1000);
4168 }
4169
4170 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
4171
4172 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
4173 "assuming the HCB Address points to good F/W\n",
4174 ioc->name));
4175 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
4176 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
4177 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
4178
4179 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
4180 "re-enable the HCDW\n", ioc->name));
4181 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
4182 &ioc->chip->HCBSize);
4183 }
4184
4185 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
4186 ioc->name));
4187 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
4188 &ioc->chip->HostDiagnostic);
4189
4190 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
4191 "diagnostic register\n", ioc->name));
4192 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4193
4194 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
4195 "READY state\n", ioc->name));
4196 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
4197 sleep_flag);
4198 if (ioc_state) {
4199 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
4200 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
4201 goto out;
4202 }
4203
4204 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
4205 return 0;
4206
4207 out:
4208 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
4209 return -EFAULT;
4210}
4211
4212/**
4213 * _base_make_ioc_ready - put controller in READY state
4214 * @ioc: per adapter object
4215 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4216 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4217 *
4218 * Returns 0 for success, non-zero for failure.
4219 */
4220static int
4221_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4222 enum reset_type type)
4223{
4224 u32 ioc_state;
4225 int rc;
4226
4227 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4228 __func__));
4229
4230 if (ioc->pci_error_recovery)
4231 return 0;
4232
4233 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4234 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
4235 ioc->name, __func__, ioc_state));
4236
4237 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4238 return 0;
4239
4240 if (ioc_state & MPI2_DOORBELL_USED) {
4241 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
4242 "active!\n", ioc->name));
4243 goto issue_diag_reset;
4244 }
4245
4246 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4247 mpt2sas_base_fault_info(ioc, ioc_state &
4248 MPI2_DOORBELL_DATA_MASK);
4249 goto issue_diag_reset;
4250 }
4251
4252 if (type == FORCE_BIG_HAMMER)
4253 goto issue_diag_reset;
4254
4255 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4256 if (!(_base_send_ioc_reset(ioc,
4257 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4258 ioc->ioc_reset_count++;
4259 return 0;
4260 }
4261
4262 issue_diag_reset:
4263 rc = _base_diag_reset(ioc, CAN_SLEEP);
4264 ioc->ioc_reset_count++;
4265 return rc;
4266}
4267
4268/**
4269 * _base_make_ioc_operational - put controller in OPERATIONAL state
4270 * @ioc: per adapter object
4271 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4272 *
4273 * Returns 0 for success, non-zero for failure.
4274 */
4275static int
4276_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4277{
4278 int r, i;
4279 unsigned long flags;
4280 u32 reply_address;
4281 u16 smid;
4282 struct _tr_list *delayed_tr, *delayed_tr_next;
4283 u8 hide_flag;
4284 struct adapter_reply_queue *reply_q;
4285 long reply_post_free;
4286 u32 reply_post_free_sz, index = 0;
4287
4288 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4289 __func__));
4290
4291 /* clean the delayed target reset list */
4292 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4293 &ioc->delayed_tr_list, list) {
4294 list_del(&delayed_tr->list);
4295 kfree(delayed_tr);
4296 }
4297
4298 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4299 &ioc->delayed_tr_volume_list, list) {
4300 list_del(&delayed_tr->list);
4301 kfree(delayed_tr);
4302 }
4303
4304 /* initialize the scsi lookup free list */
4305 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4306 INIT_LIST_HEAD(&ioc->free_list);
4307 smid = 1;
4308 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4309 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4310 ioc->scsi_lookup[i].cb_idx = 0xFF;
4311 ioc->scsi_lookup[i].smid = smid;
4312 ioc->scsi_lookup[i].scmd = NULL;
4313 ioc->scsi_lookup[i].direct_io = 0;
4314 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4315 &ioc->free_list);
4316 }
4317
4318 /* hi-priority queue */
4319 INIT_LIST_HEAD(&ioc->hpr_free_list);
4320 smid = ioc->hi_priority_smid;
4321 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4322 ioc->hpr_lookup[i].cb_idx = 0xFF;
4323 ioc->hpr_lookup[i].smid = smid;
4324 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4325 &ioc->hpr_free_list);
4326 }
4327
4328 /* internal queue */
4329 INIT_LIST_HEAD(&ioc->internal_free_list);
4330 smid = ioc->internal_smid;
4331 for (i = 0; i < ioc->internal_depth; i++, smid++) {
4332 ioc->internal_lookup[i].cb_idx = 0xFF;
4333 ioc->internal_lookup[i].smid = smid;
4334 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4335 &ioc->internal_free_list);
4336 }
4337
4338 /* chain pool */
4339 INIT_LIST_HEAD(&ioc->free_chain_list);
4340 for (i = 0; i < ioc->chain_depth; i++)
4341 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4342 &ioc->free_chain_list);
4343
4344 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4345
4346 /* initialize Reply Free Queue */
4347 for (i = 0, reply_address = (u32)ioc->reply_dma ;
4348 i < ioc->reply_free_queue_depth ; i++, reply_address +=
4349 ioc->reply_sz)
4350 ioc->reply_free[i] = cpu_to_le32(reply_address);
4351
4352 /* initialize reply queues */
4353 if (ioc->is_driver_loading)
4354 _base_assign_reply_queues(ioc);
4355
4356 /* initialize Reply Post Free Queue */
4357 reply_post_free_sz = ioc->reply_post_queue_depth *
4358 sizeof(Mpi2DefaultReplyDescriptor_t);
4359 reply_post_free = (long)ioc->reply_post[index].reply_post_free;
4360 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4361 reply_q->reply_post_host_index = 0;
4362 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
4363 reply_post_free;
4364 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4365 reply_q->reply_post_free[i].Words =
4366 cpu_to_le64(ULLONG_MAX);
4367 if (!_base_is_controller_msix_enabled(ioc))
4368 goto skip_init_reply_post_free_queue;
4369 /*
4370 * If RDPQ is enabled, switch to the next allocation.
4371 * Otherwise advance within the contiguous region.
4372 */
4373 if (ioc->rdpq_array_enable)
4374 reply_post_free = (long)
4375 ioc->reply_post[++index].reply_post_free;
4376 else
4377 reply_post_free += reply_post_free_sz;
4378 }
4379 skip_init_reply_post_free_queue:
4380
4381 r = _base_send_ioc_init(ioc, sleep_flag);
4382 if (r)
4383 return r;
4384
4385 /* initialize reply free host index */
4386 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4387 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4388
4389 /* initialize reply post host index */
4390 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4391 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
4392 &ioc->chip->ReplyPostHostIndex);
4393 if (!_base_is_controller_msix_enabled(ioc))
4394 goto skip_init_reply_post_host_index;
4395 }
4396
4397 skip_init_reply_post_host_index:
4398
4399 _base_unmask_interrupts(ioc);
4400
4401 r = _base_event_notification(ioc, sleep_flag);
4402 if (r)
4403 return r;
4404
4405 if (sleep_flag == CAN_SLEEP)
4406 _base_static_config_pages(ioc);
4407
4408
4409 if (ioc->is_driver_loading) {
4410 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
4411 == 0x80) {
4412 hide_flag = (u8) (
4413 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
4414 MFG_PAGE10_HIDE_SSDS_MASK);
4415 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
4416 ioc->mfg_pg10_hide_flag = hide_flag;
4417 }
4418 ioc->wait_for_discovery_to_complete =
4419 _base_determine_wait_on_discovery(ioc);
4420 return r; /* scan_start and scan_finished support */
4421 }
4422 r = _base_send_port_enable(ioc, sleep_flag);
4423 if (r)
4424 return r;
4425
4426 return r;
4427}
4428
4429/**
4430 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
4431 * @ioc: per adapter object
4432 *
4433 * Return nothing.
4434 */
4435void
4436mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4437{
4438 struct pci_dev *pdev = ioc->pdev;
4439
4440 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4441 __func__));
4442
4443 /* synchronizing freeing resource with pci_access_mutex lock */
4444 mutex_lock(&ioc->pci_access_mutex);
4445 if (ioc->chip_phys && ioc->chip) {
4446 _base_mask_interrupts(ioc);
4447 ioc->shost_recovery = 1;
4448 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4449 ioc->shost_recovery = 0;
4450 }
4451
4452 _base_free_irq(ioc);
4453 _base_disable_msix(ioc);
4454
4455 if (ioc->chip_phys && ioc->chip)
4456 iounmap(ioc->chip);
4457 ioc->chip_phys = 0;
4458
4459 if (pci_is_enabled(pdev)) {
4460 pci_release_selected_regions(ioc->pdev, ioc->bars);
4461 pci_disable_pcie_error_reporting(pdev);
4462 pci_disable_device(pdev);
4463 }
4464 mutex_unlock(&ioc->pci_access_mutex);
4465 return;
4466}
4467
4468/**
4469 * mpt2sas_base_attach - attach controller instance
4470 * @ioc: per adapter object
4471 *
4472 * Returns 0 for success, non-zero for failure.
4473 */
4474int
4475mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4476{
4477 int r, i;
4478 int cpu_id, last_cpu_id = 0;
4479
4480 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4481 __func__));
4482
4483 /* setup cpu_msix_table */
4484 ioc->cpu_count = num_online_cpus();
4485 for_each_online_cpu(cpu_id)
4486 last_cpu_id = cpu_id;
4487 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4488 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4489 ioc->reply_queue_count = 1;
4490 if (!ioc->cpu_msix_table) {
4491 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4492 "cpu_msix_table failed!!!\n", ioc->name));
4493 r = -ENOMEM;
4494 goto out_free_resources;
4495 }
4496
4497 if (ioc->is_warpdrive) {
4498 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4499 sizeof(resource_size_t *), GFP_KERNEL);
4500 if (!ioc->reply_post_host_index) {
4501 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4502 "for cpu_msix_table failed!!!\n", ioc->name));
4503 r = -ENOMEM;
4504 goto out_free_resources;
4505 }
4506 }
4507
4508 ioc->rdpq_array_enable_assigned = 0;
4509 ioc->dma_mask = 0;
4510 r = mpt2sas_base_map_resources(ioc);
4511 if (r)
4512 goto out_free_resources;
4513
4514 if (ioc->is_warpdrive) {
4515 ioc->reply_post_host_index[0] = (resource_size_t __iomem *)
4516 &ioc->chip->ReplyPostHostIndex;
4517
4518 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4519 ioc->reply_post_host_index[i] =
4520 (resource_size_t __iomem *)
4521 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4522 * 4)));
4523 }
4524
4525 pci_set_drvdata(ioc->pdev, ioc->shost);
4526 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4527 if (r)
4528 goto out_free_resources;
4529
4530 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4531 if (r)
4532 goto out_free_resources;
4533
4534 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4535 sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
4536 if (!ioc->pfacts) {
4537 r = -ENOMEM;
4538 goto out_free_resources;
4539 }
4540
4541 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4542 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4543 if (r)
4544 goto out_free_resources;
4545 }
4546
4547 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4548 if (r)
4549 goto out_free_resources;
4550
4551 init_waitqueue_head(&ioc->reset_wq);
4552 /* allocate memory pd handle bitmask list */
4553 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4554 if (ioc->facts.MaxDevHandle % 8)
4555 ioc->pd_handles_sz++;
4556 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4557 GFP_KERNEL);
4558 if (!ioc->pd_handles) {
4559 r = -ENOMEM;
4560 goto out_free_resources;
4561 }
4562 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
4563 GFP_KERNEL);
4564 if (!ioc->blocking_handles) {
4565 r = -ENOMEM;
4566 goto out_free_resources;
4567 }
4568 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4569
4570 /* base internal command bits */
4571 mutex_init(&ioc->base_cmds.mutex);
4572 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4573 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4574
4575 /* port_enable command bits */
4576 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4577 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
4578
4579 /* transport internal command bits */
4580 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4581 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4582 mutex_init(&ioc->transport_cmds.mutex);
4583
4584 /* scsih internal command bits */
4585 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4586 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4587 mutex_init(&ioc->scsih_cmds.mutex);
4588
4589 /* task management internal command bits */
4590 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4591 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4592 mutex_init(&ioc->tm_cmds.mutex);
4593
4594 /* config page internal command bits */
4595 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4596 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4597 mutex_init(&ioc->config_cmds.mutex);
4598
4599 /* ctl module internal command bits */
4600 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4601 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4602 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4603 mutex_init(&ioc->ctl_cmds.mutex);
4604
4605 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4606 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4607 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4608 !ioc->ctl_cmds.sense) {
4609 r = -ENOMEM;
4610 goto out_free_resources;
4611 }
4612
4613 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4614 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4615 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4616 r = -ENOMEM;
4617 goto out_free_resources;
4618 }
4619
4620 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4621 ioc->event_masks[i] = -1;
4622
4623 /* here we enable the events we care about */
4624 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4625 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4626 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4627 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4628 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4629 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4630 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4631 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4632 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4633 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4634 _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD);
4635 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4636 if (r)
4637 goto out_free_resources;
4638
4639 ioc->non_operational_loop = 0;
4640
4641 return 0;
4642
4643 out_free_resources:
4644
4645 ioc->remove_host = 1;
4646 mpt2sas_base_free_resources(ioc);
4647 _base_release_memory_pools(ioc);
4648 pci_set_drvdata(ioc->pdev, NULL);
4649 kfree(ioc->cpu_msix_table);
4650 if (ioc->is_warpdrive)
4651 kfree(ioc->reply_post_host_index);
4652 kfree(ioc->pd_handles);
4653 kfree(ioc->blocking_handles);
4654 kfree(ioc->tm_cmds.reply);
4655 kfree(ioc->transport_cmds.reply);
4656 kfree(ioc->scsih_cmds.reply);
4657 kfree(ioc->config_cmds.reply);
4658 kfree(ioc->base_cmds.reply);
4659 kfree(ioc->port_enable_cmds.reply);
4660 kfree(ioc->ctl_cmds.reply);
4661 kfree(ioc->ctl_cmds.sense);
4662 kfree(ioc->pfacts);
4663 ioc->ctl_cmds.reply = NULL;
4664 ioc->base_cmds.reply = NULL;
4665 ioc->tm_cmds.reply = NULL;
4666 ioc->scsih_cmds.reply = NULL;
4667 ioc->transport_cmds.reply = NULL;
4668 ioc->config_cmds.reply = NULL;
4669 ioc->pfacts = NULL;
4670 return r;
4671}
4672
4673
4674/**
4675 * mpt2sas_base_detach - remove controller instance
4676 * @ioc: per adapter object
4677 *
4678 * Return nothing.
4679 */
4680void
4681mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4682{
4683
4684 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4685 __func__));
4686
4687 mpt2sas_base_stop_watchdog(ioc);
4688 mpt2sas_base_free_resources(ioc);
4689 _base_release_memory_pools(ioc);
4690 pci_set_drvdata(ioc->pdev, NULL);
4691 kfree(ioc->cpu_msix_table);
4692 if (ioc->is_warpdrive)
4693 kfree(ioc->reply_post_host_index);
4694 kfree(ioc->pd_handles);
4695 kfree(ioc->blocking_handles);
4696 kfree(ioc->pfacts);
4697 kfree(ioc->ctl_cmds.reply);
4698 kfree(ioc->ctl_cmds.sense);
4699 kfree(ioc->base_cmds.reply);
4700 kfree(ioc->port_enable_cmds.reply);
4701 kfree(ioc->tm_cmds.reply);
4702 kfree(ioc->transport_cmds.reply);
4703 kfree(ioc->scsih_cmds.reply);
4704 kfree(ioc->config_cmds.reply);
4705}
4706
4707/**
4708 * _base_reset_handler - reset callback handler (for base)
4709 * @ioc: per adapter object
4710 * @reset_phase: phase
4711 *
4712 * The handler for doing any required cleanup or initialization.
4713 *
4714 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4715 * MPT2_IOC_DONE_RESET
4716 *
4717 * Return nothing.
4718 */
4719static void
4720_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4721{
4722 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4723 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4724 switch (reset_phase) {
4725 case MPT2_IOC_PRE_RESET:
4726 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4727 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4728 break;
4729 case MPT2_IOC_AFTER_RESET:
4730 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4731 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4732 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4733 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4734 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4735 complete(&ioc->transport_cmds.done);
4736 }
4737 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4738 ioc->base_cmds.status |= MPT2_CMD_RESET;
4739 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4740 complete(&ioc->base_cmds.done);
4741 }
4742 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
4743 ioc->port_enable_failed = 1;
4744 ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
4745 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
4746 if (ioc->is_driver_loading) {
4747 ioc->start_scan_failed =
4748 MPI2_IOCSTATUS_INTERNAL_ERROR;
4749 ioc->start_scan = 0;
4750 ioc->port_enable_cmds.status =
4751 MPT2_CMD_NOT_USED;
4752 } else
4753 complete(&ioc->port_enable_cmds.done);
4754
4755 }
4756 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4757 ioc->config_cmds.status |= MPT2_CMD_RESET;
4758 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4759 ioc->config_cmds.smid = USHRT_MAX;
4760 complete(&ioc->config_cmds.done);
4761 }
4762 break;
4763 case MPT2_IOC_DONE_RESET:
4764 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4765 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4766 break;
4767 }
4768}
4769
4770/**
4771 * _wait_for_commands_to_complete - reset controller
4772 * @ioc: Pointer to MPT_ADAPTER structure
4773 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4774 *
4775 * This function waiting(3s) for all pending commands to complete
4776 * prior to putting controller in reset.
4777 */
4778static void
4779_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4780{
4781 u32 ioc_state;
4782 unsigned long flags;
4783 u16 i;
4784
4785 ioc->pending_io_count = 0;
4786 if (sleep_flag != CAN_SLEEP)
4787 return;
4788
4789 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4790 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4791 return;
4792
4793 /* pending command count */
4794 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4795 for (i = 0; i < ioc->scsiio_depth; i++)
4796 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4797 ioc->pending_io_count++;
4798 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4799
4800 if (!ioc->pending_io_count)
4801 return;
4802
4803 /* wait for pending commands to complete */
4804 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4805}
4806
4807/**
4808 * mpt2sas_base_hard_reset_handler - reset controller
4809 * @ioc: Pointer to MPT_ADAPTER structure
4810 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4811 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4812 *
4813 * Returns 0 for success, non-zero for failure.
4814 */
4815int
4816mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4817 enum reset_type type)
4818{
4819 int r;
4820 unsigned long flags;
4821
4822 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4823 __func__));
4824
4825 if (ioc->pci_error_recovery) {
4826 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4827 ioc->name, __func__);
4828 r = 0;
4829 goto out_unlocked;
4830 }
4831
4832 if (mpt2sas_fwfault_debug)
4833 mpt2sas_halt_firmware(ioc);
4834
4835 /* TODO - What we really should be doing is pulling
4836 * out all the code associated with NO_SLEEP; its never used.
4837 * That is legacy code from mpt fusion driver, ported over.
4838 * I will leave this BUG_ON here for now till its been resolved.
4839 */
4840 BUG_ON(sleep_flag == NO_SLEEP);
4841
4842 /* wait for an active reset in progress to complete */
4843 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4844 do {
4845 ssleep(1);
4846 } while (ioc->shost_recovery == 1);
4847 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4848 __func__));
4849 return ioc->ioc_reset_in_progress_status;
4850 }
4851
4852 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4853 ioc->shost_recovery = 1;
4854 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4855
4856 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4857 _wait_for_commands_to_complete(ioc, sleep_flag);
4858 _base_mask_interrupts(ioc);
4859 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4860 if (r)
4861 goto out;
4862 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4863
4864 /* If this hard reset is called while port enable is active, then
4865 * there is no reason to call make_ioc_operational
4866 */
4867 if (ioc->is_driver_loading && ioc->port_enable_failed) {
4868 ioc->remove_host = 1;
4869 r = -EFAULT;
4870 goto out;
4871 }
4872
4873 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4874 if (r)
4875 goto out;
4876
4877 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
4878 panic("%s: Issue occurred with flashing controller firmware."
4879 "Please reboot the system and ensure that the correct"
4880 " firmware version is running\n", ioc->name);
4881
4882 r = _base_make_ioc_operational(ioc, sleep_flag);
4883 if (!r)
4884 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4885 out:
4886 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4887 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4888
4889 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4890 ioc->ioc_reset_in_progress_status = r;
4891 ioc->shost_recovery = 0;
4892 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4893 mutex_unlock(&ioc->reset_in_progress_mutex);
4894
4895 out_unlocked:
4896 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4897 __func__));
4898 return r;
4899}
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 06:39:01 -0400