diff options
| author | Hariprasad Shenai <hariprasad@chelsio.com> | 2014-11-06 23:05:24 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-11-10 12:57:10 -0500 |
| commit | 6559a7e8296002b4379e5f2c26a2a3a339d5e60a (patch) | |
| tree | b5d43322a6faef196a65bcfe4bb36799d0125c35 /drivers/scsi/csiostor/csio_hw_t5.c | |
| parent | fd88b31a1d49f08911ed291e46e5bc6e8afabdfa (diff) | |
cxgb4: Cleanup macros so they follow the same style and look consistent
Various patches have ended up changing the style of the symbolic macros/register
to different style.
As a result, the current kernel.org files are a mix of different macro styles.
Since this macro/register defines is used by different drivers a
few patch series have ended up adding duplicate macro/register define entries
with different styles. This makes these register define/macro files a complete
mess and we want to make them clean and consistent. This patch cleans up a part
of it.
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/scsi/csiostor/csio_hw_t5.c')
| -rw-r--r-- | drivers/scsi/csiostor/csio_hw_t5.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/scsi/csiostor/csio_hw_t5.c b/drivers/scsi/csiostor/csio_hw_t5.c index 27745c170c24..66e180a58718 100644 --- a/drivers/scsi/csiostor/csio_hw_t5.c +++ b/drivers/scsi/csiostor/csio_hw_t5.c | |||
| @@ -298,12 +298,12 @@ csio_t5_memory_rw(struct csio_hw *hw, u32 win, int mtype, u32 addr, | |||
| 298 | * MEM_MC0 = 2 -- For T5 | 298 | * MEM_MC0 = 2 -- For T5 |
| 299 | * MEM_MC1 = 3 -- For T5 | 299 | * MEM_MC1 = 3 -- For T5 |
| 300 | */ | 300 | */ |
| 301 | edc_size = EDRAM_SIZE_GET(csio_rd_reg32(hw, MA_EDRAM0_BAR)); | 301 | edc_size = EDRAM0_SIZE_G(csio_rd_reg32(hw, MA_EDRAM0_BAR_A)); |
| 302 | if (mtype != MEM_MC1) | 302 | if (mtype != MEM_MC1) |
| 303 | memoffset = (mtype * (edc_size * 1024 * 1024)); | 303 | memoffset = (mtype * (edc_size * 1024 * 1024)); |
| 304 | else { | 304 | else { |
| 305 | mc_size = EXT_MEM_SIZE_GET(csio_rd_reg32(hw, | 305 | mc_size = EXT_MEM_SIZE_G(csio_rd_reg32(hw, |
| 306 | MA_EXT_MEMORY_BAR)); | 306 | MA_EXT_MEMORY_BAR_A)); |
| 307 | memoffset = (MEM_MC0 * edc_size + mc_size) * 1024 * 1024; | 307 | memoffset = (MEM_MC0 * edc_size + mc_size) * 1024 * 1024; |
| 308 | } | 308 | } |
| 309 | 309 | ||
| @@ -372,16 +372,17 @@ static void | |||
| 372 | csio_t5_dfs_create_ext_mem(struct csio_hw *hw) | 372 | csio_t5_dfs_create_ext_mem(struct csio_hw *hw) |
| 373 | { | 373 | { |
| 374 | u32 size; | 374 | u32 size; |
| 375 | int i = csio_rd_reg32(hw, MA_TARGET_MEM_ENABLE); | 375 | int i = csio_rd_reg32(hw, MA_TARGET_MEM_ENABLE_A); |
| 376 | if (i & EXT_MEM_ENABLE) { | 376 | |
| 377 | size = csio_rd_reg32(hw, MA_EXT_MEMORY_BAR); | 377 | if (i & EXT_MEM_ENABLE_F) { |
| 378 | size = csio_rd_reg32(hw, MA_EXT_MEMORY_BAR_A); | ||
| 378 | csio_add_debugfs_mem(hw, "mc0", MEM_MC0, | 379 | csio_add_debugfs_mem(hw, "mc0", MEM_MC0, |
| 379 | EXT_MEM_SIZE_GET(size)); | 380 | EXT_MEM_SIZE_G(size)); |
| 380 | } | 381 | } |
| 381 | if (i & EXT_MEM1_ENABLE) { | 382 | if (i & EXT_MEM1_ENABLE_F) { |
| 382 | size = csio_rd_reg32(hw, MA_EXT_MEMORY1_BAR); | 383 | size = csio_rd_reg32(hw, MA_EXT_MEMORY1_BAR_A); |
| 383 | csio_add_debugfs_mem(hw, "mc1", MEM_MC1, | 384 | csio_add_debugfs_mem(hw, "mc1", MEM_MC1, |
| 384 | EXT_MEM_SIZE_GET(size)); | 385 | EXT_MEM_SIZE_G(size)); |
| 385 | } | 386 | } |
| 386 | } | 387 | } |
| 387 | 388 | ||