rtc: ds1307: add frequency_test_enable attribute on m41txx

On m41txx you can enable open-drain OUT pin to check if offset is ok.
Enabling OUT pin with frequency_test_enable attribute, OUT pin will tick
512 times faster than 1s tick base.

Enable or Disable FT bit on CONTROL register if freq_test is 1 or 0.

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

1 files changed, 92 insertions, 0 deletions

diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 8268813f15c3..edccd0c0da25 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -1050,6 +1050,94 @@ static int m41txx_rtc_set_offset(struct device *dev, long offset)
                                   ctrl_reg);
 }
 
+static ssize_t frequency_test_enable_store(struct device *dev,
+                                           struct device_attribute *attr,
+                                           const char *buf, size_t count)
+{
+        struct ds1307 *ds1307 = dev_get_drvdata(dev);
+        bool freq_test_en;
+        int ret;
+
+        ret = kstrtobool(buf, &freq_test_en);
+        if (ret) {
+                dev_err(dev, "Failed to store RTC Frequency Test attribute\n");
+                return ret;
+        }
+
+        regmap_update_bits(ds1307->regmap, M41TXX_REG_CONTROL, M41TXX_BIT_FT,
+                           freq_test_en ? M41TXX_BIT_FT : 0);
+
+        return count;
+}
+
+static ssize_t frequency_test_enable_show(struct device *dev,
+                                          struct device_attribute *attr,
+                                          char *buf)
+{
+        struct ds1307 *ds1307 = dev_get_drvdata(dev);
+        unsigned int ctrl_reg;
+
+        regmap_read(ds1307->regmap, M41TXX_REG_CONTROL, &ctrl_reg);
+
+        return scnprintf(buf, PAGE_SIZE, (ctrl_reg & M41TXX_BIT_FT) ? "on\n" :
+                        "off\n");
+}
+
+static DEVICE_ATTR_RW(frequency_test_enable);
+
+static struct attribute *rtc_freq_test_attrs[] = {
+        &dev_attr_frequency_test_enable.attr,
+        NULL,
+};
+
+static const struct attribute_group rtc_freq_test_attr_group = {
+        .attrs          = rtc_freq_test_attrs,
+};
+
+static void rtc_calib_remove_sysfs_group(void *_dev)
+{
+        struct device *dev = _dev;
+
+        sysfs_remove_group(&dev->kobj, &rtc_freq_test_attr_group);
+}
+
+static int ds1307_add_frequency_test(struct ds1307 *ds1307)
+{
+        int err;
+
+        switch (ds1307->type) {
+        case m41t0:
+        case m41t00:
+        case m41t11:
+                /* Export sysfs entries */
+                err = sysfs_create_group(&(ds1307->dev)->kobj,
+                                         &rtc_freq_test_attr_group);
+                if (err) {
+                        dev_err(ds1307->dev,
+                                "Failed to create sysfs group: %d\n",
+                                err);
+                        return err;
+                }
+
+                err = devm_add_action_or_reset(ds1307->dev,
+                                               rtc_calib_remove_sysfs_group,
+                                               ds1307->dev);
+                if (err) {
+                        dev_err(ds1307->dev,
+                                "Failed to add sysfs cleanup action: %d\n",
+                                err);
+                        sysfs_remove_group(&(ds1307->dev)->kobj,
+                                           &rtc_freq_test_attr_group);
+                        return err;
+                }
+                break;
+        default:
+                break;
+        }
+
+        return 0;
+}
+
 /*----------------------------------------------------------------------*/
 
 static int ds1307_nvram_read(void *priv, unsigned int offset, void *val,
@@ -1792,6 +1880,10 @@ read_rtc:
         if (err)
                 return err;
 
+        err = ds1307_add_frequency_test(ds1307);
+        if (err)
+                return err;
+
         if (chip->nvram_size) {
                 struct nvmem_config nvmem_cfg = {
                         .name = "ds1307_nvram",