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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2018-09-19 13:52:09 -0400
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2018-09-28 08:21:00 -0400
commit8ddeb09de163ce4f362c610cd901f9c5ad4f58fd (patch)
tree1ca99983b9bee5d021a13cc370e36c13dcd8e875 /drivers/rtc
parentc7080e2016074363298e05d5e4d91eaf243a58c2 (diff)
rtc: ds1685: drop RTC_DS1685_PROC_REGS
/proc is not the correct ABI to display debugging info. Remove RTC_DS1685_PROC_REGS as the driver hasn't seen any real development since it was included. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'drivers/rtc')
-rw-r--r--drivers/rtc/Kconfig11
-rw-r--r--drivers/rtc/rtc-ds1685.c61
2 files changed, 0 insertions, 72 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4df9a3ec064b..a819ef07b7ec 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1008,17 +1008,6 @@ config RTC_DRV_DS17885
1008 1008
1009endchoice 1009endchoice
1010 1010
1011config RTC_DS1685_PROC_REGS
1012 bool "Display register values in /proc"
1013 depends on RTC_DRV_DS1685_FAMILY && PROC_FS
1014 help
1015 Enable this to display a readout of all of the RTC registers in
1016 /proc/drivers/rtc. Keep in mind that this can potentially lead
1017 to lost interrupts, as reading Control Register C will clear
1018 all pending IRQ flags.
1019
1020 Unless you are debugging this driver, choose N.
1021
1022config RTC_DRV_DS1742 1011config RTC_DRV_DS1742
1023 tristate "Maxim/Dallas DS1742/1743" 1012 tristate "Maxim/Dallas DS1742/1743"
1024 depends on HAS_IOMEM 1013 depends on HAS_IOMEM
diff --git a/drivers/rtc/rtc-ds1685.c b/drivers/rtc/rtc-ds1685.c
index 6f39f683a98c..2bad1f50414f 100644
--- a/drivers/rtc/rtc-ds1685.c
+++ b/drivers/rtc/rtc-ds1685.c
@@ -770,33 +770,6 @@ static const char *ds1685_rtc_sqw_freq[16] = {
770 "512Hz", "256Hz", "128Hz", "64Hz", "32Hz", "16Hz", "8Hz", "4Hz", "2Hz" 770 "512Hz", "256Hz", "128Hz", "64Hz", "32Hz", "16Hz", "8Hz", "4Hz", "2Hz"
771}; 771};
772 772
773#ifdef CONFIG_RTC_DS1685_PROC_REGS
774/**
775 * ds1685_rtc_print_regs - helper function to print register values.
776 * @hex: hex byte to convert into binary bits.
777 * @dest: destination char array.
778 *
779 * This is basically a hex->binary function, just with extra spacing between
780 * the digits. It only works on 1-byte values (8 bits).
781 */
782static char*
783ds1685_rtc_print_regs(u8 hex, char *dest)
784{
785 u32 i, j;
786 char *tmp = dest;
787
788 for (i = 0; i < NUM_BITS; i++) {
789 *tmp++ = ((hex & 0x80) != 0 ? '1' : '0');
790 for (j = 0; j < NUM_SPACES; j++)
791 *tmp++ = ' ';
792 hex <<= 1;
793 }
794 *tmp++ = '\0';
795
796 return dest;
797}
798#endif
799
800/** 773/**
801 * ds1685_rtc_proc - procfs access function. 774 * ds1685_rtc_proc - procfs access function.
802 * @dev: pointer to device structure. 775 * @dev: pointer to device structure.
@@ -809,9 +782,6 @@ ds1685_rtc_proc(struct device *dev, struct seq_file *seq)
809 struct ds1685_priv *rtc = platform_get_drvdata(pdev); 782 struct ds1685_priv *rtc = platform_get_drvdata(pdev);
810 u8 ctrla, ctrlb, ctrlc, ctrld, ctrl4a, ctrl4b, ssn[8]; 783 u8 ctrla, ctrlb, ctrlc, ctrld, ctrl4a, ctrl4b, ssn[8];
811 char *model; 784 char *model;
812#ifdef CONFIG_RTC_DS1685_PROC_REGS
813 char bits[NUM_REGS][(NUM_BITS * NUM_SPACES) + NUM_BITS + 1];
814#endif
815 785
816 /* Read all the relevant data from the control registers. */ 786 /* Read all the relevant data from the control registers. */
817 ds1685_rtc_switch_to_bank1(rtc); 787 ds1685_rtc_switch_to_bank1(rtc);
@@ -859,28 +829,7 @@ ds1685_rtc_proc(struct device *dev, struct seq_file *seq)
859 "Periodic IRQ\t: %s\n" 829 "Periodic IRQ\t: %s\n"
860 "Periodic Rate\t: %s\n" 830 "Periodic Rate\t: %s\n"
861 "SQW Freq\t: %s\n" 831 "SQW Freq\t: %s\n"
862#ifdef CONFIG_RTC_DS1685_PROC_REGS
863 "Serial #\t: %8phC\n"
864 "Register Status\t:\n"
865 " Ctrl A\t: UIP DV2 DV1 DV0 RS3 RS2 RS1 RS0\n"
866 "\t\t: %s\n"
867 " Ctrl B\t: SET PIE AIE UIE SQWE DM 2412 DSE\n"
868 "\t\t: %s\n"
869 " Ctrl C\t: IRQF PF AF UF --- --- --- ---\n"
870 "\t\t: %s\n"
871 " Ctrl D\t: VRT --- --- --- --- --- --- ---\n"
872 "\t\t: %s\n"
873#if !defined(CONFIG_RTC_DRV_DS1685) && !defined(CONFIG_RTC_DRV_DS1689)
874 " Ctrl 4A\t: VRT2 INCR BME --- PAB RF WF KF\n"
875#else
876 " Ctrl 4A\t: VRT2 INCR --- --- PAB RF WF KF\n"
877#endif
878 "\t\t: %s\n"
879 " Ctrl 4B\t: ABE E32k CS RCE PRS RIE WIE KSE\n"
880 "\t\t: %s\n",
881#else
882 "Serial #\t: %8phC\n", 832 "Serial #\t: %8phC\n",
883#endif
884 model, 833 model,
885 ((ctrla & RTC_CTRL_A_DV1) ? "enabled" : "disabled"), 834 ((ctrla & RTC_CTRL_A_DV1) ? "enabled" : "disabled"),
886 ((ctrlb & RTC_CTRL_B_2412) ? "24-hour" : "12-hour"), 835 ((ctrlb & RTC_CTRL_B_2412) ? "24-hour" : "12-hour"),
@@ -894,17 +843,7 @@ ds1685_rtc_proc(struct device *dev, struct seq_file *seq)
894 ds1685_rtc_pirq_rate[(ctrla & RTC_CTRL_A_RS_MASK)] : "none"), 843 ds1685_rtc_pirq_rate[(ctrla & RTC_CTRL_A_RS_MASK)] : "none"),
895 (!((ctrl4b & RTC_CTRL_4B_E32K)) ? 844 (!((ctrl4b & RTC_CTRL_4B_E32K)) ?
896 ds1685_rtc_sqw_freq[(ctrla & RTC_CTRL_A_RS_MASK)] : "32768Hz"), 845 ds1685_rtc_sqw_freq[(ctrla & RTC_CTRL_A_RS_MASK)] : "32768Hz"),
897#ifdef CONFIG_RTC_DS1685_PROC_REGS
898 ssn,
899 ds1685_rtc_print_regs(ctrla, bits[0]),
900 ds1685_rtc_print_regs(ctrlb, bits[1]),
901 ds1685_rtc_print_regs(ctrlc, bits[2]),
902 ds1685_rtc_print_regs(ctrld, bits[3]),
903 ds1685_rtc_print_regs(ctrl4a, bits[4]),
904 ds1685_rtc_print_regs(ctrl4b, bits[5]));
905#else
906 ssn); 846 ssn);
907#endif
908 return 0; 847 return 0;
909} 848}
910#else 849#else