diff options
author | Vignesh R <vigneshr@ti.com> | 2018-06-11 02:09:55 -0400 |
---|---|---|
committer | Thierry Reding <thierry.reding@gmail.com> | 2018-07-09 12:57:52 -0400 |
commit | aa49d628f6e016bcec8c6f8e704b9b18ee697329 (patch) | |
tree | 7c65cd2bec60d2310014756b6dfc607c6d1db8a7 /drivers/pwm | |
parent | 4de445cb431eb4b473936396436d819a0724735c (diff) |
pwm: tiehrpwm: Don't use emulation mode bits to control PWM output
As per AM335x TRM SPRUH73P "15.2.2.11 ePWM Behavior During Emulation",
TBCTL[15:14] only have effect during emulation suspend events (IOW,
to stop PWM when debugging using a debugger). These bits have no effect
on PWM output during normal running of system. Hence, remove code
accessing these bits as they have no role in enabling/disabling PWMs.
Fixes: 19891b20e7c2 ("pwm: pwm-tiehrpwm: PWM driver support for EHRPWM")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm')
-rw-r--r-- | drivers/pwm/pwm-tiehrpwm.c | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c index 4c22cb395040..768176f54d5e 100644 --- a/drivers/pwm/pwm-tiehrpwm.c +++ b/drivers/pwm/pwm-tiehrpwm.c | |||
@@ -33,10 +33,6 @@ | |||
33 | #define TBCTL 0x00 | 33 | #define TBCTL 0x00 |
34 | #define TBPRD 0x0A | 34 | #define TBPRD 0x0A |
35 | 35 | ||
36 | #define TBCTL_RUN_MASK (BIT(15) | BIT(14)) | ||
37 | #define TBCTL_STOP_NEXT 0 | ||
38 | #define TBCTL_STOP_ON_CYCLE BIT(14) | ||
39 | #define TBCTL_FREE_RUN (BIT(15) | BIT(14)) | ||
40 | #define TBCTL_PRDLD_MASK BIT(3) | 36 | #define TBCTL_PRDLD_MASK BIT(3) |
41 | #define TBCTL_PRDLD_SHDW 0 | 37 | #define TBCTL_PRDLD_SHDW 0 |
42 | #define TBCTL_PRDLD_IMDT BIT(3) | 38 | #define TBCTL_PRDLD_IMDT BIT(3) |
@@ -360,7 +356,7 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) | |||
360 | /* Channels polarity can be configured from action qualifier module */ | 356 | /* Channels polarity can be configured from action qualifier module */ |
361 | configure_polarity(pc, pwm->hwpwm); | 357 | configure_polarity(pc, pwm->hwpwm); |
362 | 358 | ||
363 | /* Enable TBCLK before enabling PWM device */ | 359 | /* Enable TBCLK */ |
364 | ret = clk_enable(pc->tbclk); | 360 | ret = clk_enable(pc->tbclk); |
365 | if (ret) { | 361 | if (ret) { |
366 | dev_err(chip->dev, "Failed to enable TBCLK for %s: %d\n", | 362 | dev_err(chip->dev, "Failed to enable TBCLK for %s: %d\n", |
@@ -368,9 +364,6 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) | |||
368 | return ret; | 364 | return ret; |
369 | } | 365 | } |
370 | 366 | ||
371 | /* Enable time counter for free_run */ | ||
372 | ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN); | ||
373 | |||
374 | return 0; | 367 | return 0; |
375 | } | 368 | } |
376 | 369 | ||
@@ -400,9 +393,6 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) | |||
400 | /* Disabling TBCLK on PWM disable */ | 393 | /* Disabling TBCLK on PWM disable */ |
401 | clk_disable(pc->tbclk); | 394 | clk_disable(pc->tbclk); |
402 | 395 | ||
403 | /* Stop Time base counter */ | ||
404 | ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_STOP_NEXT); | ||
405 | |||
406 | /* Disable clock on PWM disable */ | 396 | /* Disable clock on PWM disable */ |
407 | pm_runtime_put_sync(chip->dev); | 397 | pm_runtime_put_sync(chip->dev); |
408 | } | 398 | } |