diff options
| author | Lukasz Majewski <lukma@denx.de> | 2017-01-29 16:54:12 -0500 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2017-01-30 03:12:59 -0500 |
| commit | 871985b154ada5a0edaf1aa22d6a1de115b0213d (patch) | |
| tree | 9f38fb95e8b695358c2b9cb196f4c053012a6f03 /drivers/pwm/pwm-imx.c | |
| parent | 0ca1a11a1d816c8fb0bb29b985666cef912958c1 (diff) | |
pwm: imx: Remove redundant i.MX PWMv2 code
The code providing functionality surpassed by the atomic PWM is not
needed anymore and hence can be removed.
Suggested-by: Stefan Agner <stefan@agner.ch>
Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-imx.c')
| -rw-r--r-- | drivers/pwm/pwm-imx.c | 127 |
1 files changed, 0 insertions, 127 deletions
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 34f3031d5c40..0a81c028cb11 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c | |||
| @@ -53,10 +53,6 @@ struct imx_chip { | |||
| 53 | void __iomem *mmio_base; | 53 | void __iomem *mmio_base; |
| 54 | 54 | ||
| 55 | struct pwm_chip chip; | 55 | struct pwm_chip chip; |
| 56 | |||
| 57 | int (*config)(struct pwm_chip *chip, | ||
| 58 | struct pwm_device *pwm, int duty_ns, int period_ns); | ||
| 59 | void (*set_enable)(struct pwm_chip *chip, bool enable); | ||
| 60 | }; | 56 | }; |
| 61 | 57 | ||
| 62 | #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip) | 58 | #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip) |
| @@ -159,95 +155,6 @@ static void imx_pwm_wait_fifo_slot(struct pwm_chip *chip, | |||
| 159 | } | 155 | } |
| 160 | } | 156 | } |
| 161 | 157 | ||
| 162 | static int imx_pwm_config_v2(struct pwm_chip *chip, | ||
| 163 | struct pwm_device *pwm, int duty_ns, int period_ns) | ||
| 164 | { | ||
| 165 | struct imx_chip *imx = to_imx_chip(chip); | ||
| 166 | unsigned long long c; | ||
| 167 | unsigned long period_cycles, duty_cycles, prescale; | ||
| 168 | bool enable = pwm_is_enabled(pwm); | ||
| 169 | u32 cr; | ||
| 170 | |||
| 171 | /* | ||
| 172 | * i.MX PWMv2 has a 4-word sample FIFO. | ||
| 173 | * In order to avoid FIFO overflow issue, we do software reset | ||
| 174 | * to clear all sample FIFO if the controller is disabled or | ||
| 175 | * wait for a full PWM cycle to get a relinquished FIFO slot | ||
| 176 | * when the controller is enabled and the FIFO is fully loaded. | ||
| 177 | */ | ||
| 178 | if (enable) | ||
| 179 | imx_pwm_wait_fifo_slot(chip, pwm); | ||
| 180 | else | ||
| 181 | imx_pwm_sw_reset(chip); | ||
| 182 | |||
| 183 | c = clk_get_rate(imx->clk_per); | ||
| 184 | c = c * period_ns; | ||
| 185 | do_div(c, 1000000000); | ||
| 186 | period_cycles = c; | ||
| 187 | |||
| 188 | prescale = period_cycles / 0x10000 + 1; | ||
| 189 | |||
| 190 | period_cycles /= prescale; | ||
| 191 | c = (unsigned long long)period_cycles * duty_ns; | ||
| 192 | do_div(c, period_ns); | ||
| 193 | duty_cycles = c; | ||
| 194 | |||
| 195 | /* | ||
| 196 | * according to imx pwm RM, the real period value should be | ||
| 197 | * PERIOD value in PWMPR plus 2. | ||
| 198 | */ | ||
| 199 | if (period_cycles > 2) | ||
| 200 | period_cycles -= 2; | ||
| 201 | else | ||
| 202 | period_cycles = 0; | ||
| 203 | |||
| 204 | writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); | ||
| 205 | writel(period_cycles, imx->mmio_base + MX3_PWMPR); | ||
| 206 | |||
| 207 | cr = MX3_PWMCR_PRESCALER(prescale) | | ||
| 208 | MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | | ||
| 209 | MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH; | ||
| 210 | |||
| 211 | if (enable) | ||
| 212 | cr |= MX3_PWMCR_EN; | ||
| 213 | |||
| 214 | writel(cr, imx->mmio_base + MX3_PWMCR); | ||
| 215 | |||
| 216 | return 0; | ||
| 217 | } | ||
| 218 | |||
| 219 | static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable) | ||
| 220 | { | ||
| 221 | struct imx_chip *imx = to_imx_chip(chip); | ||
| 222 | u32 val; | ||
| 223 | |||
| 224 | val = readl(imx->mmio_base + MX3_PWMCR); | ||
| 225 | |||
| 226 | if (enable) | ||
| 227 | val |= MX3_PWMCR_EN; | ||
| 228 | else | ||
| 229 | val &= ~MX3_PWMCR_EN; | ||
| 230 | |||
| 231 | writel(val, imx->mmio_base + MX3_PWMCR); | ||
| 232 | } | ||
| 233 | |||
| 234 | static int imx_pwm_config(struct pwm_chip *chip, | ||
| 235 | struct pwm_device *pwm, int duty_ns, int period_ns) | ||
| 236 | { | ||
| 237 | struct imx_chip *imx = to_imx_chip(chip); | ||
| 238 | int ret; | ||
| 239 | |||
| 240 | ret = clk_prepare_enable(imx->clk_per); | ||
| 241 | if (ret) | ||
| 242 | return ret; | ||
| 243 | |||
| 244 | ret = imx->config(chip, pwm, duty_ns, period_ns); | ||
| 245 | |||
| 246 | clk_disable_unprepare(imx->clk_per); | ||
| 247 | |||
| 248 | return ret; | ||
| 249 | } | ||
| 250 | |||
| 251 | static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, | 158 | static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, |
| 252 | struct pwm_state *state) | 159 | struct pwm_state *state) |
| 253 | { | 160 | { |
| @@ -314,29 +221,6 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, | |||
| 314 | return 0; | 221 | return 0; |
| 315 | } | 222 | } |
| 316 | 223 | ||
| 317 | static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) | ||
| 318 | { | ||
| 319 | struct imx_chip *imx = to_imx_chip(chip); | ||
| 320 | int ret; | ||
| 321 | |||
| 322 | ret = clk_prepare_enable(imx->clk_per); | ||
| 323 | if (ret) | ||
| 324 | return ret; | ||
| 325 | |||
| 326 | imx->set_enable(chip, true); | ||
| 327 | |||
| 328 | return 0; | ||
| 329 | } | ||
| 330 | |||
| 331 | static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) | ||
| 332 | { | ||
| 333 | struct imx_chip *imx = to_imx_chip(chip); | ||
| 334 | |||
| 335 | imx->set_enable(chip, false); | ||
| 336 | |||
| 337 | clk_disable_unprepare(imx->clk_per); | ||
| 338 | } | ||
| 339 | |||
| 340 | static const struct pwm_ops imx_pwm_ops_v1 = { | 224 | static const struct pwm_ops imx_pwm_ops_v1 = { |
| 341 | .enable = imx_pwm_enable_v1, | 225 | .enable = imx_pwm_enable_v1, |
| 342 | .disable = imx_pwm_disable_v1, | 226 | .disable = imx_pwm_disable_v1, |
| @@ -346,16 +230,10 @@ static const struct pwm_ops imx_pwm_ops_v1 = { | |||
| 346 | 230 | ||
| 347 | static const struct pwm_ops imx_pwm_ops_v2 = { | 231 | static const struct pwm_ops imx_pwm_ops_v2 = { |
| 348 | .apply = imx_pwm_apply_v2, | 232 | .apply = imx_pwm_apply_v2, |
| 349 | .enable = imx_pwm_enable, | ||
| 350 | .disable = imx_pwm_disable, | ||
| 351 | .config = imx_pwm_config, | ||
| 352 | .owner = THIS_MODULE, | 233 | .owner = THIS_MODULE, |
| 353 | }; | 234 | }; |
| 354 | 235 | ||
| 355 | struct imx_pwm_data { | 236 | struct imx_pwm_data { |
| 356 | int (*config)(struct pwm_chip *chip, | ||
| 357 | struct pwm_device *pwm, int duty_ns, int period_ns); | ||
| 358 | void (*set_enable)(struct pwm_chip *chip, bool enable); | ||
| 359 | const struct pwm_ops *ops; | 237 | const struct pwm_ops *ops; |
| 360 | }; | 238 | }; |
| 361 | 239 | ||
| @@ -364,8 +242,6 @@ static struct imx_pwm_data imx_pwm_data_v1 = { | |||
| 364 | }; | 242 | }; |
| 365 | 243 | ||
| 366 | static struct imx_pwm_data imx_pwm_data_v2 = { | 244 | static struct imx_pwm_data imx_pwm_data_v2 = { |
| 367 | .config = imx_pwm_config_v2, | ||
| 368 | .set_enable = imx_pwm_set_enable_v2, | ||
| 369 | .ops = &imx_pwm_ops_v2, | 245 | .ops = &imx_pwm_ops_v2, |
| 370 | }; | 246 | }; |
| 371 | 247 | ||
| @@ -412,9 +288,6 @@ static int imx_pwm_probe(struct platform_device *pdev) | |||
| 412 | if (IS_ERR(imx->mmio_base)) | 288 | if (IS_ERR(imx->mmio_base)) |
| 413 | return PTR_ERR(imx->mmio_base); | 289 | return PTR_ERR(imx->mmio_base); |
| 414 | 290 | ||
| 415 | imx->config = data->config; | ||
| 416 | imx->set_enable = data->set_enable; | ||
| 417 | |||
| 418 | ret = pwmchip_add(&imx->chip); | 291 | ret = pwmchip_add(&imx->chip); |
| 419 | if (ret < 0) | 292 | if (ret < 0) |
| 420 | return ret; | 293 | return ret; |
