diff options
author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-05-25 09:19:55 -0400 |
---|---|---|
committer | Thierry Reding <thierry.reding@gmail.com> | 2015-06-12 05:12:20 -0400 |
commit | 4c027f7ba8520df088d34ae045205a6f8e2a1d76 (patch) | |
tree | 2858c9721a8a1419c19aa24dfd74965cbc9732ff /drivers/pwm/pwm-atmel.c | |
parent | cccb94543c8299e0bc7564cc6f8b26e0f15bafde (diff) |
pwm: atmel: Fix incorrect CDTY value after enabling
CUPD is not flushed before enabling the channel so it will update
CDTY/CPRD just after one period. So we always set CUPD, even when the
channel is not enabled.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-atmel.c')
-rw-r--r-- | drivers/pwm/pwm-atmel.c | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index d3c22de9ee47..89f9ca41d9af 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c | |||
@@ -155,24 +155,25 @@ static void atmel_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm, | |||
155 | struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); | 155 | struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); |
156 | unsigned int val; | 156 | unsigned int val; |
157 | 157 | ||
158 | if (test_bit(PWMF_ENABLED, &pwm->flags)) { | ||
159 | /* | ||
160 | * If the PWM channel is enabled, using the update register, | ||
161 | * it needs to set bit 10 of CMR to 0 | ||
162 | */ | ||
163 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty); | ||
164 | 158 | ||
165 | val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR); | 159 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty); |
166 | val &= ~PWM_CMR_UPD_CDTY; | 160 | |
167 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val); | 161 | val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR); |
168 | } else { | 162 | val &= ~PWM_CMR_UPD_CDTY; |
169 | /* | 163 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val); |
170 | * If the PWM channel is disabled, write value to duty and | 164 | |
171 | * period registers directly. | 165 | /* |
172 | */ | 166 | * If the PWM channel is enabled, only update CDTY by using the update |
173 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty); | 167 | * register, it needs to set bit 10 of CMR to 0 |
174 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd); | 168 | */ |
175 | } | 169 | if (test_bit(PWMF_ENABLED, &pwm->flags)) |
170 | return; | ||
171 | /* | ||
172 | * If the PWM channel is disabled, write value to duty and period | ||
173 | * registers directly. | ||
174 | */ | ||
175 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty); | ||
176 | atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd); | ||
176 | } | 177 | } |
177 | 178 | ||
178 | static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, | 179 | static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, |