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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2016-07-04 08:39:48 -0400
committerDarren Hart <dvhart@linux.intel.com>2016-07-06 16:23:53 -0400
commitdf2294fb64285d2d793cf50c682ac4bfddf56c4c (patch)
tree93997485c61090af641180b2494ca9f69b9727f7 /drivers/platform/x86
parent696789343b56f3efa26da29eb5b442b673bd83c8 (diff)
intel_pmc_core: Convert to DEFINE_DEBUGFS_ATTRIBUTE
Refactor the code to use the recently introduced DEFINE_DEBUGFS_ATTRIBUTE() macro to eliminate boilerplate code. Make the absence of DEBUG_FS a non-fatal error. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-and-tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86')
-rw-r--r--drivers/platform/x86/intel_pmc_core.c45
-rw-r--r--drivers/platform/x86/intel_pmc_core.h3
2 files changed, 11 insertions, 37 deletions
diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index 2776bec89c88..d8379cd86516 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/pci.h> 25#include <linux/pci.h>
26#include <linux/seq_file.h>
27 26
28#include <asm/cpu_device_id.h> 27#include <asm/cpu_device_id.h>
29#include <asm/pmc_core.h> 28#include <asm/pmc_core.h>
@@ -77,30 +76,18 @@ int intel_pmc_slp_s0_counter_read(u32 *data)
77} 76}
78EXPORT_SYMBOL_GPL(intel_pmc_slp_s0_counter_read); 77EXPORT_SYMBOL_GPL(intel_pmc_slp_s0_counter_read);
79 78
80#if IS_ENABLED(CONFIG_DEBUG_FS) 79static int pmc_core_dev_state_get(void *data, u64 *val)
81static int pmc_core_dev_state_show(struct seq_file *s, void *unused)
82{ 80{
83 struct pmc_dev *pmcdev = s->private; 81 struct pmc_dev *pmcdev = data;
84 u32 counter_val; 82 u32 value;
85 83
86 counter_val = pmc_core_reg_read(pmcdev, 84 value = pmc_core_reg_read(pmcdev, SPT_PMC_SLP_S0_RES_COUNTER_OFFSET);
87 SPT_PMC_SLP_S0_RES_COUNTER_OFFSET); 85 *val = pmc_core_adjust_slp_s0_step(value);
88 seq_printf(s, "%u\n", pmc_core_adjust_slp_s0_step(counter_val));
89 86
90 return 0; 87 return 0;
91} 88}
92 89
93static int pmc_core_dev_state_open(struct inode *inode, struct file *file) 90DEFINE_DEBUGFS_ATTRIBUTE(pmc_core_dev_state, pmc_core_dev_state_get, NULL, "%llu\n");
94{
95 return single_open(file, pmc_core_dev_state_show, inode->i_private);
96}
97
98static const struct file_operations pmc_core_dev_state_ops = {
99 .open = pmc_core_dev_state_open,
100 .read = seq_read,
101 .llseek = seq_lseek,
102 .release = single_release,
103};
104 91
105static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) 92static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
106{ 93{
@@ -112,12 +99,12 @@ static int pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
112 struct dentry *dir, *file; 99 struct dentry *dir, *file;
113 100
114 dir = debugfs_create_dir("pmc_core", NULL); 101 dir = debugfs_create_dir("pmc_core", NULL);
115 if (!dir) 102 if (IS_ERR_OR_NULL(dir))
116 return -ENOMEM; 103 return -ENOMEM;
117 104
118 pmcdev->dbgfs_dir = dir; 105 pmcdev->dbgfs_dir = dir;
119 file = debugfs_create_file("slp_s0_residency_usec", S_IFREG | S_IRUGO, 106 file = debugfs_create_file("slp_s0_residency_usec", S_IFREG | S_IRUGO,
120 dir, pmcdev, &pmc_core_dev_state_ops); 107 dir, pmcdev, &pmc_core_dev_state);
121 108
122 if (!file) { 109 if (!file) {
123 pmc_core_dbgfs_unregister(pmcdev); 110 pmc_core_dbgfs_unregister(pmcdev);
@@ -126,16 +113,6 @@ static int pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
126 113
127 return 0; 114 return 0;
128} 115}
129#else
130static inline int pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
131{
132 return 0;
133}
134
135static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
136{
137}
138#endif /* CONFIG_DEBUG_FS */
139 116
140static const struct x86_cpu_id intel_pmc_core_ids[] = { 117static const struct x86_cpu_id intel_pmc_core_ids[] = {
141 { X86_VENDOR_INTEL, 6, 0x4e, X86_FEATURE_MWAIT, 118 { X86_VENDOR_INTEL, 6, 0x4e, X86_FEATURE_MWAIT,
@@ -182,10 +159,8 @@ static int pmc_core_probe(struct pci_dev *dev, const struct pci_device_id *id)
182 } 159 }
183 160
184 err = pmc_core_dbgfs_register(pmcdev); 161 err = pmc_core_dbgfs_register(pmcdev);
185 if (err < 0) { 162 if (err < 0)
186 dev_err(&dev->dev, "PMC Core: debugfs register failed.\n"); 163 dev_warn(&dev->dev, "PMC Core: debugfs register failed.\n");
187 return err;
188 }
189 164
190 pmc.has_slp_s0_res = true; 165 pmc.has_slp_s0_res = true;
191 return 0; 166 return 0;
diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h
index a9dadaf787c1..e3f671f4d122 100644
--- a/drivers/platform/x86/intel_pmc_core.h
+++ b/drivers/platform/x86/intel_pmc_core.h
@@ -23,6 +23,7 @@
23 23
24/* Sunrise Point Power Management Controller PCI Device ID */ 24/* Sunrise Point Power Management Controller PCI Device ID */
25#define SPT_PMC_PCI_DEVICE_ID 0x9d21 25#define SPT_PMC_PCI_DEVICE_ID 0x9d21
26
26#define SPT_PMC_BASE_ADDR_OFFSET 0x48 27#define SPT_PMC_BASE_ADDR_OFFSET 0x48
27#define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET 0x13c 28#define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET 0x13c
28#define SPT_PMC_MMIO_REG_LEN 0x100 29#define SPT_PMC_MMIO_REG_LEN 0x100
@@ -42,9 +43,7 @@
42struct pmc_dev { 43struct pmc_dev {
43 u32 base_addr; 44 u32 base_addr;
44 void __iomem *regbase; 45 void __iomem *regbase;
45#if IS_ENABLED(CONFIG_DEBUG_FS)
46 struct dentry *dbgfs_dir; 46 struct dentry *dbgfs_dir;
47#endif /* CONFIG_DEBUG_FS */
48 bool has_slp_s0_res; 47 bool has_slp_s0_res;
49}; 48};
50 49