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authorChakravarty, Souvik K <souvik.k.chakravarty@intel.com>2017-11-24 08:34:41 -0500
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-11-27 06:39:11 -0500
commit9c916549c0345a054431abdc4f2d9ba48e856f80 (patch)
tree53d646306fe50b63ef3a543593156d373dcb321f /drivers/platform/x86/intel_pmc_ipc.c
parent2448f44f31625610ddeafc9c7642da8a78d93c7b (diff)
platform/x86: intel_pmc_ipc: Add read64 API
Add intel_pmc_gcr_read64() API for reading from 64-bit GCR registers. This API will be called from intel_telemetry. Update description of intel_pmc_gcr_read(). Signed-off-by: Souvik Kumar Chakravarty <souvik.k.chakravarty@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86/intel_pmc_ipc.c')
-rw-r--r--drivers/platform/x86/intel_pmc_ipc.c33
1 files changed, 31 insertions, 2 deletions
diff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c
index e03fa31446ca..e7edc8c63936 100644
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -215,11 +215,11 @@ static inline int is_gcr_valid(u32 offset)
215} 215}
216 216
217/** 217/**
218 * intel_pmc_gcr_read() - Read PMC GCR register 218 * intel_pmc_gcr_read() - Read a 32-bit PMC GCR register
219 * @offset: offset of GCR register from GCR address base 219 * @offset: offset of GCR register from GCR address base
220 * @data: data pointer for storing the register output 220 * @data: data pointer for storing the register output
221 * 221 *
222 * Reads the PMC GCR register of given offset. 222 * Reads the 32-bit PMC GCR register at given offset.
223 * 223 *
224 * Return: negative value on error or 0 on success. 224 * Return: negative value on error or 0 on success.
225 */ 225 */
@@ -244,6 +244,35 @@ int intel_pmc_gcr_read(u32 offset, u32 *data)
244EXPORT_SYMBOL_GPL(intel_pmc_gcr_read); 244EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);
245 245
246/** 246/**
247 * intel_pmc_gcr_read64() - Read a 64-bit PMC GCR register
248 * @offset: offset of GCR register from GCR address base
249 * @data: data pointer for storing the register output
250 *
251 * Reads the 64-bit PMC GCR register at given offset.
252 *
253 * Return: negative value on error or 0 on success.
254 */
255int intel_pmc_gcr_read64(u32 offset, u64 *data)
256{
257 int ret;
258
259 spin_lock(&ipcdev.gcr_lock);
260
261 ret = is_gcr_valid(offset);
262 if (ret < 0) {
263 spin_unlock(&ipcdev.gcr_lock);
264 return ret;
265 }
266
267 *data = readq(ipcdev.gcr_mem_base + offset);
268
269 spin_unlock(&ipcdev.gcr_lock);
270
271 return 0;
272}
273EXPORT_SYMBOL_GPL(intel_pmc_gcr_read64);
274
275/**
247 * intel_pmc_gcr_write() - Write PMC GCR register 276 * intel_pmc_gcr_write() - Write PMC GCR register
248 * @offset: offset of GCR register from GCR address base 277 * @offset: offset of GCR register from GCR address base
249 * @data: register update value 278 * @data: register update value