Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - The Qualcomm external bus interface 2 (EBI2), used in some of their
     mobile phone chips for connecting flash memory, LCD displays or
     other peripherals

   - Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
     the EFUSE based on that firmware interface.

   - Perf support for the AppliedMicro X-Gene performance monitor unit

   - Reset driver for STMicroelectronics STM32

   - Reset driver for SocioNext UniPhier SoCs

  Aside from these, there are minor updates to SoC-specific bus,
  clocksource, firmware, pinctrl, reset, rtc and pmic drivers"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
  bus: qcom-ebi2: depend on HAS_IOMEM
  pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
  clk: mvebu: Add clk support for the orion5x SoC mv88f5181
  dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
  clocksource: exynos_mct: Add the support for ARM64
  perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
  Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
  MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
  bus: qcom: add EBI2 driver
  bus: qcom: add EBI2 device tree bindings
  rtc: rtc-pm8xxx: Add support for pm8018 rtc
  nvmem: amlogic: Add Amlogic Meson EFUSE driver
  firmware: Amlogic: Add secure monitor driver
  soc: qcom: smd: Reset rx tail rather than tx
  memory: atmel-sdramc: fix a possible NULL dereference
  reset: hi6220: allow to compile test driver on other architectures
  reset: zynq: add driver Kconfig option
  reset: sunxi: add driver Kconfig option
  reset: stm32: add driver Kconfig option
  reset: socfpga: add driver Kconfig option
  ...

1 files changed, 12 insertions, 11 deletions

diff --git a/drivers/pinctrl/mvebu/pinctrl-orion.c b/drivers/pinctrl/mvebu/pinctrl-orion.c
index 345c3df669a0..84e144167b44 100644
--- a/drivers/pinctrl/mvebu/pinctrl-orion.c
+++ b/drivers/pinctrl/mvebu/pinctrl-orion.c
@@ -64,11 +64,11 @@ static int orion_mpp_ctrl_set(unsigned pid, unsigned long config)
         return 0;
 }
 
-#define V(f5181l, f5182, f5281) \
-        ((f5181l << 0) | (f5182 << 1) | (f5281 << 2))
+#define V(f5181, f5182, f5281) \
+        ((f5181 << 0) | (f5182 << 1) | (f5281 << 2))
 
 enum orion_variant {
-        V_5181L = V(1, 0, 0),
+        V_5181  = V(1, 0, 0),
         V_5182  = V(0, 1, 0),
         V_5281  = V(0, 0, 1),
         V_ALL   = V(1, 1, 1),
@@ -103,13 +103,13 @@ static struct mvebu_mpp_mode orion_mpp_modes[] = {
                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_ALL),
                  MPP_VAR_FUNCTION(0x2, "pci", "req5",       V_ALL),
                  MPP_VAR_FUNCTION(0x4, "nand", "re0",       V_5182 | V_5281),
-                 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181L),
+                 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181),
                  MPP_VAR_FUNCTION(0x5, "sata0", "act",      V_5182)),
         MPP_MODE(7,
                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_ALL),
                  MPP_VAR_FUNCTION(0x2, "pci", "gnt5",       V_ALL),
                  MPP_VAR_FUNCTION(0x4, "nand", "we0",       V_5182 | V_5281),
-                 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181L),
+                 MPP_VAR_FUNCTION(0x5, "pci-1", "clk",      V_5181),
                  MPP_VAR_FUNCTION(0x5, "sata1", "act",      V_5182)),
         MPP_MODE(8,
                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_ALL),
@@ -165,7 +165,7 @@ static struct mvebu_mpp_ctrl orion_mpp_controls[] = {
         MPP_FUNC_CTRL(0, 19, NULL, orion_mpp_ctrl),
 };
 
-static struct pinctrl_gpio_range mv88f5181l_gpio_ranges[] = {
+static struct pinctrl_gpio_range mv88f5181_gpio_ranges[] = {
         MPP_GPIO_RANGE(0, 0, 0, 16),
 };
 
@@ -177,14 +177,14 @@ static struct pinctrl_gpio_range mv88f5281_gpio_ranges[] = {
         MPP_GPIO_RANGE(0, 0, 0, 16),
 };
 
-static struct mvebu_pinctrl_soc_info mv88f5181l_info = {
-        .variant = V_5181L,
+static struct mvebu_pinctrl_soc_info mv88f5181_info = {
+        .variant = V_5181,
         .controls = orion_mpp_controls,
         .ncontrols = ARRAY_SIZE(orion_mpp_controls),
         .modes = orion_mpp_modes,
         .nmodes = ARRAY_SIZE(orion_mpp_modes),
-        .gpioranges = mv88f5181l_gpio_ranges,
-        .ngpioranges = ARRAY_SIZE(mv88f5181l_gpio_ranges),
+        .gpioranges = mv88f5181_gpio_ranges,
+        .ngpioranges = ARRAY_SIZE(mv88f5181_gpio_ranges),
 };
 
 static struct mvebu_pinctrl_soc_info mv88f5182_info = {
@@ -212,7 +212,8 @@ static struct mvebu_pinctrl_soc_info mv88f5281_info = {
  * muxing, they are identical.
  */
 static const struct of_device_id orion_pinctrl_of_match[] = {
-        { .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181l_info },
+        { .compatible = "marvell,88f5181-pinctrl", .data = &mv88f5181_info },
+        { .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181_info },
         { .compatible = "marvell,88f5182-pinctrl", .data = &mv88f5182_info },
         { .compatible = "marvell,88f5281-pinctrl", .data = &mv88f5281_info },
         { }