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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-04-17 19:04:30 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-04 08:04:23 -0400
commitbae11d30d0cafdc5824dd6ea0bbb1ef229416b72 (patch)
tree47b4dcb704dadb943c9210a29b10eaee32e170fb /drivers/pinctrl/sh-pfc/pfc-r8a7740.c
parentb7099c498b6cf9f53bb392f7b0087ad212299707 (diff)
sh-pfc: r8a7740: Add GETHER pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7740.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7740.c82
1 files changed, 82 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index f17a39ad77a2..1b98990c3e15 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -1795,6 +1795,72 @@ static const unsigned int bsc_rdwr_pins[] = {
1795static const unsigned int bsc_rdwr_mux[] = { 1795static const unsigned int bsc_rdwr_mux[] = {
1796 RDWR_MARK, 1796 RDWR_MARK,
1797}; 1797};
1798/* - GETHER ----------------------------------------------------------------- */
1799static const unsigned int gether_rmii_pins[] = {
1800 /* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK, MDC, MDIO */
1801 195, 196, 194, 193, 200, 201, 199, 159, 202, 208,
1802};
1803static const unsigned int gether_rmii_mux[] = {
1804 RMII_RXD0_MARK, RMII_RXD1_MARK, RMII_RX_ER_MARK, RMII_CRS_DV_MARK,
1805 RMII_TXD0_MARK, RMII_TXD1_MARK, RMII_TX_EN_MARK, RMII_REF50CK_MARK,
1806 RMII_MDC_MARK, RMII_MDIO_MARK,
1807};
1808static const unsigned int gether_mii_pins[] = {
1809 /* RXD[0:3], RX_CLK, RX_DV, RX_ER
1810 * TXD[0:3], TX_CLK, TX_EN, TX_ER
1811 * CRS, COL, MDC, MDIO,
1812 */
1813 185, 186, 187, 188, 174, 161, 204,
1814 171, 170, 169, 168, 184, 183, 203,
1815 205, 163, 206, 207,
1816};
1817static const unsigned int gether_mii_mux[] = {
1818 ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK,
1819 ET_RX_CLK_MARK, ET_RX_DV_MARK, ET_RX_ER_MARK,
1820 ET_ETXD0_MARK, ET_ETXD1_MARK, ET_ETXD2_MARK, ET_ETXD3_MARK,
1821 ET_TX_CLK_MARK, ET_TX_EN_MARK, ET_TX_ER_MARK,
1822 ET_CRS_MARK, ET_COL_MARK, ET_MDC_MARK, ET_MDIO_MARK,
1823};
1824static const unsigned int gether_gmii_pins[] = {
1825 /* RXD[0:7], RX_CLK, RX_DV, RX_ER
1826 * TXD[0:7], GTX_CLK, TX_CLK, TX_EN, TX_ER
1827 * CRS, COL, MDC, MDIO, REF125CK_MARK,
1828 */
1829 185, 186, 187, 188, 189, 190, 191, 192, 174, 161, 204,
1830 171, 170, 169, 168, 167, 166, 173, 172, 176, 184, 183, 203,
1831 205, 163, 206, 207,
1832};
1833static const unsigned int gether_gmii_mux[] = {
1834 ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK,
1835 ET_ERXD4_MARK, ET_ERXD5_MARK, ET_ERXD6_MARK, ET_ERXD7_MARK,
1836 ET_RX_CLK_MARK, ET_RX_DV_MARK, ET_RX_ER_MARK,
1837 ET_ETXD0_MARK, ET_ETXD1_MARK, ET_ETXD2_MARK, ET_ETXD3_MARK,
1838 ET_ETXD4_MARK, ET_ETXD5_MARK, ET_ETXD6_MARK, ET_ETXD7_MARK,
1839 ET_GTX_CLK_MARK, ET_TX_CLK_MARK, ET_TX_EN_MARK, ET_TX_ER_MARK,
1840 ET_CRS_MARK, ET_COL_MARK, ET_MDC_MARK, ET_MDIO_MARK,
1841 RMII_REF125CK_MARK,
1842};
1843static const unsigned int gether_int_pins[] = {
1844 /* PHY_INT */
1845 164,
1846};
1847static const unsigned int gether_int_mux[] = {
1848 ET_PHY_INT_MARK,
1849};
1850static const unsigned int gether_link_pins[] = {
1851 /* LINK */
1852 177,
1853};
1854static const unsigned int gether_link_mux[] = {
1855 ET_LINK_MARK,
1856};
1857static const unsigned int gether_wol_pins[] = {
1858 /* WOL */
1859 175,
1860};
1861static const unsigned int gether_wol_mux[] = {
1862 ET_WOL_MARK,
1863};
1798/* - INTC ------------------------------------------------------------------- */ 1864/* - INTC ------------------------------------------------------------------- */
1799IRQC_PINS_MUX(0, 0, 2); 1865IRQC_PINS_MUX(0, 0, 2);
1800IRQC_PINS_MUX(0, 1, 13); 1866IRQC_PINS_MUX(0, 1, 13);
@@ -2513,6 +2579,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
2513 SH_PFC_PIN_GROUP(bsc_rd_we32), 2579 SH_PFC_PIN_GROUP(bsc_rd_we32),
2514 SH_PFC_PIN_GROUP(bsc_bs), 2580 SH_PFC_PIN_GROUP(bsc_bs),
2515 SH_PFC_PIN_GROUP(bsc_rdwr), 2581 SH_PFC_PIN_GROUP(bsc_rdwr),
2582 SH_PFC_PIN_GROUP(gether_rmii),
2583 SH_PFC_PIN_GROUP(gether_mii),
2584 SH_PFC_PIN_GROUP(gether_gmii),
2585 SH_PFC_PIN_GROUP(gether_int),
2586 SH_PFC_PIN_GROUP(gether_link),
2587 SH_PFC_PIN_GROUP(gether_wol),
2516 SH_PFC_PIN_GROUP(intc_irq0_0), 2588 SH_PFC_PIN_GROUP(intc_irq0_0),
2517 SH_PFC_PIN_GROUP(intc_irq0_1), 2589 SH_PFC_PIN_GROUP(intc_irq0_1),
2518 SH_PFC_PIN_GROUP(intc_irq1), 2590 SH_PFC_PIN_GROUP(intc_irq1),
@@ -2666,6 +2738,15 @@ static const char * const bsc_groups[] = {
2666 "bsc_rdwr", 2738 "bsc_rdwr",
2667}; 2739};
2668 2740
2741static const char * const gether_groups[] = {
2742 "gether_rmii",
2743 "gether_mii",
2744 "gether_gmii",
2745 "gether_int",
2746 "gether_link",
2747 "gether_wol",
2748};
2749
2669static const char * const intc_groups[] = { 2750static const char * const intc_groups[] = {
2670 "intc_irq0_0", 2751 "intc_irq0_0",
2671 "intc_irq0_1", 2752 "intc_irq0_1",
@@ -2849,6 +2930,7 @@ static const char * const sdhi2_groups[] = {
2849 2930
2850static const struct sh_pfc_function pinmux_functions[] = { 2931static const struct sh_pfc_function pinmux_functions[] = {
2851 SH_PFC_FUNCTION(bsc), 2932 SH_PFC_FUNCTION(bsc),
2933 SH_PFC_FUNCTION(gether),
2852 SH_PFC_FUNCTION(intc), 2934 SH_PFC_FUNCTION(intc),
2853 SH_PFC_FUNCTION(lcd0), 2935 SH_PFC_FUNCTION(lcd0),
2854 SH_PFC_FUNCTION(lcd1), 2936 SH_PFC_FUNCTION(lcd1),