diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2018-01-31 11:10:32 -0500 |
---|---|---|
committer | Bjorn Helgaas <helgaas@kernel.org> | 2018-01-31 11:10:32 -0500 |
commit | 412ee7cd3dc581a37b7d15a5147a556e45445be1 (patch) | |
tree | 3a2acd8e946a8f335c8a7671941733a35c72c58e /drivers/pci | |
parent | 85d24b3fc22265d51aa6e8c9e73552750089fa49 (diff) | |
parent | 80db6f08b7af93eddc9487535e6150b220262637 (diff) |
Merge branch 'pci/misc' into next
* pci/misc:
PCI: Add dummy pci_irqd_intx_xlate() for CONFIG_PCI=n build
PCI: Add wrappers for dev_printk()
PCI: Remove unnecessary messages for memory allocation failures
PCI: Add #defines for Completion Timeout Disable feature
hinic: Replace PCI pool old API
net: e100: Replace PCI pool old API
block: DAC960: Replace PCI pool old API
MAINTAINERS: Include more PCI files
PCI: Remove unneeded kallsyms include
powerpc/pci: Unroll two pass loop when scanning bridges
powerpc/pci: Use for_each_pci_bridge() helper
Diffstat (limited to 'drivers/pci')
34 files changed, 375 insertions, 454 deletions
diff --git a/drivers/pci/access.c b/drivers/pci/access.c index 913d6722ece9..61a45bc0efc8 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c | |||
@@ -333,8 +333,7 @@ static size_t pci_vpd_size(struct pci_dev *dev, size_t old_size) | |||
333 | (tag == PCI_VPD_LTIN_RW_DATA)) { | 333 | (tag == PCI_VPD_LTIN_RW_DATA)) { |
334 | if (pci_read_vpd(dev, off+1, 2, | 334 | if (pci_read_vpd(dev, off+1, 2, |
335 | &header[1]) != 2) { | 335 | &header[1]) != 2) { |
336 | dev_warn(&dev->dev, | 336 | pci_warn(dev, "invalid large VPD tag %02x size at offset %zu", |
337 | "invalid large VPD tag %02x size at offset %zu", | ||
338 | tag, off + 1); | 337 | tag, off + 1); |
339 | return 0; | 338 | return 0; |
340 | } | 339 | } |
@@ -354,8 +353,7 @@ static size_t pci_vpd_size(struct pci_dev *dev, size_t old_size) | |||
354 | if ((tag != PCI_VPD_LTIN_ID_STRING) && | 353 | if ((tag != PCI_VPD_LTIN_ID_STRING) && |
355 | (tag != PCI_VPD_LTIN_RO_DATA) && | 354 | (tag != PCI_VPD_LTIN_RO_DATA) && |
356 | (tag != PCI_VPD_LTIN_RW_DATA)) { | 355 | (tag != PCI_VPD_LTIN_RW_DATA)) { |
357 | dev_warn(&dev->dev, | 356 | pci_warn(dev, "invalid %s VPD tag %02x at offset %zu", |
358 | "invalid %s VPD tag %02x at offset %zu", | ||
359 | (header[0] & PCI_VPD_LRDT) ? "large" : "short", | 357 | (header[0] & PCI_VPD_LRDT) ? "large" : "short", |
360 | tag, off); | 358 | tag, off); |
361 | return 0; | 359 | return 0; |
@@ -402,7 +400,7 @@ static int pci_vpd_wait(struct pci_dev *dev) | |||
402 | max_sleep *= 2; | 400 | max_sleep *= 2; |
403 | } | 401 | } |
404 | 402 | ||
405 | dev_warn(&dev->dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n"); | 403 | pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n"); |
406 | return -ETIMEDOUT; | 404 | return -ETIMEDOUT; |
407 | } | 405 | } |
408 | 406 | ||
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index bc56cf19afd3..efe61c0fb4cb 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c | |||
@@ -289,7 +289,7 @@ bool pci_bus_clip_resource(struct pci_dev *dev, int idx) | |||
289 | res->end = end; | 289 | res->end = end; |
290 | res->flags &= ~IORESOURCE_UNSET; | 290 | res->flags &= ~IORESOURCE_UNSET; |
291 | orig_res.flags &= ~IORESOURCE_UNSET; | 291 | orig_res.flags &= ~IORESOURCE_UNSET; |
292 | dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n", | 292 | pci_printk(KERN_DEBUG, dev, "%pR clipped to %pR\n", |
293 | &orig_res, res); | 293 | &orig_res, res); |
294 | 294 | ||
295 | return true; | 295 | return true; |
@@ -325,7 +325,7 @@ void pci_bus_add_device(struct pci_dev *dev) | |||
325 | dev->match_driver = true; | 325 | dev->match_driver = true; |
326 | retval = device_attach(&dev->dev); | 326 | retval = device_attach(&dev->dev); |
327 | if (retval < 0 && retval != -EPROBE_DEFER) { | 327 | if (retval < 0 && retval != -EPROBE_DEFER) { |
328 | dev_warn(&dev->dev, "device attach failed (%d)\n", retval); | 328 | pci_warn(dev, "device attach failed (%d)\n", retval); |
329 | pci_proc_detach_device(dev); | 329 | pci_proc_detach_device(dev); |
330 | pci_remove_sysfs_dev_files(dev); | 330 | pci_remove_sysfs_dev_files(dev); |
331 | return; | 331 | return; |
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index 5db6f1839dad..96f5b986454a 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c | |||
@@ -811,10 +811,8 @@ void acpiphp_enumerate_slots(struct pci_bus *bus) | |||
811 | 811 | ||
812 | handle = adev->handle; | 812 | handle = adev->handle; |
813 | bridge = kzalloc(sizeof(struct acpiphp_bridge), GFP_KERNEL); | 813 | bridge = kzalloc(sizeof(struct acpiphp_bridge), GFP_KERNEL); |
814 | if (!bridge) { | 814 | if (!bridge) |
815 | acpi_handle_err(handle, "No memory for bridge object\n"); | ||
816 | return; | 815 | return; |
817 | } | ||
818 | 816 | ||
819 | INIT_LIST_HEAD(&bridge->slots); | 817 | INIT_LIST_HEAD(&bridge->slots); |
820 | kref_init(&bridge->ref); | 818 | kref_init(&bridge->ref); |
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c index 70967ac75265..27a562618d7f 100644 --- a/drivers/pci/hotplug/cpqphp_core.c +++ b/drivers/pci/hotplug/cpqphp_core.c | |||
@@ -835,7 +835,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
835 | 835 | ||
836 | bus = pdev->subordinate; | 836 | bus = pdev->subordinate; |
837 | if (!bus) { | 837 | if (!bus) { |
838 | dev_notice(&pdev->dev, "the device is not a bridge, skipping\n"); | 838 | pci_notice(pdev, "the device is not a bridge, skipping\n"); |
839 | rc = -ENODEV; | 839 | rc = -ENODEV; |
840 | goto err_disable_device; | 840 | goto err_disable_device; |
841 | } | 841 | } |
@@ -883,7 +883,6 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
883 | 883 | ||
884 | ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL); | 884 | ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL); |
885 | if (!ctrl) { | 885 | if (!ctrl) { |
886 | err("%s : out of memory\n", __func__); | ||
887 | rc = -ENOMEM; | 886 | rc = -ENOMEM; |
888 | goto err_disable_device; | 887 | goto err_disable_device; |
889 | } | 888 | } |
diff --git a/drivers/pci/hotplug/ibmphp_core.c b/drivers/pci/hotplug/ibmphp_core.c index 92dd88296817..4985e681e48f 100644 --- a/drivers/pci/hotplug/ibmphp_core.c +++ b/drivers/pci/hotplug/ibmphp_core.c | |||
@@ -603,10 +603,8 @@ int ibmphp_update_slot_info(struct slot *slot_cur) | |||
603 | u8 mode; | 603 | u8 mode; |
604 | 604 | ||
605 | info = kmalloc(sizeof(struct hotplug_slot_info), GFP_KERNEL); | 605 | info = kmalloc(sizeof(struct hotplug_slot_info), GFP_KERNEL); |
606 | if (!info) { | 606 | if (!info) |
607 | err("out of system memory\n"); | ||
608 | return -ENOMEM; | 607 | return -ENOMEM; |
609 | } | ||
610 | 608 | ||
611 | info->power_status = SLOT_PWRGD(slot_cur->status); | 609 | info->power_status = SLOT_PWRGD(slot_cur->status); |
612 | info->attention_status = SLOT_ATTN(slot_cur->status, | 610 | info->attention_status = SLOT_ATTN(slot_cur->status, |
@@ -735,14 +733,12 @@ static u8 bus_structure_fixup(u8 busno) | |||
735 | return 1; | 733 | return 1; |
736 | 734 | ||
737 | bus = kmalloc(sizeof(*bus), GFP_KERNEL); | 735 | bus = kmalloc(sizeof(*bus), GFP_KERNEL); |
738 | if (!bus) { | 736 | if (!bus) |
739 | err("%s - out of memory\n", __func__); | ||
740 | return 1; | 737 | return 1; |
741 | } | 738 | |
742 | dev = kmalloc(sizeof(*dev), GFP_KERNEL); | 739 | dev = kmalloc(sizeof(*dev), GFP_KERNEL); |
743 | if (!dev) { | 740 | if (!dev) { |
744 | kfree(bus); | 741 | kfree(bus); |
745 | err("%s - out of memory\n", __func__); | ||
746 | return 1; | 742 | return 1; |
747 | } | 743 | } |
748 | 744 | ||
@@ -1102,7 +1098,6 @@ static int enable_slot(struct hotplug_slot *hs) | |||
1102 | if (!slot_cur->func) { | 1098 | if (!slot_cur->func) { |
1103 | /* We cannot do update_slot_info here, since no memory for | 1099 | /* We cannot do update_slot_info here, since no memory for |
1104 | * kmalloc n.e.ways, and update_slot_info allocates some */ | 1100 | * kmalloc n.e.ways, and update_slot_info allocates some */ |
1105 | err("out of system memory\n"); | ||
1106 | rc = -ENOMEM; | 1101 | rc = -ENOMEM; |
1107 | goto error_power; | 1102 | goto error_power; |
1108 | } | 1103 | } |
@@ -1209,7 +1204,6 @@ int ibmphp_do_disable_slot(struct slot *slot_cur) | |||
1209 | /* We need this for functions that were there on bootup */ | 1204 | /* We need this for functions that were there on bootup */ |
1210 | slot_cur->func = kzalloc(sizeof(struct pci_func), GFP_KERNEL); | 1205 | slot_cur->func = kzalloc(sizeof(struct pci_func), GFP_KERNEL); |
1211 | if (!slot_cur->func) { | 1206 | if (!slot_cur->func) { |
1212 | err("out of system memory\n"); | ||
1213 | rc = -ENOMEM; | 1207 | rc = -ENOMEM; |
1214 | goto error; | 1208 | goto error; |
1215 | } | 1209 | } |
@@ -1307,7 +1301,6 @@ static int __init ibmphp_init(void) | |||
1307 | 1301 | ||
1308 | ibmphp_pci_bus = kmalloc(sizeof(*ibmphp_pci_bus), GFP_KERNEL); | 1302 | ibmphp_pci_bus = kmalloc(sizeof(*ibmphp_pci_bus), GFP_KERNEL); |
1309 | if (!ibmphp_pci_bus) { | 1303 | if (!ibmphp_pci_bus) { |
1310 | err("out of memory\n"); | ||
1311 | rc = -ENOMEM; | 1304 | rc = -ENOMEM; |
1312 | goto exit; | 1305 | goto exit; |
1313 | } | 1306 | } |
diff --git a/drivers/pci/hotplug/ibmphp_pci.c b/drivers/pci/hotplug/ibmphp_pci.c index 25edd0b18b75..c7ce7d8cf998 100644 --- a/drivers/pci/hotplug/ibmphp_pci.c +++ b/drivers/pci/hotplug/ibmphp_pci.c | |||
@@ -167,10 +167,9 @@ int ibmphp_configure_card(struct pci_func *func, u8 slotno) | |||
167 | goto error; | 167 | goto error; |
168 | } | 168 | } |
169 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); | 169 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
170 | if (!newfunc) { | 170 | if (!newfunc) |
171 | err("out of system memory\n"); | ||
172 | return -ENOMEM; | 171 | return -ENOMEM; |
173 | } | 172 | |
174 | newfunc->busno = cur_func->busno; | 173 | newfunc->busno = cur_func->busno; |
175 | newfunc->device = device; | 174 | newfunc->device = device; |
176 | cur_func->next = newfunc; | 175 | cur_func->next = newfunc; |
@@ -205,10 +204,9 @@ int ibmphp_configure_card(struct pci_func *func, u8 slotno) | |||
205 | for (i = 0; i < 32; i++) { | 204 | for (i = 0; i < 32; i++) { |
206 | if (func->devices[i]) { | 205 | if (func->devices[i]) { |
207 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); | 206 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
208 | if (!newfunc) { | 207 | if (!newfunc) |
209 | err("out of system memory\n"); | ||
210 | return -ENOMEM; | 208 | return -ENOMEM; |
211 | } | 209 | |
212 | newfunc->busno = sec_number; | 210 | newfunc->busno = sec_number; |
213 | newfunc->device = (u8) i; | 211 | newfunc->device = (u8) i; |
214 | for (j = 0; j < 4; j++) | 212 | for (j = 0; j < 4; j++) |
@@ -233,10 +231,9 @@ int ibmphp_configure_card(struct pci_func *func, u8 slotno) | |||
233 | } | 231 | } |
234 | 232 | ||
235 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); | 233 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
236 | if (!newfunc) { | 234 | if (!newfunc) |
237 | err("out of system memory\n"); | ||
238 | return -ENOMEM; | 235 | return -ENOMEM; |
239 | } | 236 | |
240 | newfunc->busno = cur_func->busno; | 237 | newfunc->busno = cur_func->busno; |
241 | newfunc->device = device; | 238 | newfunc->device = device; |
242 | for (j = 0; j < 4; j++) | 239 | for (j = 0; j < 4; j++) |
@@ -279,10 +276,9 @@ int ibmphp_configure_card(struct pci_func *func, u8 slotno) | |||
279 | if (func->devices[i]) { | 276 | if (func->devices[i]) { |
280 | debug("inside for loop, device is %x\n", i); | 277 | debug("inside for loop, device is %x\n", i); |
281 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); | 278 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
282 | if (!newfunc) { | 279 | if (!newfunc) |
283 | err(" out of system memory\n"); | ||
284 | return -ENOMEM; | 280 | return -ENOMEM; |
285 | } | 281 | |
286 | newfunc->busno = sec_number; | 282 | newfunc->busno = sec_number; |
287 | newfunc->device = (u8) i; | 283 | newfunc->device = (u8) i; |
288 | for (j = 0; j < 4; j++) | 284 | for (j = 0; j < 4; j++) |
@@ -405,10 +401,9 @@ static int configure_device(struct pci_func *func) | |||
405 | 401 | ||
406 | io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 402 | io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
407 | 403 | ||
408 | if (!io[count]) { | 404 | if (!io[count]) |
409 | err("out of system memory\n"); | ||
410 | return -ENOMEM; | 405 | return -ENOMEM; |
411 | } | 406 | |
412 | io[count]->type = IO; | 407 | io[count]->type = IO; |
413 | io[count]->busno = func->busno; | 408 | io[count]->busno = func->busno; |
414 | io[count]->devfunc = PCI_DEVFN(func->device, func->function); | 409 | io[count]->devfunc = PCI_DEVFN(func->device, func->function); |
@@ -442,10 +437,9 @@ static int configure_device(struct pci_func *func) | |||
442 | debug("len[count] in PFMEM %x, count %d\n", len[count], count); | 437 | debug("len[count] in PFMEM %x, count %d\n", len[count], count); |
443 | 438 | ||
444 | pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 439 | pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
445 | if (!pfmem[count]) { | 440 | if (!pfmem[count]) |
446 | err("out of system memory\n"); | ||
447 | return -ENOMEM; | 441 | return -ENOMEM; |
448 | } | 442 | |
449 | pfmem[count]->type = PFMEM; | 443 | pfmem[count]->type = PFMEM; |
450 | pfmem[count]->busno = func->busno; | 444 | pfmem[count]->busno = func->busno; |
451 | pfmem[count]->devfunc = PCI_DEVFN(func->device, | 445 | pfmem[count]->devfunc = PCI_DEVFN(func->device, |
@@ -458,7 +452,6 @@ static int configure_device(struct pci_func *func) | |||
458 | } else { | 452 | } else { |
459 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); | 453 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); |
460 | if (!mem_tmp) { | 454 | if (!mem_tmp) { |
461 | err("out of system memory\n"); | ||
462 | kfree(pfmem[count]); | 455 | kfree(pfmem[count]); |
463 | return -ENOMEM; | 456 | return -ENOMEM; |
464 | } | 457 | } |
@@ -508,10 +501,9 @@ static int configure_device(struct pci_func *func) | |||
508 | debug("len[count] in Mem %x, count %d\n", len[count], count); | 501 | debug("len[count] in Mem %x, count %d\n", len[count], count); |
509 | 502 | ||
510 | mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 503 | mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
511 | if (!mem[count]) { | 504 | if (!mem[count]) |
512 | err("out of system memory\n"); | ||
513 | return -ENOMEM; | 505 | return -ENOMEM; |
514 | } | 506 | |
515 | mem[count]->type = MEM; | 507 | mem[count]->type = MEM; |
516 | mem[count]->busno = func->busno; | 508 | mem[count]->busno = func->busno; |
517 | mem[count]->devfunc = PCI_DEVFN(func->device, | 509 | mem[count]->devfunc = PCI_DEVFN(func->device, |
@@ -674,7 +666,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
674 | bus_io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 666 | bus_io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
675 | 667 | ||
676 | if (!bus_io[count]) { | 668 | if (!bus_io[count]) { |
677 | err("out of system memory\n"); | ||
678 | retval = -ENOMEM; | 669 | retval = -ENOMEM; |
679 | goto error; | 670 | goto error; |
680 | } | 671 | } |
@@ -706,7 +697,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
706 | 697 | ||
707 | bus_pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 698 | bus_pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
708 | if (!bus_pfmem[count]) { | 699 | if (!bus_pfmem[count]) { |
709 | err("out of system memory\n"); | ||
710 | retval = -ENOMEM; | 700 | retval = -ENOMEM; |
711 | goto error; | 701 | goto error; |
712 | } | 702 | } |
@@ -722,7 +712,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
722 | } else { | 712 | } else { |
723 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); | 713 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); |
724 | if (!mem_tmp) { | 714 | if (!mem_tmp) { |
725 | err("out of system memory\n"); | ||
726 | retval = -ENOMEM; | 715 | retval = -ENOMEM; |
727 | goto error; | 716 | goto error; |
728 | } | 717 | } |
@@ -763,7 +752,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
763 | 752 | ||
764 | bus_mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 753 | bus_mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
765 | if (!bus_mem[count]) { | 754 | if (!bus_mem[count]) { |
766 | err("out of system memory\n"); | ||
767 | retval = -ENOMEM; | 755 | retval = -ENOMEM; |
768 | goto error; | 756 | goto error; |
769 | } | 757 | } |
@@ -834,7 +822,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
834 | io = kzalloc(sizeof(*io), GFP_KERNEL); | 822 | io = kzalloc(sizeof(*io), GFP_KERNEL); |
835 | 823 | ||
836 | if (!io) { | 824 | if (!io) { |
837 | err("out of system memory\n"); | ||
838 | retval = -ENOMEM; | 825 | retval = -ENOMEM; |
839 | goto error; | 826 | goto error; |
840 | } | 827 | } |
@@ -856,7 +843,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
856 | debug("it wants %x memory behind the bridge\n", amount_needed->mem); | 843 | debug("it wants %x memory behind the bridge\n", amount_needed->mem); |
857 | mem = kzalloc(sizeof(*mem), GFP_KERNEL); | 844 | mem = kzalloc(sizeof(*mem), GFP_KERNEL); |
858 | if (!mem) { | 845 | if (!mem) { |
859 | err("out of system memory\n"); | ||
860 | retval = -ENOMEM; | 846 | retval = -ENOMEM; |
861 | goto error; | 847 | goto error; |
862 | } | 848 | } |
@@ -878,7 +864,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
878 | debug("it wants %x pfmemory behind the bridge\n", amount_needed->pfmem); | 864 | debug("it wants %x pfmemory behind the bridge\n", amount_needed->pfmem); |
879 | pfmem = kzalloc(sizeof(*pfmem), GFP_KERNEL); | 865 | pfmem = kzalloc(sizeof(*pfmem), GFP_KERNEL); |
880 | if (!pfmem) { | 866 | if (!pfmem) { |
881 | err("out of system memory\n"); | ||
882 | retval = -ENOMEM; | 867 | retval = -ENOMEM; |
883 | goto error; | 868 | goto error; |
884 | } | 869 | } |
@@ -893,7 +878,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
893 | } else { | 878 | } else { |
894 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); | 879 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); |
895 | if (!mem_tmp) { | 880 | if (!mem_tmp) { |
896 | err("out of system memory\n"); | ||
897 | retval = -ENOMEM; | 881 | retval = -ENOMEM; |
898 | goto error; | 882 | goto error; |
899 | } | 883 | } |
@@ -924,7 +908,6 @@ static int configure_bridge(struct pci_func **func_passed, u8 slotno) | |||
924 | if (!bus) { | 908 | if (!bus) { |
925 | bus = kzalloc(sizeof(*bus), GFP_KERNEL); | 909 | bus = kzalloc(sizeof(*bus), GFP_KERNEL); |
926 | if (!bus) { | 910 | if (!bus) { |
927 | err("out of system memory\n"); | ||
928 | retval = -ENOMEM; | 911 | retval = -ENOMEM; |
929 | goto error; | 912 | goto error; |
930 | } | 913 | } |
@@ -1652,10 +1635,9 @@ static int add_new_bus(struct bus_node *bus, struct resource_node *io, struct re | |||
1652 | } | 1635 | } |
1653 | if (io) { | 1636 | if (io) { |
1654 | io_range = kzalloc(sizeof(*io_range), GFP_KERNEL); | 1637 | io_range = kzalloc(sizeof(*io_range), GFP_KERNEL); |
1655 | if (!io_range) { | 1638 | if (!io_range) |
1656 | err("out of system memory\n"); | ||
1657 | return -ENOMEM; | 1639 | return -ENOMEM; |
1658 | } | 1640 | |
1659 | io_range->start = io->start; | 1641 | io_range->start = io->start; |
1660 | io_range->end = io->end; | 1642 | io_range->end = io->end; |
1661 | io_range->rangeno = 1; | 1643 | io_range->rangeno = 1; |
@@ -1664,10 +1646,9 @@ static int add_new_bus(struct bus_node *bus, struct resource_node *io, struct re | |||
1664 | } | 1646 | } |
1665 | if (mem) { | 1647 | if (mem) { |
1666 | mem_range = kzalloc(sizeof(*mem_range), GFP_KERNEL); | 1648 | mem_range = kzalloc(sizeof(*mem_range), GFP_KERNEL); |
1667 | if (!mem_range) { | 1649 | if (!mem_range) |
1668 | err("out of system memory\n"); | ||
1669 | return -ENOMEM; | 1650 | return -ENOMEM; |
1670 | } | 1651 | |
1671 | mem_range->start = mem->start; | 1652 | mem_range->start = mem->start; |
1672 | mem_range->end = mem->end; | 1653 | mem_range->end = mem->end; |
1673 | mem_range->rangeno = 1; | 1654 | mem_range->rangeno = 1; |
@@ -1676,10 +1657,9 @@ static int add_new_bus(struct bus_node *bus, struct resource_node *io, struct re | |||
1676 | } | 1657 | } |
1677 | if (pfmem) { | 1658 | if (pfmem) { |
1678 | pfmem_range = kzalloc(sizeof(*pfmem_range), GFP_KERNEL); | 1659 | pfmem_range = kzalloc(sizeof(*pfmem_range), GFP_KERNEL); |
1679 | if (!pfmem_range) { | 1660 | if (!pfmem_range) |
1680 | err("out of system memory\n"); | ||
1681 | return -ENOMEM; | 1661 | return -ENOMEM; |
1682 | } | 1662 | |
1683 | pfmem_range->start = pfmem->start; | 1663 | pfmem_range->start = pfmem->start; |
1684 | pfmem_range->end = pfmem->end; | 1664 | pfmem_range->end = pfmem->end; |
1685 | pfmem_range->rangeno = 1; | 1665 | pfmem_range->rangeno = 1; |
diff --git a/drivers/pci/hotplug/ibmphp_res.c b/drivers/pci/hotplug/ibmphp_res.c index aee6e41001e1..b58a7a641e0e 100644 --- a/drivers/pci/hotplug/ibmphp_res.c +++ b/drivers/pci/hotplug/ibmphp_res.c | |||
@@ -56,10 +56,8 @@ static struct bus_node * __init alloc_error_bus(struct ebda_pci_rsrc *curr, u8 b | |||
56 | } | 56 | } |
57 | 57 | ||
58 | newbus = kzalloc(sizeof(struct bus_node), GFP_KERNEL); | 58 | newbus = kzalloc(sizeof(struct bus_node), GFP_KERNEL); |
59 | if (!newbus) { | 59 | if (!newbus) |
60 | err("out of system memory\n"); | ||
61 | return NULL; | 60 | return NULL; |
62 | } | ||
63 | 61 | ||
64 | if (flag) | 62 | if (flag) |
65 | newbus->busno = busno; | 63 | newbus->busno = busno; |
@@ -79,10 +77,9 @@ static struct resource_node * __init alloc_resources(struct ebda_pci_rsrc *curr) | |||
79 | } | 77 | } |
80 | 78 | ||
81 | rs = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 79 | rs = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
82 | if (!rs) { | 80 | if (!rs) |
83 | err("out of system memory\n"); | ||
84 | return NULL; | 81 | return NULL; |
85 | } | 82 | |
86 | rs->busno = curr->bus_num; | 83 | rs->busno = curr->bus_num; |
87 | rs->devfunc = curr->dev_fun; | 84 | rs->devfunc = curr->dev_fun; |
88 | rs->start = curr->start_addr; | 85 | rs->start = curr->start_addr; |
@@ -99,10 +96,9 @@ static int __init alloc_bus_range(struct bus_node **new_bus, struct range_node * | |||
99 | 96 | ||
100 | if (first_bus) { | 97 | if (first_bus) { |
101 | newbus = kzalloc(sizeof(struct bus_node), GFP_KERNEL); | 98 | newbus = kzalloc(sizeof(struct bus_node), GFP_KERNEL); |
102 | if (!newbus) { | 99 | if (!newbus) |
103 | err("out of system memory.\n"); | ||
104 | return -ENOMEM; | 100 | return -ENOMEM; |
105 | } | 101 | |
106 | newbus->busno = curr->bus_num; | 102 | newbus->busno = curr->bus_num; |
107 | } else { | 103 | } else { |
108 | newbus = *new_bus; | 104 | newbus = *new_bus; |
@@ -123,7 +119,6 @@ static int __init alloc_bus_range(struct bus_node **new_bus, struct range_node * | |||
123 | if (!newrange) { | 119 | if (!newrange) { |
124 | if (first_bus) | 120 | if (first_bus) |
125 | kfree(newbus); | 121 | kfree(newbus); |
126 | err("out of system memory\n"); | ||
127 | return -ENOMEM; | 122 | return -ENOMEM; |
128 | } | 123 | } |
129 | newrange->start = curr->start_addr; | 124 | newrange->start = curr->start_addr; |
@@ -1707,10 +1702,9 @@ static int __init once_over(void) | |||
1707 | bus_cur->firstPFMemFromMem = pfmem_cur; | 1702 | bus_cur->firstPFMemFromMem = pfmem_cur; |
1708 | 1703 | ||
1709 | mem = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 1704 | mem = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
1710 | if (!mem) { | 1705 | if (!mem) |
1711 | err("out of system memory\n"); | ||
1712 | return -ENOMEM; | 1706 | return -ENOMEM; |
1713 | } | 1707 | |
1714 | mem->type = MEM; | 1708 | mem->type = MEM; |
1715 | mem->busno = pfmem_cur->busno; | 1709 | mem->busno = pfmem_cur->busno; |
1716 | mem->devfunc = pfmem_cur->devfunc; | 1710 | mem->devfunc = pfmem_cur->devfunc; |
@@ -1989,10 +1983,9 @@ static int __init update_bridge_ranges(struct bus_node **bus) | |||
1989 | 1983 | ||
1990 | if ((start_address) && (start_address <= end_address)) { | 1984 | if ((start_address) && (start_address <= end_address)) { |
1991 | range = kzalloc(sizeof(struct range_node), GFP_KERNEL); | 1985 | range = kzalloc(sizeof(struct range_node), GFP_KERNEL); |
1992 | if (!range) { | 1986 | if (!range) |
1993 | err("out of system memory\n"); | ||
1994 | return -ENOMEM; | 1987 | return -ENOMEM; |
1995 | } | 1988 | |
1996 | range->start = start_address; | 1989 | range->start = start_address; |
1997 | range->end = end_address + 0xfff; | 1990 | range->end = end_address + 0xfff; |
1998 | 1991 | ||
@@ -2016,7 +2009,6 @@ static int __init update_bridge_ranges(struct bus_node **bus) | |||
2016 | io = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 2009 | io = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
2017 | if (!io) { | 2010 | if (!io) { |
2018 | kfree(range); | 2011 | kfree(range); |
2019 | err("out of system memory\n"); | ||
2020 | return -ENOMEM; | 2012 | return -ENOMEM; |
2021 | } | 2013 | } |
2022 | io->type = IO; | 2014 | io->type = IO; |
@@ -2038,10 +2030,9 @@ static int __init update_bridge_ranges(struct bus_node **bus) | |||
2038 | if ((start_address) && (start_address <= end_address)) { | 2030 | if ((start_address) && (start_address <= end_address)) { |
2039 | 2031 | ||
2040 | range = kzalloc(sizeof(struct range_node), GFP_KERNEL); | 2032 | range = kzalloc(sizeof(struct range_node), GFP_KERNEL); |
2041 | if (!range) { | 2033 | if (!range) |
2042 | err("out of system memory\n"); | ||
2043 | return -ENOMEM; | 2034 | return -ENOMEM; |
2044 | } | 2035 | |
2045 | range->start = start_address; | 2036 | range->start = start_address; |
2046 | range->end = end_address + 0xfffff; | 2037 | range->end = end_address + 0xfffff; |
2047 | 2038 | ||
@@ -2066,7 +2057,6 @@ static int __init update_bridge_ranges(struct bus_node **bus) | |||
2066 | mem = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 2057 | mem = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
2067 | if (!mem) { | 2058 | if (!mem) { |
2068 | kfree(range); | 2059 | kfree(range); |
2069 | err("out of system memory\n"); | ||
2070 | return -ENOMEM; | 2060 | return -ENOMEM; |
2071 | } | 2061 | } |
2072 | mem->type = MEM; | 2062 | mem->type = MEM; |
@@ -2092,10 +2082,9 @@ static int __init update_bridge_ranges(struct bus_node **bus) | |||
2092 | if ((start_address) && (start_address <= end_address)) { | 2082 | if ((start_address) && (start_address <= end_address)) { |
2093 | 2083 | ||
2094 | range = kzalloc(sizeof(struct range_node), GFP_KERNEL); | 2084 | range = kzalloc(sizeof(struct range_node), GFP_KERNEL); |
2095 | if (!range) { | 2085 | if (!range) |
2096 | err("out of system memory\n"); | ||
2097 | return -ENOMEM; | 2086 | return -ENOMEM; |
2098 | } | 2087 | |
2099 | range->start = start_address; | 2088 | range->start = start_address; |
2100 | range->end = end_address + 0xfffff; | 2089 | range->end = end_address + 0xfffff; |
2101 | 2090 | ||
@@ -2119,7 +2108,6 @@ static int __init update_bridge_ranges(struct bus_node **bus) | |||
2119 | pfmem = kzalloc(sizeof(struct resource_node), GFP_KERNEL); | 2108 | pfmem = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
2120 | if (!pfmem) { | 2109 | if (!pfmem) { |
2121 | kfree(range); | 2110 | kfree(range); |
2122 | err("out of system memory\n"); | ||
2123 | return -ENOMEM; | 2111 | return -ENOMEM; |
2124 | } | 2112 | } |
2125 | pfmem->type = PFMEM; | 2113 | pfmem->type = PFMEM; |
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index a89d8b990228..17bea7ccf6d4 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -838,10 +838,9 @@ struct controller *pcie_init(struct pcie_device *dev) | |||
838 | struct pci_dev *pdev = dev->port; | 838 | struct pci_dev *pdev = dev->port; |
839 | 839 | ||
840 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | 840 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
841 | if (!ctrl) { | 841 | if (!ctrl) |
842 | dev_err(&dev->device, "%s: Out of memory\n", __func__); | ||
843 | goto abort; | 842 | goto abort; |
844 | } | 843 | |
845 | ctrl->pcie = dev; | 844 | ctrl->pcie = dev; |
846 | pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap); | 845 | pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap); |
847 | 846 | ||
diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c index 74f6a17e4614..0373b9d88c6d 100644 --- a/drivers/pci/hotplug/pnv_php.c +++ b/drivers/pci/hotplug/pnv_php.c | |||
@@ -266,22 +266,18 @@ static int pnv_php_add_devtree(struct pnv_php_slot *php_slot) | |||
266 | fdt1 = kzalloc(0x10000, GFP_KERNEL); | 266 | fdt1 = kzalloc(0x10000, GFP_KERNEL); |
267 | if (!fdt1) { | 267 | if (!fdt1) { |
268 | ret = -ENOMEM; | 268 | ret = -ENOMEM; |
269 | dev_warn(&php_slot->pdev->dev, "Cannot alloc FDT blob\n"); | ||
270 | goto out; | 269 | goto out; |
271 | } | 270 | } |
272 | 271 | ||
273 | ret = pnv_pci_get_device_tree(php_slot->dn->phandle, fdt1, 0x10000); | 272 | ret = pnv_pci_get_device_tree(php_slot->dn->phandle, fdt1, 0x10000); |
274 | if (ret) { | 273 | if (ret) { |
275 | dev_warn(&php_slot->pdev->dev, "Error %d getting FDT blob\n", | 274 | pci_warn(php_slot->pdev, "Error %d getting FDT blob\n", ret); |
276 | ret); | ||
277 | goto free_fdt1; | 275 | goto free_fdt1; |
278 | } | 276 | } |
279 | 277 | ||
280 | fdt = kzalloc(fdt_totalsize(fdt1), GFP_KERNEL); | 278 | fdt = kzalloc(fdt_totalsize(fdt1), GFP_KERNEL); |
281 | if (!fdt) { | 279 | if (!fdt) { |
282 | ret = -ENOMEM; | 280 | ret = -ENOMEM; |
283 | dev_warn(&php_slot->pdev->dev, "Cannot %d bytes memory\n", | ||
284 | fdt_totalsize(fdt1)); | ||
285 | goto free_fdt1; | 281 | goto free_fdt1; |
286 | } | 282 | } |
287 | 283 | ||
@@ -290,7 +286,7 @@ static int pnv_php_add_devtree(struct pnv_php_slot *php_slot) | |||
290 | dt = of_fdt_unflatten_tree(fdt, php_slot->dn, NULL); | 286 | dt = of_fdt_unflatten_tree(fdt, php_slot->dn, NULL); |
291 | if (!dt) { | 287 | if (!dt) { |
292 | ret = -EINVAL; | 288 | ret = -EINVAL; |
293 | dev_warn(&php_slot->pdev->dev, "Cannot unflatten FDT\n"); | 289 | pci_warn(php_slot->pdev, "Cannot unflatten FDT\n"); |
294 | goto free_fdt; | 290 | goto free_fdt; |
295 | } | 291 | } |
296 | 292 | ||
@@ -300,7 +296,7 @@ static int pnv_php_add_devtree(struct pnv_php_slot *php_slot) | |||
300 | ret = pnv_php_populate_changeset(&php_slot->ocs, php_slot->dn); | 296 | ret = pnv_php_populate_changeset(&php_slot->ocs, php_slot->dn); |
301 | if (ret) { | 297 | if (ret) { |
302 | pnv_php_reverse_nodes(php_slot->dn); | 298 | pnv_php_reverse_nodes(php_slot->dn); |
303 | dev_warn(&php_slot->pdev->dev, "Error %d populating changeset\n", | 299 | pci_warn(php_slot->pdev, "Error %d populating changeset\n", |
304 | ret); | 300 | ret); |
305 | goto free_dt; | 301 | goto free_dt; |
306 | } | 302 | } |
@@ -308,8 +304,7 @@ static int pnv_php_add_devtree(struct pnv_php_slot *php_slot) | |||
308 | php_slot->dn->child = NULL; | 304 | php_slot->dn->child = NULL; |
309 | ret = of_changeset_apply(&php_slot->ocs); | 305 | ret = of_changeset_apply(&php_slot->ocs); |
310 | if (ret) { | 306 | if (ret) { |
311 | dev_warn(&php_slot->pdev->dev, "Error %d applying changeset\n", | 307 | pci_warn(php_slot->pdev, "Error %d applying changeset\n", ret); |
312 | ret); | ||
313 | goto destroy_changeset; | 308 | goto destroy_changeset; |
314 | } | 309 | } |
315 | 310 | ||
@@ -345,14 +340,14 @@ int pnv_php_set_slot_power_state(struct hotplug_slot *slot, | |||
345 | if (be64_to_cpu(msg.params[1]) != php_slot->dn->phandle || | 340 | if (be64_to_cpu(msg.params[1]) != php_slot->dn->phandle || |
346 | be64_to_cpu(msg.params[2]) != state || | 341 | be64_to_cpu(msg.params[2]) != state || |
347 | be64_to_cpu(msg.params[3]) != OPAL_SUCCESS) { | 342 | be64_to_cpu(msg.params[3]) != OPAL_SUCCESS) { |
348 | dev_warn(&php_slot->pdev->dev, "Wrong msg (%lld, %lld, %lld)\n", | 343 | pci_warn(php_slot->pdev, "Wrong msg (%lld, %lld, %lld)\n", |
349 | be64_to_cpu(msg.params[1]), | 344 | be64_to_cpu(msg.params[1]), |
350 | be64_to_cpu(msg.params[2]), | 345 | be64_to_cpu(msg.params[2]), |
351 | be64_to_cpu(msg.params[3])); | 346 | be64_to_cpu(msg.params[3])); |
352 | return -ENOMSG; | 347 | return -ENOMSG; |
353 | } | 348 | } |
354 | } else if (ret < 0) { | 349 | } else if (ret < 0) { |
355 | dev_warn(&php_slot->pdev->dev, "Error %d powering %s\n", | 350 | pci_warn(php_slot->pdev, "Error %d powering %s\n", |
356 | ret, (state == OPAL_PCI_SLOT_POWER_ON) ? "on" : "off"); | 351 | ret, (state == OPAL_PCI_SLOT_POWER_ON) ? "on" : "off"); |
357 | return ret; | 352 | return ret; |
358 | } | 353 | } |
@@ -379,7 +374,7 @@ static int pnv_php_get_power_state(struct hotplug_slot *slot, u8 *state) | |||
379 | */ | 374 | */ |
380 | ret = pnv_pci_get_power_state(php_slot->id, &power_state); | 375 | ret = pnv_pci_get_power_state(php_slot->id, &power_state); |
381 | if (ret) { | 376 | if (ret) { |
382 | dev_warn(&php_slot->pdev->dev, "Error %d getting power status\n", | 377 | pci_warn(php_slot->pdev, "Error %d getting power status\n", |
383 | ret); | 378 | ret); |
384 | } else { | 379 | } else { |
385 | *state = power_state; | 380 | *state = power_state; |
@@ -405,8 +400,7 @@ static int pnv_php_get_adapter_state(struct hotplug_slot *slot, u8 *state) | |||
405 | slot->info->adapter_status = presence; | 400 | slot->info->adapter_status = presence; |
406 | ret = 0; | 401 | ret = 0; |
407 | } else { | 402 | } else { |
408 | dev_warn(&php_slot->pdev->dev, "Error %d getting presence\n", | 403 | pci_warn(php_slot->pdev, "Error %d getting presence\n", ret); |
409 | ret); | ||
410 | } | 404 | } |
411 | 405 | ||
412 | return ret; | 406 | return ret; |
@@ -629,8 +623,7 @@ static int pnv_php_register_slot(struct pnv_php_slot *php_slot) | |||
629 | ret = pci_hp_register(&php_slot->slot, php_slot->bus, | 623 | ret = pci_hp_register(&php_slot->slot, php_slot->bus, |
630 | php_slot->slot_no, php_slot->name); | 624 | php_slot->slot_no, php_slot->name); |
631 | if (ret) { | 625 | if (ret) { |
632 | dev_warn(&php_slot->pdev->dev, "Error %d registering slot\n", | 626 | pci_warn(php_slot->pdev, "Error %d registering slot\n", ret); |
633 | ret); | ||
634 | return ret; | 627 | return ret; |
635 | } | 628 | } |
636 | 629 | ||
@@ -683,7 +676,7 @@ static int pnv_php_enable_msix(struct pnv_php_slot *php_slot) | |||
683 | /* Enable MSIx */ | 676 | /* Enable MSIx */ |
684 | ret = pci_enable_msix_exact(pdev, &entry, 1); | 677 | ret = pci_enable_msix_exact(pdev, &entry, 1); |
685 | if (ret) { | 678 | if (ret) { |
686 | dev_warn(&pdev->dev, "Error %d enabling MSIx\n", ret); | 679 | pci_warn(pdev, "Error %d enabling MSIx\n", ret); |
687 | return ret; | 680 | return ret; |
688 | } | 681 | } |
689 | 682 | ||
@@ -727,7 +720,7 @@ static irqreturn_t pnv_php_interrupt(int irq, void *data) | |||
727 | (sts & PCI_EXP_SLTSTA_PDC)) { | 720 | (sts & PCI_EXP_SLTSTA_PDC)) { |
728 | ret = pnv_pci_get_presence_state(php_slot->id, &presence); | 721 | ret = pnv_pci_get_presence_state(php_slot->id, &presence); |
729 | if (ret) { | 722 | if (ret) { |
730 | dev_warn(&pdev->dev, "PCI slot [%s] error %d getting presence (0x%04x), to retry the operation.\n", | 723 | pci_warn(pdev, "PCI slot [%s] error %d getting presence (0x%04x), to retry the operation.\n", |
731 | php_slot->name, ret, sts); | 724 | php_slot->name, ret, sts); |
732 | return IRQ_HANDLED; | 725 | return IRQ_HANDLED; |
733 | } | 726 | } |
@@ -757,12 +750,12 @@ static irqreturn_t pnv_php_interrupt(int irq, void *data) | |||
757 | */ | 750 | */ |
758 | event = kzalloc(sizeof(*event), GFP_ATOMIC); | 751 | event = kzalloc(sizeof(*event), GFP_ATOMIC); |
759 | if (!event) { | 752 | if (!event) { |
760 | dev_warn(&pdev->dev, "PCI slot [%s] missed hotplug event 0x%04x\n", | 753 | pci_warn(pdev, "PCI slot [%s] missed hotplug event 0x%04x\n", |
761 | php_slot->name, sts); | 754 | php_slot->name, sts); |
762 | return IRQ_HANDLED; | 755 | return IRQ_HANDLED; |
763 | } | 756 | } |
764 | 757 | ||
765 | dev_info(&pdev->dev, "PCI slot [%s] %s (IRQ: %d)\n", | 758 | pci_info(pdev, "PCI slot [%s] %s (IRQ: %d)\n", |
766 | php_slot->name, added ? "added" : "removed", irq); | 759 | php_slot->name, added ? "added" : "removed", irq); |
767 | INIT_WORK(&event->work, pnv_php_event_handler); | 760 | INIT_WORK(&event->work, pnv_php_event_handler); |
768 | event->added = added; | 761 | event->added = added; |
@@ -782,7 +775,7 @@ static void pnv_php_init_irq(struct pnv_php_slot *php_slot, int irq) | |||
782 | /* Allocate workqueue */ | 775 | /* Allocate workqueue */ |
783 | php_slot->wq = alloc_workqueue("pciehp-%s", 0, 0, php_slot->name); | 776 | php_slot->wq = alloc_workqueue("pciehp-%s", 0, 0, php_slot->name); |
784 | if (!php_slot->wq) { | 777 | if (!php_slot->wq) { |
785 | dev_warn(&pdev->dev, "Cannot alloc workqueue\n"); | 778 | pci_warn(pdev, "Cannot alloc workqueue\n"); |
786 | pnv_php_disable_irq(php_slot, true); | 779 | pnv_php_disable_irq(php_slot, true); |
787 | return; | 780 | return; |
788 | } | 781 | } |
@@ -806,7 +799,7 @@ static void pnv_php_init_irq(struct pnv_php_slot *php_slot, int irq) | |||
806 | php_slot->name, php_slot); | 799 | php_slot->name, php_slot); |
807 | if (ret) { | 800 | if (ret) { |
808 | pnv_php_disable_irq(php_slot, true); | 801 | pnv_php_disable_irq(php_slot, true); |
809 | dev_warn(&pdev->dev, "Error %d enabling IRQ %d\n", ret, irq); | 802 | pci_warn(pdev, "Error %d enabling IRQ %d\n", ret, irq); |
810 | return; | 803 | return; |
811 | } | 804 | } |
812 | 805 | ||
@@ -842,7 +835,7 @@ static void pnv_php_enable_irq(struct pnv_php_slot *php_slot) | |||
842 | 835 | ||
843 | ret = pci_enable_device(pdev); | 836 | ret = pci_enable_device(pdev); |
844 | if (ret) { | 837 | if (ret) { |
845 | dev_warn(&pdev->dev, "Error %d enabling device\n", ret); | 838 | pci_warn(pdev, "Error %d enabling device\n", ret); |
846 | return; | 839 | return; |
847 | } | 840 | } |
848 | 841 | ||
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c index 339bce0403dd..293bd03eb167 100644 --- a/drivers/pci/hotplug/sgi_hotplug.c +++ b/drivers/pci/hotplug/sgi_hotplug.c | |||
@@ -245,18 +245,18 @@ static int sn_slot_enable(struct hotplug_slot *bss_hotplug_slot, | |||
245 | 245 | ||
246 | 246 | ||
247 | if (rc == PCI_SLOT_ALREADY_UP) { | 247 | if (rc == PCI_SLOT_ALREADY_UP) { |
248 | dev_dbg(&slot->pci_bus->self->dev, "is already active\n"); | 248 | pci_dbg(slot->pci_bus->self, "is already active\n"); |
249 | return 1; /* return 1 to user */ | 249 | return 1; /* return 1 to user */ |
250 | } | 250 | } |
251 | 251 | ||
252 | if (rc == PCI_L1_ERR) { | 252 | if (rc == PCI_L1_ERR) { |
253 | dev_dbg(&slot->pci_bus->self->dev, "L1 failure %d with message: %s", | 253 | pci_dbg(slot->pci_bus->self, "L1 failure %d with message: %s", |
254 | resp.resp_sub_errno, resp.resp_l1_msg); | 254 | resp.resp_sub_errno, resp.resp_l1_msg); |
255 | return -EPERM; | 255 | return -EPERM; |
256 | } | 256 | } |
257 | 257 | ||
258 | if (rc) { | 258 | if (rc) { |
259 | dev_dbg(&slot->pci_bus->self->dev, "insert failed with error %d sub-error %d\n", | 259 | pci_dbg(slot->pci_bus->self, "insert failed with error %d sub-error %d\n", |
260 | rc, resp.resp_sub_errno); | 260 | rc, resp.resp_sub_errno); |
261 | return -EIO; | 261 | return -EIO; |
262 | } | 262 | } |
@@ -281,23 +281,23 @@ static int sn_slot_disable(struct hotplug_slot *bss_hotplug_slot, | |||
281 | 281 | ||
282 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && | 282 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && |
283 | (rc == PCI_SLOT_ALREADY_DOWN)) { | 283 | (rc == PCI_SLOT_ALREADY_DOWN)) { |
284 | dev_dbg(&slot->pci_bus->self->dev, "Slot %s already inactive\n", slot->physical_path); | 284 | pci_dbg(slot->pci_bus->self, "Slot %s already inactive\n", slot->physical_path); |
285 | return 1; /* return 1 to user */ | 285 | return 1; /* return 1 to user */ |
286 | } | 286 | } |
287 | 287 | ||
288 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && (rc == PCI_EMPTY_33MHZ)) { | 288 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && (rc == PCI_EMPTY_33MHZ)) { |
289 | dev_dbg(&slot->pci_bus->self->dev, "Cannot remove last 33MHz card\n"); | 289 | pci_dbg(slot->pci_bus->self, "Cannot remove last 33MHz card\n"); |
290 | return -EPERM; | 290 | return -EPERM; |
291 | } | 291 | } |
292 | 292 | ||
293 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && (rc == PCI_L1_ERR)) { | 293 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && (rc == PCI_L1_ERR)) { |
294 | dev_dbg(&slot->pci_bus->self->dev, "L1 failure %d with message \n%s\n", | 294 | pci_dbg(slot->pci_bus->self, "L1 failure %d with message \n%s\n", |
295 | resp.resp_sub_errno, resp.resp_l1_msg); | 295 | resp.resp_sub_errno, resp.resp_l1_msg); |
296 | return -EPERM; | 296 | return -EPERM; |
297 | } | 297 | } |
298 | 298 | ||
299 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && rc) { | 299 | if ((action == PCI_REQ_SLOT_ELIGIBLE) && rc) { |
300 | dev_dbg(&slot->pci_bus->self->dev, "remove failed with error %d sub-error %d\n", | 300 | pci_dbg(slot->pci_bus->self, "remove failed with error %d sub-error %d\n", |
301 | rc, resp.resp_sub_errno); | 301 | rc, resp.resp_sub_errno); |
302 | return -EIO; | 302 | return -EIO; |
303 | } | 303 | } |
@@ -308,12 +308,12 @@ static int sn_slot_disable(struct hotplug_slot *bss_hotplug_slot, | |||
308 | if ((action == PCI_REQ_SLOT_DISABLE) && !rc) { | 308 | if ((action == PCI_REQ_SLOT_DISABLE) && !rc) { |
309 | pcibus_info = SN_PCIBUS_BUSSOFT_INFO(slot->pci_bus); | 309 | pcibus_info = SN_PCIBUS_BUSSOFT_INFO(slot->pci_bus); |
310 | pcibus_info->pbi_enabled_devices &= ~(1 << device_num); | 310 | pcibus_info->pbi_enabled_devices &= ~(1 << device_num); |
311 | dev_dbg(&slot->pci_bus->self->dev, "remove successful\n"); | 311 | pci_dbg(slot->pci_bus->self, "remove successful\n"); |
312 | return 0; | 312 | return 0; |
313 | } | 313 | } |
314 | 314 | ||
315 | if ((action == PCI_REQ_SLOT_DISABLE) && rc) { | 315 | if ((action == PCI_REQ_SLOT_DISABLE) && rc) { |
316 | dev_dbg(&slot->pci_bus->self->dev, "remove failed rc = %d\n", rc); | 316 | pci_dbg(slot->pci_bus->self, "remove failed rc = %d\n", rc); |
317 | } | 317 | } |
318 | 318 | ||
319 | return rc; | 319 | return rc; |
@@ -366,7 +366,7 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot) | |||
366 | num_funcs = pci_scan_slot(slot->pci_bus, | 366 | num_funcs = pci_scan_slot(slot->pci_bus, |
367 | PCI_DEVFN(slot->device_num + 1, 0)); | 367 | PCI_DEVFN(slot->device_num + 1, 0)); |
368 | if (!num_funcs) { | 368 | if (!num_funcs) { |
369 | dev_dbg(&slot->pci_bus->self->dev, "no device in slot\n"); | 369 | pci_dbg(slot->pci_bus->self, "no device in slot\n"); |
370 | mutex_unlock(&sn_hotplug_mutex); | 370 | mutex_unlock(&sn_hotplug_mutex); |
371 | return -ENODEV; | 371 | return -ENODEV; |
372 | } | 372 | } |
@@ -412,7 +412,7 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot) | |||
412 | phandle = acpi_device_handle(PCI_CONTROLLER(slot->pci_bus)->companion); | 412 | phandle = acpi_device_handle(PCI_CONTROLLER(slot->pci_bus)->companion); |
413 | 413 | ||
414 | if (acpi_bus_get_device(phandle, &pdevice)) { | 414 | if (acpi_bus_get_device(phandle, &pdevice)) { |
415 | dev_dbg(&slot->pci_bus->self->dev, "no parent device, assuming NULL\n"); | 415 | pci_dbg(slot->pci_bus->self, "no parent device, assuming NULL\n"); |
416 | pdevice = NULL; | 416 | pdevice = NULL; |
417 | } | 417 | } |
418 | 418 | ||
@@ -463,9 +463,9 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot) | |||
463 | mutex_unlock(&sn_hotplug_mutex); | 463 | mutex_unlock(&sn_hotplug_mutex); |
464 | 464 | ||
465 | if (rc == 0) | 465 | if (rc == 0) |
466 | dev_dbg(&slot->pci_bus->self->dev, "insert operation successful\n"); | 466 | pci_dbg(slot->pci_bus->self, "insert operation successful\n"); |
467 | else | 467 | else |
468 | dev_dbg(&slot->pci_bus->self->dev, "insert operation failed rc = %d\n", rc); | 468 | pci_dbg(slot->pci_bus->self, "insert operation failed rc = %d\n", rc); |
469 | 469 | ||
470 | return rc; | 470 | return rc; |
471 | } | 471 | } |
@@ -643,16 +643,16 @@ static int sn_hotplug_slot_register(struct pci_bus *pci_bus) | |||
643 | if (rc) | 643 | if (rc) |
644 | goto register_err; | 644 | goto register_err; |
645 | } | 645 | } |
646 | dev_dbg(&pci_bus->self->dev, "Registered bus with hotplug\n"); | 646 | pci_dbg(pci_bus->self, "Registered bus with hotplug\n"); |
647 | return rc; | 647 | return rc; |
648 | 648 | ||
649 | register_err: | 649 | register_err: |
650 | dev_dbg(&pci_bus->self->dev, "bus failed to register with err = %d\n", | 650 | pci_dbg(pci_bus->self, "bus failed to register with err = %d\n", |
651 | rc); | 651 | rc); |
652 | 652 | ||
653 | alloc_err: | 653 | alloc_err: |
654 | if (rc == -ENOMEM) | 654 | if (rc == -ENOMEM) |
655 | dev_dbg(&pci_bus->self->dev, "Memory allocation error\n"); | 655 | pci_dbg(pci_bus->self, "Memory allocation error\n"); |
656 | 656 | ||
657 | /* destroy THIS element */ | 657 | /* destroy THIS element */ |
658 | if (bss_hotplug_slot) | 658 | if (bss_hotplug_slot) |
@@ -685,10 +685,10 @@ static int __init sn_pci_hotplug_init(void) | |||
685 | 685 | ||
686 | rc = sn_pci_bus_valid(pci_bus); | 686 | rc = sn_pci_bus_valid(pci_bus); |
687 | if (rc != 1) { | 687 | if (rc != 1) { |
688 | dev_dbg(&pci_bus->self->dev, "not a valid hotplug bus\n"); | 688 | pci_dbg(pci_bus->self, "not a valid hotplug bus\n"); |
689 | continue; | 689 | continue; |
690 | } | 690 | } |
691 | dev_dbg(&pci_bus->self->dev, "valid hotplug bus\n"); | 691 | pci_dbg(pci_bus->self, "valid hotplug bus\n"); |
692 | 692 | ||
693 | rc = sn_hotplug_slot_register(pci_bus); | 693 | rc = sn_hotplug_slot_register(pci_bus); |
694 | if (!rc) { | 694 | if (!rc) { |
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h index 70c7ea6af034..664b1dafc95d 100644 --- a/drivers/pci/hotplug/shpchp.h +++ b/drivers/pci/hotplug/shpchp.h | |||
@@ -62,15 +62,15 @@ do { \ | |||
62 | #define ctrl_dbg(ctrl, format, arg...) \ | 62 | #define ctrl_dbg(ctrl, format, arg...) \ |
63 | do { \ | 63 | do { \ |
64 | if (shpchp_debug) \ | 64 | if (shpchp_debug) \ |
65 | dev_printk(KERN_DEBUG, &ctrl->pci_dev->dev, \ | 65 | pci_printk(KERN_DEBUG, ctrl->pci_dev, \ |
66 | format, ## arg); \ | 66 | format, ## arg); \ |
67 | } while (0) | 67 | } while (0) |
68 | #define ctrl_err(ctrl, format, arg...) \ | 68 | #define ctrl_err(ctrl, format, arg...) \ |
69 | dev_err(&ctrl->pci_dev->dev, format, ## arg) | 69 | pci_err(ctrl->pci_dev, format, ## arg) |
70 | #define ctrl_info(ctrl, format, arg...) \ | 70 | #define ctrl_info(ctrl, format, arg...) \ |
71 | dev_info(&ctrl->pci_dev->dev, format, ## arg) | 71 | pci_info(ctrl->pci_dev, format, ## arg) |
72 | #define ctrl_warn(ctrl, format, arg...) \ | 72 | #define ctrl_warn(ctrl, format, arg...) \ |
73 | dev_warn(&ctrl->pci_dev->dev, format, ## arg) | 73 | pci_warn(ctrl->pci_dev, format, ## arg) |
74 | 74 | ||
75 | 75 | ||
76 | #define SLOT_NAME_SIZE 10 | 76 | #define SLOT_NAME_SIZE 10 |
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c index 7bfb87bd2b7e..2f2b87acf179 100644 --- a/drivers/pci/hotplug/shpchp_core.c +++ b/drivers/pci/hotplug/shpchp_core.c | |||
@@ -305,10 +305,9 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
305 | return -ENODEV; | 305 | return -ENODEV; |
306 | 306 | ||
307 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | 307 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
308 | if (!ctrl) { | 308 | if (!ctrl) |
309 | dev_err(&pdev->dev, "%s: Out of memory\n", __func__); | ||
310 | goto err_out_none; | 309 | goto err_out_none; |
311 | } | 310 | |
312 | INIT_LIST_HEAD(&ctrl->slot_list); | 311 | INIT_LIST_HEAD(&ctrl->slot_list); |
313 | 312 | ||
314 | rc = shpc_init(ctrl, pdev); | 313 | rc = shpc_init(ctrl, pdev); |
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index 6bacb8995e96..449a9dbb952d 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c | |||
@@ -259,19 +259,19 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) | |||
259 | nres++; | 259 | nres++; |
260 | } | 260 | } |
261 | if (nres != iov->nres) { | 261 | if (nres != iov->nres) { |
262 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | 262 | pci_err(dev, "not enough MMIO resources for SR-IOV\n"); |
263 | return -ENOMEM; | 263 | return -ENOMEM; |
264 | } | 264 | } |
265 | 265 | ||
266 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); | 266 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
267 | if (bus > dev->bus->busn_res.end) { | 267 | if (bus > dev->bus->busn_res.end) { |
268 | dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", | 268 | pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", |
269 | nr_virtfn, bus, &dev->bus->busn_res); | 269 | nr_virtfn, bus, &dev->bus->busn_res); |
270 | return -ENOMEM; | 270 | return -ENOMEM; |
271 | } | 271 | } |
272 | 272 | ||
273 | if (pci_enable_resources(dev, bars)) { | 273 | if (pci_enable_resources(dev, bars)) { |
274 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | 274 | pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); |
275 | return -ENOMEM; | 275 | return -ENOMEM; |
276 | } | 276 | } |
277 | 277 | ||
@@ -298,7 +298,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) | |||
298 | 298 | ||
299 | rc = pcibios_sriov_enable(dev, initial); | 299 | rc = pcibios_sriov_enable(dev, initial); |
300 | if (rc) { | 300 | if (rc) { |
301 | dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc); | 301 | pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); |
302 | goto err_pcibios; | 302 | goto err_pcibios; |
303 | } | 303 | } |
304 | 304 | ||
@@ -432,7 +432,7 @@ found: | |||
432 | } | 432 | } |
433 | iov->barsz[i] = resource_size(res); | 433 | iov->barsz[i] = resource_size(res); |
434 | res->end = res->start + resource_size(res) * total - 1; | 434 | res->end = res->start + resource_size(res) * total - 1; |
435 | dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", | 435 | pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
436 | i, res, i, total); | 436 | i, res, i, total); |
437 | i += bar64; | 437 | i += bar64; |
438 | nres++; | 438 | nres++; |
diff --git a/drivers/pci/irq.c b/drivers/pci/irq.c index 10929cd43d5d..2a808e10645f 100644 --- a/drivers/pci/irq.c +++ b/drivers/pci/irq.c | |||
@@ -16,11 +16,10 @@ static void pci_note_irq_problem(struct pci_dev *pdev, const char *reason) | |||
16 | { | 16 | { |
17 | struct pci_dev *parent = to_pci_dev(pdev->dev.parent); | 17 | struct pci_dev *parent = to_pci_dev(pdev->dev.parent); |
18 | 18 | ||
19 | dev_err(&pdev->dev, | 19 | pci_err(pdev, "Potentially misrouted IRQ (Bridge %s %04x:%04x)\n", |
20 | "Potentially misrouted IRQ (Bridge %s %04x:%04x)\n", | ||
21 | dev_name(&parent->dev), parent->vendor, parent->device); | 20 | dev_name(&parent->dev), parent->vendor, parent->device); |
22 | dev_err(&pdev->dev, "%s\n", reason); | 21 | pci_err(pdev, "%s\n", reason); |
23 | dev_err(&pdev->dev, "Please report to linux-kernel@vger.kernel.org\n"); | 22 | pci_err(pdev, "Please report to linux-kernel@vger.kernel.org\n"); |
24 | WARN_ON(1); | 23 | WARN_ON(1); |
25 | } | 24 | } |
26 | 25 | ||
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index e06607167858..1cd8238a664a 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -578,7 +578,7 @@ static int msi_verify_entries(struct pci_dev *dev) | |||
578 | for_each_pci_msi_entry(entry, dev) { | 578 | for_each_pci_msi_entry(entry, dev) { |
579 | if (!dev->no_64bit_msi || !entry->msg.address_hi) | 579 | if (!dev->no_64bit_msi || !entry->msg.address_hi) |
580 | continue; | 580 | continue; |
581 | dev_err(&dev->dev, "Device has broken 64-bit MSI but arch" | 581 | pci_err(dev, "Device has broken 64-bit MSI but arch" |
582 | " tried to assign one above 4G\n"); | 582 | " tried to assign one above 4G\n"); |
583 | return -EIO; | 583 | return -EIO; |
584 | } | 584 | } |
@@ -962,7 +962,7 @@ static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, | |||
962 | 962 | ||
963 | /* Check whether driver already requested for MSI irq */ | 963 | /* Check whether driver already requested for MSI irq */ |
964 | if (dev->msi_enabled) { | 964 | if (dev->msi_enabled) { |
965 | dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n"); | 965 | pci_info(dev, "can't enable MSI-X (MSI IRQ already assigned)\n"); |
966 | return -EINVAL; | 966 | return -EINVAL; |
967 | } | 967 | } |
968 | return msix_capability_init(dev, entries, nvec, affd); | 968 | return msix_capability_init(dev, entries, nvec, affd); |
@@ -1032,8 +1032,7 @@ static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, | |||
1032 | 1032 | ||
1033 | /* Check whether driver already requested MSI-X irqs */ | 1033 | /* Check whether driver already requested MSI-X irqs */ |
1034 | if (dev->msix_enabled) { | 1034 | if (dev->msix_enabled) { |
1035 | dev_info(&dev->dev, | 1035 | pci_info(dev, "can't enable MSI (MSI-X already enabled)\n"); |
1036 | "can't enable MSI (MSI-X already enabled)\n"); | ||
1037 | return -EINVAL; | 1036 | return -EINVAL; |
1038 | } | 1037 | } |
1039 | 1038 | ||
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 4708eb9df71b..189e6ccf3589 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c | |||
@@ -542,7 +542,7 @@ static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
542 | } | 542 | } |
543 | 543 | ||
544 | if (!error) | 544 | if (!error) |
545 | dev_dbg(&dev->dev, "power state changed by ACPI to %s\n", | 545 | pci_dbg(dev, "power state changed by ACPI to %s\n", |
546 | acpi_power_state_string(state_conv[state])); | 546 | acpi_power_state_string(state_conv[state])); |
547 | 547 | ||
548 | return error; | 548 | return error; |
diff --git a/drivers/pci/pci-stub.c b/drivers/pci/pci-stub.c index 886fb3570278..e51789e2b6c7 100644 --- a/drivers/pci/pci-stub.c +++ b/drivers/pci/pci-stub.c | |||
@@ -28,7 +28,7 @@ MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the stub driver, format is " | |||
28 | 28 | ||
29 | static int pci_stub_probe(struct pci_dev *dev, const struct pci_device_id *id) | 29 | static int pci_stub_probe(struct pci_dev *dev, const struct pci_device_id *id) |
30 | { | 30 | { |
31 | dev_info(&dev->dev, "claimed by stub\n"); | 31 | pci_info(dev, "claimed by stub\n"); |
32 | return 0; | 32 | return 0; |
33 | } | 33 | } |
34 | 34 | ||
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 06c7f0b85cd2..c7941a0512a5 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c | |||
@@ -348,7 +348,7 @@ static ssize_t numa_node_store(struct device *dev, | |||
348 | return -EINVAL; | 348 | return -EINVAL; |
349 | 349 | ||
350 | add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); | 350 | add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); |
351 | dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", | 351 | pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", |
352 | node); | 352 | node); |
353 | 353 | ||
354 | dev->numa_node = node; | 354 | dev->numa_node = node; |
@@ -411,7 +411,7 @@ static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, | |||
411 | */ | 411 | */ |
412 | if (!subordinate) { | 412 | if (!subordinate) { |
413 | pdev->no_msi = !val; | 413 | pdev->no_msi = !val; |
414 | dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n", | 414 | pci_info(pdev, "MSI/MSI-X %s for future drivers\n", |
415 | val ? "allowed" : "disallowed"); | 415 | val ? "allowed" : "disallowed"); |
416 | return count; | 416 | return count; |
417 | } | 417 | } |
@@ -613,7 +613,7 @@ static ssize_t sriov_numvfs_store(struct device *dev, | |||
613 | 613 | ||
614 | /* is PF driver loaded w/callback */ | 614 | /* is PF driver loaded w/callback */ |
615 | if (!pdev->driver || !pdev->driver->sriov_configure) { | 615 | if (!pdev->driver || !pdev->driver->sriov_configure) { |
616 | dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); | 616 | pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n"); |
617 | ret = -ENOENT; | 617 | ret = -ENOENT; |
618 | goto exit; | 618 | goto exit; |
619 | } | 619 | } |
@@ -626,7 +626,7 @@ static ssize_t sriov_numvfs_store(struct device *dev, | |||
626 | 626 | ||
627 | /* enable VFs */ | 627 | /* enable VFs */ |
628 | if (pdev->sriov->num_VFs) { | 628 | if (pdev->sriov->num_VFs) { |
629 | dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", | 629 | pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n", |
630 | pdev->sriov->num_VFs, num_vfs); | 630 | pdev->sriov->num_VFs, num_vfs); |
631 | ret = -EBUSY; | 631 | ret = -EBUSY; |
632 | goto exit; | 632 | goto exit; |
@@ -637,7 +637,7 @@ static ssize_t sriov_numvfs_store(struct device *dev, | |||
637 | goto exit; | 637 | goto exit; |
638 | 638 | ||
639 | if (ret != num_vfs) | 639 | if (ret != num_vfs) |
640 | dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", | 640 | pci_warn(pdev, "%d VFs requested; only %d enabled\n", |
641 | num_vfs, ret); | 641 | num_vfs, ret); |
642 | 642 | ||
643 | exit: | 643 | exit: |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 6112dd8d68b6..364717edd992 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -156,7 +156,7 @@ void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar) | |||
156 | * Make sure the BAR is actually a memory resource, not an IO resource | 156 | * Make sure the BAR is actually a memory resource, not an IO resource |
157 | */ | 157 | */ |
158 | if (res->flags & IORESOURCE_UNSET || !(res->flags & IORESOURCE_MEM)) { | 158 | if (res->flags & IORESOURCE_UNSET || !(res->flags & IORESOURCE_MEM)) { |
159 | dev_warn(&pdev->dev, "can't ioremap BAR %d: %pR\n", bar, res); | 159 | pci_warn(pdev, "can't ioremap BAR %d: %pR\n", bar, res); |
160 | return NULL; | 160 | return NULL; |
161 | } | 161 | } |
162 | return ioremap_nocache(res->start, resource_size(res)); | 162 | return ioremap_nocache(res->start, resource_size(res)); |
@@ -648,7 +648,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
648 | */ | 648 | */ |
649 | if (state != PCI_D0 && dev->current_state <= PCI_D3cold | 649 | if (state != PCI_D0 && dev->current_state <= PCI_D3cold |
650 | && dev->current_state > state) { | 650 | && dev->current_state > state) { |
651 | dev_err(&dev->dev, "invalid power transition (from state %d to %d)\n", | 651 | pci_err(dev, "invalid power transition (from state %d to %d)\n", |
652 | dev->current_state, state); | 652 | dev->current_state, state); |
653 | return -EINVAL; | 653 | return -EINVAL; |
654 | } | 654 | } |
@@ -696,7 +696,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) | |||
696 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); | 696 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); |
697 | dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); | 697 | dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK); |
698 | if (dev->current_state != state && printk_ratelimit()) | 698 | if (dev->current_state != state && printk_ratelimit()) |
699 | dev_info(&dev->dev, "Refused to change power state, currently in D%d\n", | 699 | pci_info(dev, "Refused to change power state, currently in D%d\n", |
700 | dev->current_state); | 700 | dev->current_state); |
701 | 701 | ||
702 | /* | 702 | /* |
@@ -970,7 +970,7 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) | |||
970 | case PM_EVENT_HIBERNATE: | 970 | case PM_EVENT_HIBERNATE: |
971 | return PCI_D3hot; | 971 | return PCI_D3hot; |
972 | default: | 972 | default: |
973 | dev_info(&dev->dev, "unrecognized suspend event %d\n", | 973 | pci_info(dev, "unrecognized suspend event %d\n", |
974 | state.event); | 974 | state.event); |
975 | BUG(); | 975 | BUG(); |
976 | } | 976 | } |
@@ -1013,7 +1013,7 @@ static int pci_save_pcie_state(struct pci_dev *dev) | |||
1013 | 1013 | ||
1014 | save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); | 1014 | save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); |
1015 | if (!save_state) { | 1015 | if (!save_state) { |
1016 | dev_err(&dev->dev, "buffer not found in %s\n", __func__); | 1016 | pci_err(dev, "buffer not found in %s\n", __func__); |
1017 | return -ENOMEM; | 1017 | return -ENOMEM; |
1018 | } | 1018 | } |
1019 | 1019 | ||
@@ -1061,7 +1061,7 @@ static int pci_save_pcix_state(struct pci_dev *dev) | |||
1061 | 1061 | ||
1062 | save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); | 1062 | save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); |
1063 | if (!save_state) { | 1063 | if (!save_state) { |
1064 | dev_err(&dev->dev, "buffer not found in %s\n", __func__); | 1064 | pci_err(dev, "buffer not found in %s\n", __func__); |
1065 | return -ENOMEM; | 1065 | return -ENOMEM; |
1066 | } | 1066 | } |
1067 | 1067 | ||
@@ -1121,7 +1121,7 @@ static void pci_restore_config_dword(struct pci_dev *pdev, int offset, | |||
1121 | return; | 1121 | return; |
1122 | 1122 | ||
1123 | for (;;) { | 1123 | for (;;) { |
1124 | dev_dbg(&pdev->dev, "restoring config space at offset %#x (was %#x, writing %#x)\n", | 1124 | pci_dbg(pdev, "restoring config space at offset %#x (was %#x, writing %#x)\n", |
1125 | offset, val, saved_val); | 1125 | offset, val, saved_val); |
1126 | pci_write_config_dword(pdev, offset, saved_val); | 1126 | pci_write_config_dword(pdev, offset, saved_val); |
1127 | if (retry-- <= 0) | 1127 | if (retry-- <= 0) |
@@ -1358,7 +1358,7 @@ static void pci_enable_bridge(struct pci_dev *dev) | |||
1358 | 1358 | ||
1359 | retval = pci_enable_device(dev); | 1359 | retval = pci_enable_device(dev); |
1360 | if (retval) | 1360 | if (retval) |
1361 | dev_err(&dev->dev, "Error enabling bridge (%d), continuing\n", | 1361 | pci_err(dev, "Error enabling bridge (%d), continuing\n", |
1362 | retval); | 1362 | retval); |
1363 | pci_set_master(dev); | 1363 | pci_set_master(dev); |
1364 | } | 1364 | } |
@@ -1863,7 +1863,7 @@ void pci_pme_active(struct pci_dev *dev, bool enable) | |||
1863 | pme_dev = kmalloc(sizeof(struct pci_pme_device), | 1863 | pme_dev = kmalloc(sizeof(struct pci_pme_device), |
1864 | GFP_KERNEL); | 1864 | GFP_KERNEL); |
1865 | if (!pme_dev) { | 1865 | if (!pme_dev) { |
1866 | dev_warn(&dev->dev, "can't enable PME#\n"); | 1866 | pci_warn(dev, "can't enable PME#\n"); |
1867 | return; | 1867 | return; |
1868 | } | 1868 | } |
1869 | pme_dev->dev = dev; | 1869 | pme_dev->dev = dev; |
@@ -1887,7 +1887,7 @@ void pci_pme_active(struct pci_dev *dev, bool enable) | |||
1887 | } | 1887 | } |
1888 | } | 1888 | } |
1889 | 1889 | ||
1890 | dev_dbg(&dev->dev, "PME# %s\n", enable ? "enabled" : "disabled"); | 1890 | pci_dbg(dev, "PME# %s\n", enable ? "enabled" : "disabled"); |
1891 | } | 1891 | } |
1892 | EXPORT_SYMBOL(pci_pme_active); | 1892 | EXPORT_SYMBOL(pci_pme_active); |
1893 | 1893 | ||
@@ -2424,7 +2424,7 @@ void pci_pm_init(struct pci_dev *dev) | |||
2424 | pci_read_config_word(dev, pm + PCI_PM_PMC, &pmc); | 2424 | pci_read_config_word(dev, pm + PCI_PM_PMC, &pmc); |
2425 | 2425 | ||
2426 | if ((pmc & PCI_PM_CAP_VER_MASK) > 3) { | 2426 | if ((pmc & PCI_PM_CAP_VER_MASK) > 3) { |
2427 | dev_err(&dev->dev, "unsupported PM cap regs version (%u)\n", | 2427 | pci_err(dev, "unsupported PM cap regs version (%u)\n", |
2428 | pmc & PCI_PM_CAP_VER_MASK); | 2428 | pmc & PCI_PM_CAP_VER_MASK); |
2429 | return; | 2429 | return; |
2430 | } | 2430 | } |
@@ -2444,15 +2444,14 @@ void pci_pm_init(struct pci_dev *dev) | |||
2444 | dev->d2_support = true; | 2444 | dev->d2_support = true; |
2445 | 2445 | ||
2446 | if (dev->d1_support || dev->d2_support) | 2446 | if (dev->d1_support || dev->d2_support) |
2447 | dev_printk(KERN_DEBUG, &dev->dev, "supports%s%s\n", | 2447 | pci_printk(KERN_DEBUG, dev, "supports%s%s\n", |
2448 | dev->d1_support ? " D1" : "", | 2448 | dev->d1_support ? " D1" : "", |
2449 | dev->d2_support ? " D2" : ""); | 2449 | dev->d2_support ? " D2" : ""); |
2450 | } | 2450 | } |
2451 | 2451 | ||
2452 | pmc &= PCI_PM_CAP_PME_MASK; | 2452 | pmc &= PCI_PM_CAP_PME_MASK; |
2453 | if (pmc) { | 2453 | if (pmc) { |
2454 | dev_printk(KERN_DEBUG, &dev->dev, | 2454 | pci_printk(KERN_DEBUG, dev, "PME# supported from%s%s%s%s%s\n", |
2455 | "PME# supported from%s%s%s%s%s\n", | ||
2456 | (pmc & PCI_PM_CAP_PME_D0) ? " D0" : "", | 2455 | (pmc & PCI_PM_CAP_PME_D0) ? " D0" : "", |
2457 | (pmc & PCI_PM_CAP_PME_D1) ? " D1" : "", | 2456 | (pmc & PCI_PM_CAP_PME_D1) ? " D1" : "", |
2458 | (pmc & PCI_PM_CAP_PME_D2) ? " D2" : "", | 2457 | (pmc & PCI_PM_CAP_PME_D2) ? " D2" : "", |
@@ -2544,13 +2543,13 @@ static int pci_ea_read(struct pci_dev *dev, int offset) | |||
2544 | 2543 | ||
2545 | res = pci_ea_get_resource(dev, bei, prop); | 2544 | res = pci_ea_get_resource(dev, bei, prop); |
2546 | if (!res) { | 2545 | if (!res) { |
2547 | dev_err(&dev->dev, "Unsupported EA entry BEI: %u\n", bei); | 2546 | pci_err(dev, "Unsupported EA entry BEI: %u\n", bei); |
2548 | goto out; | 2547 | goto out; |
2549 | } | 2548 | } |
2550 | 2549 | ||
2551 | flags = pci_ea_flags(dev, prop); | 2550 | flags = pci_ea_flags(dev, prop); |
2552 | if (!flags) { | 2551 | if (!flags) { |
2553 | dev_err(&dev->dev, "Unsupported EA properties: %#x\n", prop); | 2552 | pci_err(dev, "Unsupported EA properties: %#x\n", prop); |
2554 | goto out; | 2553 | goto out; |
2555 | } | 2554 | } |
2556 | 2555 | ||
@@ -2600,13 +2599,12 @@ static int pci_ea_read(struct pci_dev *dev, int offset) | |||
2600 | } | 2599 | } |
2601 | 2600 | ||
2602 | if (end < start) { | 2601 | if (end < start) { |
2603 | dev_err(&dev->dev, "EA Entry crosses address boundary\n"); | 2602 | pci_err(dev, "EA Entry crosses address boundary\n"); |
2604 | goto out; | 2603 | goto out; |
2605 | } | 2604 | } |
2606 | 2605 | ||
2607 | if (ent_size != ent_offset - offset) { | 2606 | if (ent_size != ent_offset - offset) { |
2608 | dev_err(&dev->dev, | 2607 | pci_err(dev, "EA Entry Size (%d) does not match length read (%d)\n", |
2609 | "EA Entry Size (%d) does not match length read (%d)\n", | ||
2610 | ent_size, ent_offset - offset); | 2608 | ent_size, ent_offset - offset); |
2611 | goto out; | 2609 | goto out; |
2612 | } | 2610 | } |
@@ -2617,16 +2615,16 @@ static int pci_ea_read(struct pci_dev *dev, int offset) | |||
2617 | res->flags = flags; | 2615 | res->flags = flags; |
2618 | 2616 | ||
2619 | if (bei <= PCI_EA_BEI_BAR5) | 2617 | if (bei <= PCI_EA_BEI_BAR5) |
2620 | dev_printk(KERN_DEBUG, &dev->dev, "BAR %d: %pR (from Enhanced Allocation, properties %#02x)\n", | 2618 | pci_printk(KERN_DEBUG, dev, "BAR %d: %pR (from Enhanced Allocation, properties %#02x)\n", |
2621 | bei, res, prop); | 2619 | bei, res, prop); |
2622 | else if (bei == PCI_EA_BEI_ROM) | 2620 | else if (bei == PCI_EA_BEI_ROM) |
2623 | dev_printk(KERN_DEBUG, &dev->dev, "ROM: %pR (from Enhanced Allocation, properties %#02x)\n", | 2621 | pci_printk(KERN_DEBUG, dev, "ROM: %pR (from Enhanced Allocation, properties %#02x)\n", |
2624 | res, prop); | 2622 | res, prop); |
2625 | else if (bei >= PCI_EA_BEI_VF_BAR0 && bei <= PCI_EA_BEI_VF_BAR5) | 2623 | else if (bei >= PCI_EA_BEI_VF_BAR0 && bei <= PCI_EA_BEI_VF_BAR5) |
2626 | dev_printk(KERN_DEBUG, &dev->dev, "VF BAR %d: %pR (from Enhanced Allocation, properties %#02x)\n", | 2624 | pci_printk(KERN_DEBUG, dev, "VF BAR %d: %pR (from Enhanced Allocation, properties %#02x)\n", |
2627 | bei - PCI_EA_BEI_VF_BAR0, res, prop); | 2625 | bei - PCI_EA_BEI_VF_BAR0, res, prop); |
2628 | else | 2626 | else |
2629 | dev_printk(KERN_DEBUG, &dev->dev, "BEI %d res: %pR (from Enhanced Allocation, properties %#02x)\n", | 2627 | pci_printk(KERN_DEBUG, dev, "BEI %d res: %pR (from Enhanced Allocation, properties %#02x)\n", |
2630 | bei, res, prop); | 2628 | bei, res, prop); |
2631 | 2629 | ||
2632 | out: | 2630 | out: |
@@ -2723,13 +2721,11 @@ void pci_allocate_cap_save_buffers(struct pci_dev *dev) | |||
2723 | error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_EXP, | 2721 | error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_EXP, |
2724 | PCI_EXP_SAVE_REGS * sizeof(u16)); | 2722 | PCI_EXP_SAVE_REGS * sizeof(u16)); |
2725 | if (error) | 2723 | if (error) |
2726 | dev_err(&dev->dev, | 2724 | pci_err(dev, "unable to preallocate PCI Express save buffer\n"); |
2727 | "unable to preallocate PCI Express save buffer\n"); | ||
2728 | 2725 | ||
2729 | error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_PCIX, sizeof(u16)); | 2726 | error = pci_add_cap_save_buffer(dev, PCI_CAP_ID_PCIX, sizeof(u16)); |
2730 | if (error) | 2727 | if (error) |
2731 | dev_err(&dev->dev, | 2728 | pci_err(dev, "unable to preallocate PCI-X save buffer\n"); |
2732 | "unable to preallocate PCI-X save buffer\n"); | ||
2733 | 2729 | ||
2734 | pci_allocate_vc_save_buffers(dev); | 2730 | pci_allocate_vc_save_buffers(dev); |
2735 | } | 2731 | } |
@@ -3273,7 +3269,7 @@ static int __pci_request_region(struct pci_dev *pdev, int bar, | |||
3273 | return 0; | 3269 | return 0; |
3274 | 3270 | ||
3275 | err_out: | 3271 | err_out: |
3276 | dev_warn(&pdev->dev, "BAR %d: can't reserve %pR\n", bar, | 3272 | pci_warn(pdev, "BAR %d: can't reserve %pR\n", bar, |
3277 | &pdev->resource[bar]); | 3273 | &pdev->resource[bar]); |
3278 | return -EBUSY; | 3274 | return -EBUSY; |
3279 | } | 3275 | } |
@@ -3696,7 +3692,7 @@ static void __pci_set_master(struct pci_dev *dev, bool enable) | |||
3696 | else | 3692 | else |
3697 | cmd = old_cmd & ~PCI_COMMAND_MASTER; | 3693 | cmd = old_cmd & ~PCI_COMMAND_MASTER; |
3698 | if (cmd != old_cmd) { | 3694 | if (cmd != old_cmd) { |
3699 | dev_dbg(&dev->dev, "%s bus mastering\n", | 3695 | pci_dbg(dev, "%s bus mastering\n", |
3700 | enable ? "enabling" : "disabling"); | 3696 | enable ? "enabling" : "disabling"); |
3701 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 3697 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
3702 | } | 3698 | } |
@@ -3797,7 +3793,7 @@ int pci_set_cacheline_size(struct pci_dev *dev) | |||
3797 | if (cacheline_size == pci_cache_line_size) | 3793 | if (cacheline_size == pci_cache_line_size) |
3798 | return 0; | 3794 | return 0; |
3799 | 3795 | ||
3800 | dev_printk(KERN_DEBUG, &dev->dev, "cache line size of %d is not supported\n", | 3796 | pci_printk(KERN_DEBUG, dev, "cache line size of %d is not supported\n", |
3801 | pci_cache_line_size << 2); | 3797 | pci_cache_line_size << 2); |
3802 | 3798 | ||
3803 | return -EINVAL; | 3799 | return -EINVAL; |
@@ -3826,7 +3822,7 @@ int pci_set_mwi(struct pci_dev *dev) | |||
3826 | 3822 | ||
3827 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | 3823 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
3828 | if (!(cmd & PCI_COMMAND_INVALIDATE)) { | 3824 | if (!(cmd & PCI_COMMAND_INVALIDATE)) { |
3829 | dev_dbg(&dev->dev, "enabling Mem-Wr-Inval\n"); | 3825 | pci_dbg(dev, "enabling Mem-Wr-Inval\n"); |
3830 | cmd |= PCI_COMMAND_INVALIDATE; | 3826 | cmd |= PCI_COMMAND_INVALIDATE; |
3831 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 3827 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
3832 | } | 3828 | } |
@@ -4022,13 +4018,13 @@ static void pci_flr_wait(struct pci_dev *dev) | |||
4022 | pci_read_config_dword(dev, PCI_COMMAND, &id); | 4018 | pci_read_config_dword(dev, PCI_COMMAND, &id); |
4023 | while (id == ~0) { | 4019 | while (id == ~0) { |
4024 | if (delay > timeout) { | 4020 | if (delay > timeout) { |
4025 | dev_warn(&dev->dev, "not ready %dms after FLR; giving up\n", | 4021 | pci_warn(dev, "not ready %dms after FLR; giving up\n", |
4026 | 100 + delay - 1); | 4022 | 100 + delay - 1); |
4027 | return; | 4023 | return; |
4028 | } | 4024 | } |
4029 | 4025 | ||
4030 | if (delay > 1000) | 4026 | if (delay > 1000) |
4031 | dev_info(&dev->dev, "not ready %dms after FLR; waiting\n", | 4027 | pci_info(dev, "not ready %dms after FLR; waiting\n", |
4032 | 100 + delay - 1); | 4028 | 100 + delay - 1); |
4033 | 4029 | ||
4034 | msleep(delay); | 4030 | msleep(delay); |
@@ -4037,7 +4033,7 @@ static void pci_flr_wait(struct pci_dev *dev) | |||
4037 | } | 4033 | } |
4038 | 4034 | ||
4039 | if (delay > 1000) | 4035 | if (delay > 1000) |
4040 | dev_info(&dev->dev, "ready %dms after FLR\n", 100 + delay - 1); | 4036 | pci_info(dev, "ready %dms after FLR\n", 100 + delay - 1); |
4041 | } | 4037 | } |
4042 | 4038 | ||
4043 | /** | 4039 | /** |
@@ -4069,7 +4065,7 @@ static bool pcie_has_flr(struct pci_dev *dev) | |||
4069 | void pcie_flr(struct pci_dev *dev) | 4065 | void pcie_flr(struct pci_dev *dev) |
4070 | { | 4066 | { |
4071 | if (!pci_wait_for_pending_transaction(dev)) | 4067 | if (!pci_wait_for_pending_transaction(dev)) |
4072 | dev_err(&dev->dev, "timed out waiting for pending transaction; performing function level reset anyway\n"); | 4068 | pci_err(dev, "timed out waiting for pending transaction; performing function level reset anyway\n"); |
4073 | 4069 | ||
4074 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); | 4070 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); |
4075 | pci_flr_wait(dev); | 4071 | pci_flr_wait(dev); |
@@ -4102,7 +4098,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) | |||
4102 | */ | 4098 | */ |
4103 | if (!pci_wait_for_pending(dev, pos + PCI_AF_CTRL, | 4099 | if (!pci_wait_for_pending(dev, pos + PCI_AF_CTRL, |
4104 | PCI_AF_STATUS_TP << 8)) | 4100 | PCI_AF_STATUS_TP << 8)) |
4105 | dev_err(&dev->dev, "timed out waiting for pending transaction; performing AF function level reset anyway\n"); | 4101 | pci_err(dev, "timed out waiting for pending transaction; performing AF function level reset anyway\n"); |
4106 | 4102 | ||
4107 | pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR); | 4103 | pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR); |
4108 | pci_flr_wait(dev); | 4104 | pci_flr_wait(dev); |
@@ -5225,12 +5221,12 @@ void pci_add_dma_alias(struct pci_dev *dev, u8 devfn) | |||
5225 | dev->dma_alias_mask = kcalloc(BITS_TO_LONGS(U8_MAX), | 5221 | dev->dma_alias_mask = kcalloc(BITS_TO_LONGS(U8_MAX), |
5226 | sizeof(long), GFP_KERNEL); | 5222 | sizeof(long), GFP_KERNEL); |
5227 | if (!dev->dma_alias_mask) { | 5223 | if (!dev->dma_alias_mask) { |
5228 | dev_warn(&dev->dev, "Unable to allocate DMA alias mask\n"); | 5224 | pci_warn(dev, "Unable to allocate DMA alias mask\n"); |
5229 | return; | 5225 | return; |
5230 | } | 5226 | } |
5231 | 5227 | ||
5232 | set_bit(devfn, dev->dma_alias_mask); | 5228 | set_bit(devfn, dev->dma_alias_mask); |
5233 | dev_info(&dev->dev, "Enabling fixed DMA alias to %02x.%d\n", | 5229 | pci_info(dev, "Enabling fixed DMA alias to %02x.%d\n", |
5234 | PCI_SLOT(devfn), PCI_FUNC(devfn)); | 5230 | PCI_SLOT(devfn), PCI_FUNC(devfn)); |
5235 | } | 5231 | } |
5236 | 5232 | ||
@@ -5379,7 +5375,7 @@ static void pci_request_resource_alignment(struct pci_dev *dev, int bar, | |||
5379 | return; | 5375 | return; |
5380 | 5376 | ||
5381 | if (r->flags & IORESOURCE_PCI_FIXED) { | 5377 | if (r->flags & IORESOURCE_PCI_FIXED) { |
5382 | dev_info(&dev->dev, "BAR%d %pR: ignoring requested alignment %#llx\n", | 5378 | pci_info(dev, "BAR%d %pR: ignoring requested alignment %#llx\n", |
5383 | bar, r, (unsigned long long)align); | 5379 | bar, r, (unsigned long long)align); |
5384 | return; | 5380 | return; |
5385 | } | 5381 | } |
@@ -5416,7 +5412,7 @@ static void pci_request_resource_alignment(struct pci_dev *dev, int bar, | |||
5416 | * devices and we use the second. | 5412 | * devices and we use the second. |
5417 | */ | 5413 | */ |
5418 | 5414 | ||
5419 | dev_info(&dev->dev, "BAR%d %pR: requesting alignment to %#llx\n", | 5415 | pci_info(dev, "BAR%d %pR: requesting alignment to %#llx\n", |
5420 | bar, r, (unsigned long long)align); | 5416 | bar, r, (unsigned long long)align); |
5421 | 5417 | ||
5422 | if (resize) { | 5418 | if (resize) { |
@@ -5462,13 +5458,11 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) | |||
5462 | 5458 | ||
5463 | if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL && | 5459 | if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL && |
5464 | (dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) { | 5460 | (dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) { |
5465 | dev_warn(&dev->dev, | 5461 | pci_warn(dev, "Can't reassign resources to host bridge\n"); |
5466 | "Can't reassign resources to host bridge.\n"); | ||
5467 | return; | 5462 | return; |
5468 | } | 5463 | } |
5469 | 5464 | ||
5470 | dev_info(&dev->dev, | 5465 | pci_info(dev, "Disabling memory decoding and releasing memory resources\n"); |
5471 | "Disabling memory decoding and releasing memory resources.\n"); | ||
5472 | pci_read_config_word(dev, PCI_COMMAND, &command); | 5466 | pci_read_config_word(dev, PCI_COMMAND, &command); |
5473 | command &= ~PCI_COMMAND_MEMORY; | 5467 | command &= ~PCI_COMMAND_MEMORY; |
5474 | pci_write_config_word(dev, PCI_COMMAND, command); | 5468 | pci_write_config_word(dev, PCI_COMMAND, command); |
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c index 2b6a59266689..b77c01e63673 100644 --- a/drivers/pci/pcie/aer/aer_inject.c +++ b/drivers/pci/pcie/aer/aer_inject.c | |||
@@ -344,14 +344,14 @@ static int aer_inject(struct aer_error_inj *einj) | |||
344 | return -ENODEV; | 344 | return -ENODEV; |
345 | rpdev = pcie_find_root_port(dev); | 345 | rpdev = pcie_find_root_port(dev); |
346 | if (!rpdev) { | 346 | if (!rpdev) { |
347 | dev_err(&dev->dev, "aer_inject: Root port not found\n"); | 347 | pci_err(dev, "aer_inject: Root port not found\n"); |
348 | ret = -ENODEV; | 348 | ret = -ENODEV; |
349 | goto out_put; | 349 | goto out_put; |
350 | } | 350 | } |
351 | 351 | ||
352 | pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 352 | pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |
353 | if (!pos_cap_err) { | 353 | if (!pos_cap_err) { |
354 | dev_err(&dev->dev, "aer_inject: Device doesn't support AER\n"); | 354 | pci_err(dev, "aer_inject: Device doesn't support AER\n"); |
355 | ret = -EPROTONOSUPPORT; | 355 | ret = -EPROTONOSUPPORT; |
356 | goto out_put; | 356 | goto out_put; |
357 | } | 357 | } |
@@ -362,8 +362,7 @@ static int aer_inject(struct aer_error_inj *einj) | |||
362 | 362 | ||
363 | rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR); | 363 | rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR); |
364 | if (!rp_pos_cap_err) { | 364 | if (!rp_pos_cap_err) { |
365 | dev_err(&rpdev->dev, | 365 | pci_err(rpdev, "aer_inject: Root port doesn't support AER\n"); |
366 | "aer_inject: Root port doesn't support AER\n"); | ||
367 | ret = -EPROTONOSUPPORT; | 366 | ret = -EPROTONOSUPPORT; |
368 | goto out_put; | 367 | goto out_put; |
369 | } | 368 | } |
@@ -411,16 +410,14 @@ static int aer_inject(struct aer_error_inj *einj) | |||
411 | if (!aer_mask_override && einj->cor_status && | 410 | if (!aer_mask_override && einj->cor_status && |
412 | !(einj->cor_status & ~cor_mask)) { | 411 | !(einj->cor_status & ~cor_mask)) { |
413 | ret = -EINVAL; | 412 | ret = -EINVAL; |
414 | dev_warn(&dev->dev, | 413 | pci_warn(dev, "aer_inject: The correctable error(s) is masked by device\n"); |
415 | "aer_inject: The correctable error(s) is masked by device\n"); | ||
416 | spin_unlock_irqrestore(&inject_lock, flags); | 414 | spin_unlock_irqrestore(&inject_lock, flags); |
417 | goto out_put; | 415 | goto out_put; |
418 | } | 416 | } |
419 | if (!aer_mask_override && einj->uncor_status && | 417 | if (!aer_mask_override && einj->uncor_status && |
420 | !(einj->uncor_status & ~uncor_mask)) { | 418 | !(einj->uncor_status & ~uncor_mask)) { |
421 | ret = -EINVAL; | 419 | ret = -EINVAL; |
422 | dev_warn(&dev->dev, | 420 | pci_warn(dev, "aer_inject: The uncorrectable error(s) is masked by device\n"); |
423 | "aer_inject: The uncorrectable error(s) is masked by device\n"); | ||
424 | spin_unlock_irqrestore(&inject_lock, flags); | 421 | spin_unlock_irqrestore(&inject_lock, flags); |
425 | goto out_put; | 422 | goto out_put; |
426 | } | 423 | } |
@@ -483,7 +480,7 @@ static int aer_inject(struct aer_error_inj *einj) | |||
483 | einj->cor_status, einj->uncor_status, pci_name(dev)); | 480 | einj->cor_status, einj->uncor_status, pci_name(dev)); |
484 | aer_irq(-1, edev); | 481 | aer_irq(-1, edev); |
485 | } else { | 482 | } else { |
486 | dev_err(&rpdev->dev, "aer_inject: AER device not found\n"); | 483 | pci_err(rpdev, "aer_inject: AER device not found\n"); |
487 | ret = -ENODEV; | 484 | ret = -ENODEV; |
488 | } | 485 | } |
489 | out_put: | 486 | out_put: |
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index 6ff5f5b4f5e6..bf6c9833a857 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c | |||
@@ -326,7 +326,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) | |||
326 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); | 326 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); |
327 | 327 | ||
328 | pci_reset_bridge_secondary_bus(dev); | 328 | pci_reset_bridge_secondary_bus(dev); |
329 | dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n"); | 329 | pci_printk(KERN_DEBUG, dev, "Root Port link has been reset\n"); |
330 | 330 | ||
331 | /* Clear Root Error Status */ | 331 | /* Clear Root Error Status */ |
332 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); | 332 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); |
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 92ec13a09a2a..03e04ca8b2ca 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c | |||
@@ -226,9 +226,8 @@ static bool find_source_device(struct pci_dev *parent, | |||
226 | pci_walk_bus(parent->subordinate, find_device_iter, e_info); | 226 | pci_walk_bus(parent->subordinate, find_device_iter, e_info); |
227 | 227 | ||
228 | if (!e_info->error_dev_num) { | 228 | if (!e_info->error_dev_num) { |
229 | dev_printk(KERN_DEBUG, &parent->dev, | 229 | pci_printk(KERN_DEBUG, parent, "can't find device of ID%04x\n", |
230 | "can't find device of ID%04x\n", | 230 | e_info->id); |
231 | e_info->id); | ||
232 | return false; | 231 | return false; |
233 | } | 232 | } |
234 | return true; | 233 | return true; |
@@ -256,7 +255,7 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
256 | * of a driver for this device is unaware of | 255 | * of a driver for this device is unaware of |
257 | * its hw state. | 256 | * its hw state. |
258 | */ | 257 | */ |
259 | dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n", | 258 | pci_printk(KERN_DEBUG, dev, "device has %s\n", |
260 | dev->driver ? | 259 | dev->driver ? |
261 | "no AER-aware driver" : "no driver"); | 260 | "no AER-aware driver" : "no driver"); |
262 | } | 261 | } |
@@ -364,7 +363,7 @@ static pci_ers_result_t broadcast_error_message(struct pci_dev *dev, | |||
364 | { | 363 | { |
365 | struct aer_broadcast_data result_data; | 364 | struct aer_broadcast_data result_data; |
366 | 365 | ||
367 | dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg); | 366 | pci_printk(KERN_DEBUG, dev, "broadcast %s message\n", error_mesg); |
368 | result_data.state = state; | 367 | result_data.state = state; |
369 | if (cb == report_error_detected) | 368 | if (cb == report_error_detected) |
370 | result_data.result = PCI_ERS_RESULT_CAN_RECOVER; | 369 | result_data.result = PCI_ERS_RESULT_CAN_RECOVER; |
@@ -413,7 +412,7 @@ static pci_ers_result_t broadcast_error_message(struct pci_dev *dev, | |||
413 | static pci_ers_result_t default_reset_link(struct pci_dev *dev) | 412 | static pci_ers_result_t default_reset_link(struct pci_dev *dev) |
414 | { | 413 | { |
415 | pci_reset_bridge_secondary_bus(dev); | 414 | pci_reset_bridge_secondary_bus(dev); |
416 | dev_printk(KERN_DEBUG, &dev->dev, "downstream link has been reset\n"); | 415 | pci_printk(KERN_DEBUG, dev, "downstream link has been reset\n"); |
417 | return PCI_ERS_RESULT_RECOVERED; | 416 | return PCI_ERS_RESULT_RECOVERED; |
418 | } | 417 | } |
419 | 418 | ||
@@ -465,15 +464,13 @@ static pci_ers_result_t reset_link(struct pci_dev *dev) | |||
465 | } else if (udev->has_secondary_link) { | 464 | } else if (udev->has_secondary_link) { |
466 | status = default_reset_link(udev); | 465 | status = default_reset_link(udev); |
467 | } else { | 466 | } else { |
468 | dev_printk(KERN_DEBUG, &dev->dev, | 467 | pci_printk(KERN_DEBUG, dev, "no link-reset support at upstream device %s\n", |
469 | "no link-reset support at upstream device %s\n", | ||
470 | pci_name(udev)); | 468 | pci_name(udev)); |
471 | return PCI_ERS_RESULT_DISCONNECT; | 469 | return PCI_ERS_RESULT_DISCONNECT; |
472 | } | 470 | } |
473 | 471 | ||
474 | if (status != PCI_ERS_RESULT_RECOVERED) { | 472 | if (status != PCI_ERS_RESULT_RECOVERED) { |
475 | dev_printk(KERN_DEBUG, &dev->dev, | 473 | pci_printk(KERN_DEBUG, dev, "link reset at upstream device %s failed\n", |
476 | "link reset at upstream device %s failed\n", | ||
477 | pci_name(udev)); | 474 | pci_name(udev)); |
478 | return PCI_ERS_RESULT_DISCONNECT; | 475 | return PCI_ERS_RESULT_DISCONNECT; |
479 | } | 476 | } |
@@ -537,12 +534,12 @@ static void do_recovery(struct pci_dev *dev, int severity) | |||
537 | "resume", | 534 | "resume", |
538 | report_resume); | 535 | report_resume); |
539 | 536 | ||
540 | dev_info(&dev->dev, "AER: Device recovery successful\n"); | 537 | pci_info(dev, "AER: Device recovery successful\n"); |
541 | return; | 538 | return; |
542 | 539 | ||
543 | failed: | 540 | failed: |
544 | /* TODO: Should kernel panic here? */ | 541 | /* TODO: Should kernel panic here? */ |
545 | dev_info(&dev->dev, "AER: Device recovery failed\n"); | 542 | pci_info(dev, "AER: Device recovery failed\n"); |
546 | } | 543 | } |
547 | 544 | ||
548 | /** | 545 | /** |
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c index 54c4b691e51f..0a7004a76735 100644 --- a/drivers/pci/pcie/aer/aerdrv_errprint.c +++ b/drivers/pci/pcie/aer/aerdrv_errprint.c | |||
@@ -132,7 +132,7 @@ static const char *aer_agent_string[] = { | |||
132 | static void __print_tlp_header(struct pci_dev *dev, | 132 | static void __print_tlp_header(struct pci_dev *dev, |
133 | struct aer_header_log_regs *t) | 133 | struct aer_header_log_regs *t) |
134 | { | 134 | { |
135 | dev_err(&dev->dev, " TLP Header: %08x %08x %08x %08x\n", | 135 | pci_err(dev, " TLP Header: %08x %08x %08x %08x\n", |
136 | t->dw0, t->dw1, t->dw2, t->dw3); | 136 | t->dw0, t->dw1, t->dw2, t->dw3); |
137 | } | 137 | } |
138 | 138 | ||
@@ -155,10 +155,10 @@ static void __aer_print_error(struct pci_dev *dev, | |||
155 | aer_uncorrectable_error_string[i] : NULL; | 155 | aer_uncorrectable_error_string[i] : NULL; |
156 | 156 | ||
157 | if (errmsg) | 157 | if (errmsg) |
158 | dev_err(&dev->dev, " [%2d] %-22s%s\n", i, errmsg, | 158 | pci_err(dev, " [%2d] %-22s%s\n", i, errmsg, |
159 | info->first_error == i ? " (First)" : ""); | 159 | info->first_error == i ? " (First)" : ""); |
160 | else | 160 | else |
161 | dev_err(&dev->dev, " [%2d] Unknown Error Bit%s\n", | 161 | pci_err(dev, " [%2d] Unknown Error Bit%s\n", |
162 | i, info->first_error == i ? " (First)" : ""); | 162 | i, info->first_error == i ? " (First)" : ""); |
163 | } | 163 | } |
164 | } | 164 | } |
@@ -169,7 +169,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) | |||
169 | int id = ((dev->bus->number << 8) | dev->devfn); | 169 | int id = ((dev->bus->number << 8) | dev->devfn); |
170 | 170 | ||
171 | if (!info->status) { | 171 | if (!info->status) { |
172 | dev_err(&dev->dev, "PCIe Bus Error: severity=%s, type=Unaccessible, id=%04x(Unregistered Agent ID)\n", | 172 | pci_err(dev, "PCIe Bus Error: severity=%s, type=Unaccessible, id=%04x(Unregistered Agent ID)\n", |
173 | aer_error_severity_string[info->severity], id); | 173 | aer_error_severity_string[info->severity], id); |
174 | goto out; | 174 | goto out; |
175 | } | 175 | } |
@@ -177,11 +177,11 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) | |||
177 | layer = AER_GET_LAYER_ERROR(info->severity, info->status); | 177 | layer = AER_GET_LAYER_ERROR(info->severity, info->status); |
178 | agent = AER_GET_AGENT(info->severity, info->status); | 178 | agent = AER_GET_AGENT(info->severity, info->status); |
179 | 179 | ||
180 | dev_err(&dev->dev, "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n", | 180 | pci_err(dev, "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n", |
181 | aer_error_severity_string[info->severity], | 181 | aer_error_severity_string[info->severity], |
182 | aer_error_layer[layer], id, aer_agent_string[agent]); | 182 | aer_error_layer[layer], id, aer_agent_string[agent]); |
183 | 183 | ||
184 | dev_err(&dev->dev, " device [%04x:%04x] error status/mask=%08x/%08x\n", | 184 | pci_err(dev, " device [%04x:%04x] error status/mask=%08x/%08x\n", |
185 | dev->vendor, dev->device, | 185 | dev->vendor, dev->device, |
186 | info->status, info->mask); | 186 | info->status, info->mask); |
187 | 187 | ||
@@ -192,7 +192,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) | |||
192 | 192 | ||
193 | out: | 193 | out: |
194 | if (info->id && info->error_dev_num > 1 && info->id == id) | 194 | if (info->id && info->error_dev_num > 1 && info->id == id) |
195 | dev_err(&dev->dev, " Error of this Agent(%04x) is reported first\n", id); | 195 | pci_err(dev, " Error of this Agent(%04x) is reported first\n", id); |
196 | 196 | ||
197 | trace_aer_event(dev_name(&dev->dev), (info->status & ~info->mask), | 197 | trace_aer_event(dev_name(&dev->dev), (info->status & ~info->mask), |
198 | info->severity); | 198 | info->severity); |
@@ -200,7 +200,7 @@ out: | |||
200 | 200 | ||
201 | void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info) | 201 | void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info) |
202 | { | 202 | { |
203 | dev_info(&dev->dev, "AER: %s%s error received: id=%04x\n", | 203 | pci_info(dev, "AER: %s%s error received: id=%04x\n", |
204 | info->multi_error_valid ? "Multiple " : "", | 204 | info->multi_error_valid ? "Multiple " : "", |
205 | aer_error_severity_string[info->severity], info->id); | 205 | aer_error_severity_string[info->severity], info->id); |
206 | } | 206 | } |
@@ -242,13 +242,13 @@ void cper_print_aer(struct pci_dev *dev, int aer_severity, | |||
242 | layer = AER_GET_LAYER_ERROR(aer_severity, status); | 242 | layer = AER_GET_LAYER_ERROR(aer_severity, status); |
243 | agent = AER_GET_AGENT(aer_severity, status); | 243 | agent = AER_GET_AGENT(aer_severity, status); |
244 | 244 | ||
245 | dev_err(&dev->dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n", status, mask); | 245 | pci_err(dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n", status, mask); |
246 | cper_print_bits("", status, status_strs, status_strs_size); | 246 | cper_print_bits("", status, status_strs, status_strs_size); |
247 | dev_err(&dev->dev, "aer_layer=%s, aer_agent=%s\n", | 247 | pci_err(dev, "aer_layer=%s, aer_agent=%s\n", |
248 | aer_error_layer[layer], aer_agent_string[agent]); | 248 | aer_error_layer[layer], aer_agent_string[agent]); |
249 | 249 | ||
250 | if (aer_severity != AER_CORRECTABLE) | 250 | if (aer_severity != AER_CORRECTABLE) |
251 | dev_err(&dev->dev, "aer_uncor_severity: 0x%08x\n", | 251 | pci_err(dev, "aer_uncor_severity: 0x%08x\n", |
252 | aer->uncor_severity); | 252 | aer->uncor_severity); |
253 | 253 | ||
254 | if (tlp_header_valid) | 254 | if (tlp_header_valid) |
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 3b9b4d50cd98..57feef2ecfe7 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c | |||
@@ -266,7 +266,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) | |||
266 | return; | 266 | return; |
267 | 267 | ||
268 | /* Training failed. Restore common clock configurations */ | 268 | /* Training failed. Restore common clock configurations */ |
269 | dev_err(&parent->dev, "ASPM: Could not configure common clock\n"); | 269 | pci_err(parent, "ASPM: Could not configure common clock\n"); |
270 | list_for_each_entry(child, &linkbus->devices, bus_list) | 270 | list_for_each_entry(child, &linkbus->devices, bus_list) |
271 | pcie_capability_write_word(child, PCI_EXP_LNKCTL, | 271 | pcie_capability_write_word(child, PCI_EXP_LNKCTL, |
272 | child_reg[PCI_FUNC(child->devfn)]); | 272 | child_reg[PCI_FUNC(child->devfn)]); |
@@ -316,8 +316,7 @@ static u32 calc_l1ss_pwron(struct pci_dev *pdev, u32 scale, u32 val) | |||
316 | case 2: | 316 | case 2: |
317 | return val * 100; | 317 | return val * 100; |
318 | } | 318 | } |
319 | dev_err(&pdev->dev, "%s: Invalid T_PwrOn scale: %u\n", | 319 | pci_err(pdev, "%s: Invalid T_PwrOn scale: %u\n", __func__, scale); |
320 | __func__, scale); | ||
321 | return 0; | 320 | return 0; |
322 | } | 321 | } |
323 | 322 | ||
@@ -809,7 +808,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev) | |||
809 | */ | 808 | */ |
810 | pcie_capability_read_dword(child, PCI_EXP_DEVCAP, ®32); | 809 | pcie_capability_read_dword(child, PCI_EXP_DEVCAP, ®32); |
811 | if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { | 810 | if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { |
812 | dev_info(&child->dev, "disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'\n"); | 811 | pci_info(child, "disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'\n"); |
813 | return -EINVAL; | 812 | return -EINVAL; |
814 | } | 813 | } |
815 | } | 814 | } |
@@ -1050,7 +1049,7 @@ static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem) | |||
1050 | * ignored in this situation. | 1049 | * ignored in this situation. |
1051 | */ | 1050 | */ |
1052 | if (aspm_disabled) { | 1051 | if (aspm_disabled) { |
1053 | dev_warn(&pdev->dev, "can't disable ASPM; OS doesn't have ASPM control\n"); | 1052 | pci_warn(pdev, "can't disable ASPM; OS doesn't have ASPM control\n"); |
1054 | return; | 1053 | return; |
1055 | } | 1054 | } |
1056 | 1055 | ||
diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c index df290aa58dce..046d9bf64ef1 100644 --- a/drivers/pci/pcie/pme.c +++ b/drivers/pci/pcie/pme.c | |||
@@ -198,14 +198,14 @@ static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id) | |||
198 | * assuming that the PME was reported by a PCIe-PCI bridge that | 198 | * assuming that the PME was reported by a PCIe-PCI bridge that |
199 | * used devfn different from zero. | 199 | * used devfn different from zero. |
200 | */ | 200 | */ |
201 | dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n", | 201 | pci_dbg(port, "PME interrupt generated for non-existent device %02x:%02x.%d\n", |
202 | busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); | 202 | busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); |
203 | found = pcie_pme_from_pci_bridge(bus, 0); | 203 | found = pcie_pme_from_pci_bridge(bus, 0); |
204 | } | 204 | } |
205 | 205 | ||
206 | out: | 206 | out: |
207 | if (!found) | 207 | if (!found) |
208 | dev_dbg(&port->dev, "Spurious native PME interrupt!\n"); | 208 | pci_dbg(port, "Spurious native PME interrupt!\n"); |
209 | } | 209 | } |
210 | 210 | ||
211 | /** | 211 | /** |
@@ -345,7 +345,7 @@ static int pcie_pme_probe(struct pcie_device *srv) | |||
345 | return ret; | 345 | return ret; |
346 | } | 346 | } |
347 | 347 | ||
348 | dev_info(&port->dev, "Signaling PME with IRQ %d\n", srv->irq); | 348 | pci_info(port, "Signaling PME with IRQ %d\n", srv->irq); |
349 | 349 | ||
350 | pcie_pme_mark_devices(port); | 350 | pcie_pme_mark_devices(port); |
351 | pcie_pme_interrupt_enable(port, true); | 351 | pcie_pme_interrupt_enable(port, true); |
diff --git a/drivers/pci/pcie/ptm.c b/drivers/pci/pcie/ptm.c index bab8ac63c4f3..c9f9b15a9e8a 100644 --- a/drivers/pci/pcie/ptm.c +++ b/drivers/pci/pcie/ptm.c | |||
@@ -33,7 +33,7 @@ static void pci_ptm_info(struct pci_dev *dev) | |||
33 | dev->ptm_granularity); | 33 | dev->ptm_granularity); |
34 | break; | 34 | break; |
35 | } | 35 | } |
36 | dev_info(&dev->dev, "PTM enabled%s, %s granularity\n", | 36 | pci_info(dev, "PTM enabled%s, %s granularity\n", |
37 | dev->ptm_root ? " (root)" : "", clock_desc); | 37 | dev->ptm_root ? " (root)" : "", clock_desc); |
38 | } | 38 | } |
39 | 39 | ||
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 070476036846..815c821fe950 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
@@ -253,7 +253,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, | |||
253 | 253 | ||
254 | sz64 = pci_size(l64, sz64, mask64); | 254 | sz64 = pci_size(l64, sz64, mask64); |
255 | if (!sz64) { | 255 | if (!sz64) { |
256 | dev_info(&dev->dev, FW_BUG "reg 0x%x: invalid BAR (can't size)\n", | 256 | pci_info(dev, FW_BUG "reg 0x%x: invalid BAR (can't size)\n", |
257 | pos); | 257 | pos); |
258 | goto fail; | 258 | goto fail; |
259 | } | 259 | } |
@@ -264,7 +264,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, | |||
264 | res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; | 264 | res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; |
265 | res->start = 0; | 265 | res->start = 0; |
266 | res->end = 0; | 266 | res->end = 0; |
267 | dev_err(&dev->dev, "reg 0x%x: can't handle BAR larger than 4GB (size %#010llx)\n", | 267 | pci_err(dev, "reg 0x%x: can't handle BAR larger than 4GB (size %#010llx)\n", |
268 | pos, (unsigned long long)sz64); | 268 | pos, (unsigned long long)sz64); |
269 | goto out; | 269 | goto out; |
270 | } | 270 | } |
@@ -274,7 +274,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, | |||
274 | res->flags |= IORESOURCE_UNSET; | 274 | res->flags |= IORESOURCE_UNSET; |
275 | res->start = 0; | 275 | res->start = 0; |
276 | res->end = sz64; | 276 | res->end = sz64; |
277 | dev_info(&dev->dev, "reg 0x%x: can't handle BAR above 4GB (bus address %#010llx)\n", | 277 | pci_info(dev, "reg 0x%x: can't handle BAR above 4GB (bus address %#010llx)\n", |
278 | pos, (unsigned long long)l64); | 278 | pos, (unsigned long long)l64); |
279 | goto out; | 279 | goto out; |
280 | } | 280 | } |
@@ -301,7 +301,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, | |||
301 | res->flags |= IORESOURCE_UNSET; | 301 | res->flags |= IORESOURCE_UNSET; |
302 | res->start = 0; | 302 | res->start = 0; |
303 | res->end = region.end - region.start; | 303 | res->end = region.end - region.start; |
304 | dev_info(&dev->dev, "reg 0x%x: initial BAR value %#010llx invalid\n", | 304 | pci_info(dev, "reg 0x%x: initial BAR value %#010llx invalid\n", |
305 | pos, (unsigned long long)region.start); | 305 | pos, (unsigned long long)region.start); |
306 | } | 306 | } |
307 | 307 | ||
@@ -312,7 +312,7 @@ fail: | |||
312 | res->flags = 0; | 312 | res->flags = 0; |
313 | out: | 313 | out: |
314 | if (res->flags) | 314 | if (res->flags) |
315 | dev_printk(KERN_DEBUG, &dev->dev, "reg 0x%x: %pR\n", pos, res); | 315 | pci_printk(KERN_DEBUG, dev, "reg 0x%x: %pR\n", pos, res); |
316 | 316 | ||
317 | return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | 317 | return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; |
318 | } | 318 | } |
@@ -375,7 +375,7 @@ static void pci_read_bridge_io(struct pci_bus *child) | |||
375 | region.start = base; | 375 | region.start = base; |
376 | region.end = limit + io_granularity - 1; | 376 | region.end = limit + io_granularity - 1; |
377 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 377 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
378 | dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); | 378 | pci_printk(KERN_DEBUG, dev, " bridge window %pR\n", res); |
379 | } | 379 | } |
380 | } | 380 | } |
381 | 381 | ||
@@ -397,7 +397,7 @@ static void pci_read_bridge_mmio(struct pci_bus *child) | |||
397 | region.start = base; | 397 | region.start = base; |
398 | region.end = limit + 0xfffff; | 398 | region.end = limit + 0xfffff; |
399 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 399 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
400 | dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); | 400 | pci_printk(KERN_DEBUG, dev, " bridge window %pR\n", res); |
401 | } | 401 | } |
402 | } | 402 | } |
403 | 403 | ||
@@ -437,7 +437,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child) | |||
437 | limit = (pci_bus_addr_t) limit64; | 437 | limit = (pci_bus_addr_t) limit64; |
438 | 438 | ||
439 | if (base != base64) { | 439 | if (base != base64) { |
440 | dev_err(&dev->dev, "can't handle bridge window above 4GB (bus address %#010llx)\n", | 440 | pci_err(dev, "can't handle bridge window above 4GB (bus address %#010llx)\n", |
441 | (unsigned long long) base64); | 441 | (unsigned long long) base64); |
442 | return; | 442 | return; |
443 | } | 443 | } |
@@ -450,7 +450,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child) | |||
450 | region.start = base; | 450 | region.start = base; |
451 | region.end = limit + 0xfffff; | 451 | region.end = limit + 0xfffff; |
452 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 452 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
453 | dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); | 453 | pci_printk(KERN_DEBUG, dev, " bridge window %pR\n", res); |
454 | } | 454 | } |
455 | } | 455 | } |
456 | 456 | ||
@@ -463,7 +463,7 @@ void pci_read_bridge_bases(struct pci_bus *child) | |||
463 | if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */ | 463 | if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */ |
464 | return; | 464 | return; |
465 | 465 | ||
466 | dev_info(&dev->dev, "PCI bridge to %pR%s\n", | 466 | pci_info(dev, "PCI bridge to %pR%s\n", |
467 | &child->busn_res, | 467 | &child->busn_res, |
468 | dev->transparent ? " (subtractive decode)" : ""); | 468 | dev->transparent ? " (subtractive decode)" : ""); |
469 | 469 | ||
@@ -480,7 +480,7 @@ void pci_read_bridge_bases(struct pci_bus *child) | |||
480 | if (res && res->flags) { | 480 | if (res && res->flags) { |
481 | pci_bus_add_resource(child, res, | 481 | pci_bus_add_resource(child, res, |
482 | PCI_SUBTRACTIVE_DECODE); | 482 | PCI_SUBTRACTIVE_DECODE); |
483 | dev_printk(KERN_DEBUG, &dev->dev, | 483 | pci_printk(KERN_DEBUG, dev, |
484 | " bridge window %pR (subtractive decode)\n", | 484 | " bridge window %pR (subtractive decode)\n", |
485 | res); | 485 | res); |
486 | } | 486 | } |
@@ -1005,11 +1005,11 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev, | |||
1005 | secondary = (buses >> 8) & 0xFF; | 1005 | secondary = (buses >> 8) & 0xFF; |
1006 | subordinate = (buses >> 16) & 0xFF; | 1006 | subordinate = (buses >> 16) & 0xFF; |
1007 | 1007 | ||
1008 | dev_dbg(&dev->dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n", | 1008 | pci_dbg(dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n", |
1009 | secondary, subordinate, pass); | 1009 | secondary, subordinate, pass); |
1010 | 1010 | ||
1011 | if (!primary && (primary != bus->number) && secondary && subordinate) { | 1011 | if (!primary && (primary != bus->number) && secondary && subordinate) { |
1012 | dev_warn(&dev->dev, "Primary bus is hard wired to 0\n"); | 1012 | pci_warn(dev, "Primary bus is hard wired to 0\n"); |
1013 | primary = bus->number; | 1013 | primary = bus->number; |
1014 | } | 1014 | } |
1015 | 1015 | ||
@@ -1017,7 +1017,7 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev, | |||
1017 | if (!pass && | 1017 | if (!pass && |
1018 | (primary != bus->number || secondary <= bus->number || | 1018 | (primary != bus->number || secondary <= bus->number || |
1019 | secondary > subordinate)) { | 1019 | secondary > subordinate)) { |
1020 | dev_info(&dev->dev, "bridge configuration invalid ([bus %02x-%02x]), reconfiguring\n", | 1020 | pci_info(dev, "bridge configuration invalid ([bus %02x-%02x]), reconfiguring\n", |
1021 | secondary, subordinate); | 1021 | secondary, subordinate); |
1022 | broken = 1; | 1022 | broken = 1; |
1023 | } | 1023 | } |
@@ -1058,7 +1058,7 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev, | |||
1058 | 1058 | ||
1059 | cmax = pci_scan_child_bus(child); | 1059 | cmax = pci_scan_child_bus(child); |
1060 | if (cmax > subordinate) | 1060 | if (cmax > subordinate) |
1061 | dev_warn(&dev->dev, "bridge has subordinate %02x but max busn %02x\n", | 1061 | pci_warn(dev, "bridge has subordinate %02x but max busn %02x\n", |
1062 | subordinate, cmax); | 1062 | subordinate, cmax); |
1063 | /* subordinate should equal child->busn_res.end */ | 1063 | /* subordinate should equal child->busn_res.end */ |
1064 | if (subordinate > max) | 1064 | if (subordinate > max) |
@@ -1468,7 +1468,7 @@ int pci_setup_device(struct pci_dev *dev) | |||
1468 | dev->revision = class & 0xff; | 1468 | dev->revision = class & 0xff; |
1469 | dev->class = class >> 8; /* upper 3 bytes */ | 1469 | dev->class = class >> 8; /* upper 3 bytes */ |
1470 | 1470 | ||
1471 | dev_printk(KERN_DEBUG, &dev->dev, "[%04x:%04x] type %02x class %#08x\n", | 1471 | pci_printk(KERN_DEBUG, dev, "[%04x:%04x] type %02x class %#08x\n", |
1472 | dev->vendor, dev->device, dev->hdr_type, dev->class); | 1472 | dev->vendor, dev->device, dev->hdr_type, dev->class); |
1473 | 1473 | ||
1474 | /* need to have dev->class ready */ | 1474 | /* need to have dev->class ready */ |
@@ -1488,7 +1488,7 @@ int pci_setup_device(struct pci_dev *dev) | |||
1488 | if (dev->non_compliant_bars) { | 1488 | if (dev->non_compliant_bars) { |
1489 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | 1489 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
1490 | if (cmd & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) { | 1490 | if (cmd & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) { |
1491 | dev_info(&dev->dev, "device has non-compliant BARs; disabling IO/MEM decoding\n"); | 1491 | pci_info(dev, "device has non-compliant BARs; disabling IO/MEM decoding\n"); |
1492 | cmd &= ~PCI_COMMAND_IO; | 1492 | cmd &= ~PCI_COMMAND_IO; |
1493 | cmd &= ~PCI_COMMAND_MEMORY; | 1493 | cmd &= ~PCI_COMMAND_MEMORY; |
1494 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 1494 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
@@ -1521,14 +1521,14 @@ int pci_setup_device(struct pci_dev *dev) | |||
1521 | res = &dev->resource[0]; | 1521 | res = &dev->resource[0]; |
1522 | res->flags = LEGACY_IO_RESOURCE; | 1522 | res->flags = LEGACY_IO_RESOURCE; |
1523 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 1523 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
1524 | dev_info(&dev->dev, "legacy IDE quirk: reg 0x10: %pR\n", | 1524 | pci_info(dev, "legacy IDE quirk: reg 0x10: %pR\n", |
1525 | res); | 1525 | res); |
1526 | region.start = 0x3F6; | 1526 | region.start = 0x3F6; |
1527 | region.end = 0x3F6; | 1527 | region.end = 0x3F6; |
1528 | res = &dev->resource[1]; | 1528 | res = &dev->resource[1]; |
1529 | res->flags = LEGACY_IO_RESOURCE; | 1529 | res->flags = LEGACY_IO_RESOURCE; |
1530 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 1530 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
1531 | dev_info(&dev->dev, "legacy IDE quirk: reg 0x14: %pR\n", | 1531 | pci_info(dev, "legacy IDE quirk: reg 0x14: %pR\n", |
1532 | res); | 1532 | res); |
1533 | } | 1533 | } |
1534 | if ((progif & 4) == 0) { | 1534 | if ((progif & 4) == 0) { |
@@ -1537,14 +1537,14 @@ int pci_setup_device(struct pci_dev *dev) | |||
1537 | res = &dev->resource[2]; | 1537 | res = &dev->resource[2]; |
1538 | res->flags = LEGACY_IO_RESOURCE; | 1538 | res->flags = LEGACY_IO_RESOURCE; |
1539 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 1539 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
1540 | dev_info(&dev->dev, "legacy IDE quirk: reg 0x18: %pR\n", | 1540 | pci_info(dev, "legacy IDE quirk: reg 0x18: %pR\n", |
1541 | res); | 1541 | res); |
1542 | region.start = 0x376; | 1542 | region.start = 0x376; |
1543 | region.end = 0x376; | 1543 | region.end = 0x376; |
1544 | res = &dev->resource[3]; | 1544 | res = &dev->resource[3]; |
1545 | res->flags = LEGACY_IO_RESOURCE; | 1545 | res->flags = LEGACY_IO_RESOURCE; |
1546 | pcibios_bus_to_resource(dev->bus, res, ®ion); | 1546 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
1547 | dev_info(&dev->dev, "legacy IDE quirk: reg 0x1c: %pR\n", | 1547 | pci_info(dev, "legacy IDE quirk: reg 0x1c: %pR\n", |
1548 | res); | 1548 | res); |
1549 | } | 1549 | } |
1550 | } | 1550 | } |
@@ -1577,12 +1577,12 @@ int pci_setup_device(struct pci_dev *dev) | |||
1577 | break; | 1577 | break; |
1578 | 1578 | ||
1579 | default: /* unknown header */ | 1579 | default: /* unknown header */ |
1580 | dev_err(&dev->dev, "unknown header type %02x, ignoring device\n", | 1580 | pci_err(dev, "unknown header type %02x, ignoring device\n", |
1581 | dev->hdr_type); | 1581 | dev->hdr_type); |
1582 | return -EIO; | 1582 | return -EIO; |
1583 | 1583 | ||
1584 | bad: | 1584 | bad: |
1585 | dev_err(&dev->dev, "ignoring class %#08x (doesn't match header type %02x)\n", | 1585 | pci_err(dev, "ignoring class %#08x (doesn't match header type %02x)\n", |
1586 | dev->class, dev->hdr_type); | 1586 | dev->class, dev->hdr_type); |
1587 | dev->class = PCI_CLASS_NOT_DEFINED << 8; | 1587 | dev->class = PCI_CLASS_NOT_DEFINED << 8; |
1588 | } | 1588 | } |
@@ -1606,7 +1606,7 @@ static void pci_configure_mps(struct pci_dev *dev) | |||
1606 | return; | 1606 | return; |
1607 | 1607 | ||
1608 | if (pcie_bus_config == PCIE_BUS_TUNE_OFF) { | 1608 | if (pcie_bus_config == PCIE_BUS_TUNE_OFF) { |
1609 | dev_warn(&dev->dev, "Max Payload Size %d, but upstream %s set to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n", | 1609 | pci_warn(dev, "Max Payload Size %d, but upstream %s set to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n", |
1610 | mps, pci_name(bridge), p_mps); | 1610 | mps, pci_name(bridge), p_mps); |
1611 | return; | 1611 | return; |
1612 | } | 1612 | } |
@@ -1620,12 +1620,12 @@ static void pci_configure_mps(struct pci_dev *dev) | |||
1620 | 1620 | ||
1621 | rc = pcie_set_mps(dev, p_mps); | 1621 | rc = pcie_set_mps(dev, p_mps); |
1622 | if (rc) { | 1622 | if (rc) { |
1623 | dev_warn(&dev->dev, "can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n", | 1623 | pci_warn(dev, "can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n", |
1624 | p_mps); | 1624 | p_mps); |
1625 | return; | 1625 | return; |
1626 | } | 1626 | } |
1627 | 1627 | ||
1628 | dev_info(&dev->dev, "Max Payload Size set to %d (was %d, max %d)\n", | 1628 | pci_info(dev, "Max Payload Size set to %d (was %d, max %d)\n", |
1629 | p_mps, mps, 128 << dev->pcie_mpss); | 1629 | p_mps, mps, 128 << dev->pcie_mpss); |
1630 | } | 1630 | } |
1631 | 1631 | ||
@@ -1645,8 +1645,7 @@ static void program_hpp_type0(struct pci_dev *dev, struct hpp_type0 *hpp) | |||
1645 | hpp = &pci_default_type0; | 1645 | hpp = &pci_default_type0; |
1646 | 1646 | ||
1647 | if (hpp->revision > 1) { | 1647 | if (hpp->revision > 1) { |
1648 | dev_warn(&dev->dev, | 1648 | pci_warn(dev, "PCI settings rev %d not supported; using defaults\n", |
1649 | "PCI settings rev %d not supported; using defaults\n", | ||
1650 | hpp->revision); | 1649 | hpp->revision); |
1651 | hpp = &pci_default_type0; | 1650 | hpp = &pci_default_type0; |
1652 | } | 1651 | } |
@@ -1684,7 +1683,7 @@ static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp) | |||
1684 | if (!pos) | 1683 | if (!pos) |
1685 | return; | 1684 | return; |
1686 | 1685 | ||
1687 | dev_warn(&dev->dev, "PCI-X settings not supported\n"); | 1686 | pci_warn(dev, "PCI-X settings not supported\n"); |
1688 | } | 1687 | } |
1689 | 1688 | ||
1690 | static bool pcie_root_rcb_set(struct pci_dev *dev) | 1689 | static bool pcie_root_rcb_set(struct pci_dev *dev) |
@@ -1714,7 +1713,7 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp) | |||
1714 | return; | 1713 | return; |
1715 | 1714 | ||
1716 | if (hpp->revision > 1) { | 1715 | if (hpp->revision > 1) { |
1717 | dev_warn(&dev->dev, "PCIe settings rev %d not supported\n", | 1716 | pci_warn(dev, "PCIe settings rev %d not supported\n", |
1718 | hpp->revision); | 1717 | hpp->revision); |
1719 | return; | 1718 | return; |
1720 | } | 1719 | } |
@@ -1818,7 +1817,7 @@ int pci_configure_extended_tags(struct pci_dev *dev, void *ign) | |||
1818 | */ | 1817 | */ |
1819 | if (host->no_ext_tags) { | 1818 | if (host->no_ext_tags) { |
1820 | if (ctl & PCI_EXP_DEVCTL_EXT_TAG) { | 1819 | if (ctl & PCI_EXP_DEVCTL_EXT_TAG) { |
1821 | dev_info(&dev->dev, "disabling Extended Tags\n"); | 1820 | pci_info(dev, "disabling Extended Tags\n"); |
1822 | pcie_capability_clear_word(dev, PCI_EXP_DEVCTL, | 1821 | pcie_capability_clear_word(dev, PCI_EXP_DEVCTL, |
1823 | PCI_EXP_DEVCTL_EXT_TAG); | 1822 | PCI_EXP_DEVCTL_EXT_TAG); |
1824 | } | 1823 | } |
@@ -1826,7 +1825,7 @@ int pci_configure_extended_tags(struct pci_dev *dev, void *ign) | |||
1826 | } | 1825 | } |
1827 | 1826 | ||
1828 | if (!(ctl & PCI_EXP_DEVCTL_EXT_TAG)) { | 1827 | if (!(ctl & PCI_EXP_DEVCTL_EXT_TAG)) { |
1829 | dev_info(&dev->dev, "enabling Extended Tags\n"); | 1828 | pci_info(dev, "enabling Extended Tags\n"); |
1830 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, | 1829 | pcie_capability_set_word(dev, PCI_EXP_DEVCTL, |
1831 | PCI_EXP_DEVCTL_EXT_TAG); | 1830 | PCI_EXP_DEVCTL_EXT_TAG); |
1832 | } | 1831 | } |
@@ -1871,7 +1870,7 @@ static void pci_configure_relaxed_ordering(struct pci_dev *dev) | |||
1871 | if (root->dev_flags & PCI_DEV_FLAGS_NO_RELAXED_ORDERING) { | 1870 | if (root->dev_flags & PCI_DEV_FLAGS_NO_RELAXED_ORDERING) { |
1872 | pcie_capability_clear_word(dev, PCI_EXP_DEVCTL, | 1871 | pcie_capability_clear_word(dev, PCI_EXP_DEVCTL, |
1873 | PCI_EXP_DEVCTL_RELAX_EN); | 1872 | PCI_EXP_DEVCTL_RELAX_EN); |
1874 | dev_info(&dev->dev, "Disable Relaxed Ordering because the Root Port didn't support it\n"); | 1873 | pci_info(dev, "Relaxed Ordering disabled because the Root Port didn't support it\n"); |
1875 | } | 1874 | } |
1876 | } | 1875 | } |
1877 | 1876 | ||
@@ -2372,7 +2371,7 @@ static void pcie_write_mps(struct pci_dev *dev, int mps) | |||
2372 | 2371 | ||
2373 | rc = pcie_set_mps(dev, mps); | 2372 | rc = pcie_set_mps(dev, mps); |
2374 | if (rc) | 2373 | if (rc) |
2375 | dev_err(&dev->dev, "Failed attempting to set the MPS\n"); | 2374 | pci_err(dev, "Failed attempting to set the MPS\n"); |
2376 | } | 2375 | } |
2377 | 2376 | ||
2378 | static void pcie_write_mrrs(struct pci_dev *dev) | 2377 | static void pcie_write_mrrs(struct pci_dev *dev) |
@@ -2402,12 +2401,12 @@ static void pcie_write_mrrs(struct pci_dev *dev) | |||
2402 | if (!rc) | 2401 | if (!rc) |
2403 | break; | 2402 | break; |
2404 | 2403 | ||
2405 | dev_warn(&dev->dev, "Failed attempting to set the MRRS\n"); | 2404 | pci_warn(dev, "Failed attempting to set the MRRS\n"); |
2406 | mrrs /= 2; | 2405 | mrrs /= 2; |
2407 | } | 2406 | } |
2408 | 2407 | ||
2409 | if (mrrs < 128) | 2408 | if (mrrs < 128) |
2410 | dev_err(&dev->dev, "MRRS was unable to be configured with a safe value. If problems are experienced, try running with pci=pcie_bus_safe\n"); | 2409 | pci_err(dev, "MRRS was unable to be configured with a safe value. If problems are experienced, try running with pci=pcie_bus_safe\n"); |
2411 | } | 2410 | } |
2412 | 2411 | ||
2413 | static int pcie_bus_configure_set(struct pci_dev *dev, void *data) | 2412 | static int pcie_bus_configure_set(struct pci_dev *dev, void *data) |
@@ -2427,7 +2426,7 @@ static int pcie_bus_configure_set(struct pci_dev *dev, void *data) | |||
2427 | pcie_write_mps(dev, mps); | 2426 | pcie_write_mps(dev, mps); |
2428 | pcie_write_mrrs(dev); | 2427 | pcie_write_mrrs(dev); |
2429 | 2428 | ||
2430 | dev_info(&dev->dev, "Max Payload Size set to %4d/%4d (was %4d), Max Read Rq %4d\n", | 2429 | pci_info(dev, "Max Payload Size set to %4d/%4d (was %4d), Max Read Rq %4d\n", |
2431 | pcie_get_mps(dev), 128 << dev->pcie_mpss, | 2430 | pcie_get_mps(dev), 128 << dev->pcie_mpss, |
2432 | orig_mps, pcie_get_readrq(dev)); | 2431 | orig_mps, pcie_get_readrq(dev)); |
2433 | 2432 | ||
@@ -2912,7 +2911,7 @@ int pci_hp_add_bridge(struct pci_dev *dev) | |||
2912 | break; | 2911 | break; |
2913 | } | 2912 | } |
2914 | if (busnr-- > end) { | 2913 | if (busnr-- > end) { |
2915 | dev_err(&dev->dev, "No bus number available for hot-added bridge\n"); | 2914 | pci_err(dev, "No bus number available for hot-added bridge\n"); |
2916 | return -1; | 2915 | return -1; |
2917 | } | 2916 | } |
2918 | 2917 | ||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 24e9a148e734..78047dc89213 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/acpi.h> | 21 | #include <linux/acpi.h> |
22 | #include <linux/kallsyms.h> | ||
23 | #include <linux/dmi.h> | 22 | #include <linux/dmi.h> |
24 | #include <linux/pci-aspm.h> | 23 | #include <linux/pci-aspm.h> |
25 | #include <linux/ioport.h> | 24 | #include <linux/ioport.h> |
@@ -66,7 +65,7 @@ static void quirk_passive_release(struct pci_dev *dev) | |||
66 | while ((d = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, d))) { | 65 | while ((d = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, d))) { |
67 | pci_read_config_byte(d, 0x82, &dlc); | 66 | pci_read_config_byte(d, 0x82, &dlc); |
68 | if (!(dlc & 1<<1)) { | 67 | if (!(dlc & 1<<1)) { |
69 | dev_info(&d->dev, "PIIX3: Enabling Passive Release\n"); | 68 | pci_info(d, "PIIX3: Enabling Passive Release\n"); |
70 | dlc |= 1<<1; | 69 | dlc |= 1<<1; |
71 | pci_write_config_byte(d, 0x82, dlc); | 70 | pci_write_config_byte(d, 0x82, dlc); |
72 | } | 71 | } |
@@ -86,7 +85,7 @@ static void quirk_isa_dma_hangs(struct pci_dev *dev) | |||
86 | { | 85 | { |
87 | if (!isa_dma_bridge_buggy) { | 86 | if (!isa_dma_bridge_buggy) { |
88 | isa_dma_bridge_buggy = 1; | 87 | isa_dma_bridge_buggy = 1; |
89 | dev_info(&dev->dev, "Activating ISA DMA hang workarounds\n"); | 88 | pci_info(dev, "Activating ISA DMA hang workarounds\n"); |
90 | } | 89 | } |
91 | } | 90 | } |
92 | /* | 91 | /* |
@@ -115,7 +114,7 @@ static void quirk_tigerpoint_bm_sts(struct pci_dev *dev) | |||
115 | pm1a = inw(pmbase); | 114 | pm1a = inw(pmbase); |
116 | 115 | ||
117 | if (pm1a & 0x10) { | 116 | if (pm1a & 0x10) { |
118 | dev_info(&dev->dev, FW_BUG "TigerPoint LPC.BM_STS cleared\n"); | 117 | pci_info(dev, FW_BUG "TigerPoint LPC.BM_STS cleared\n"); |
119 | outw(0x10, pmbase); | 118 | outw(0x10, pmbase); |
120 | } | 119 | } |
121 | } | 120 | } |
@@ -127,7 +126,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk | |||
127 | static void quirk_nopcipci(struct pci_dev *dev) | 126 | static void quirk_nopcipci(struct pci_dev *dev) |
128 | { | 127 | { |
129 | if ((pci_pci_problems & PCIPCI_FAIL) == 0) { | 128 | if ((pci_pci_problems & PCIPCI_FAIL) == 0) { |
130 | dev_info(&dev->dev, "Disabling direct PCI/PCI transfers\n"); | 129 | pci_info(dev, "Disabling direct PCI/PCI transfers\n"); |
131 | pci_pci_problems |= PCIPCI_FAIL; | 130 | pci_pci_problems |= PCIPCI_FAIL; |
132 | } | 131 | } |
133 | } | 132 | } |
@@ -140,7 +139,7 @@ static void quirk_nopciamd(struct pci_dev *dev) | |||
140 | pci_read_config_byte(dev, 0x08, &rev); | 139 | pci_read_config_byte(dev, 0x08, &rev); |
141 | if (rev == 0x13) { | 140 | if (rev == 0x13) { |
142 | /* Erratum 24 */ | 141 | /* Erratum 24 */ |
143 | dev_info(&dev->dev, "Chipset erratum: Disabling direct PCI/AGP transfers\n"); | 142 | pci_info(dev, "Chipset erratum: Disabling direct PCI/AGP transfers\n"); |
144 | pci_pci_problems |= PCIAGP_FAIL; | 143 | pci_pci_problems |= PCIAGP_FAIL; |
145 | } | 144 | } |
146 | } | 145 | } |
@@ -152,7 +151,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8151_0, quirk_nopci | |||
152 | static void quirk_triton(struct pci_dev *dev) | 151 | static void quirk_triton(struct pci_dev *dev) |
153 | { | 152 | { |
154 | if ((pci_pci_problems&PCIPCI_TRITON) == 0) { | 153 | if ((pci_pci_problems&PCIPCI_TRITON) == 0) { |
155 | dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); | 154 | pci_info(dev, "Limiting direct PCI/PCI transfers\n"); |
156 | pci_pci_problems |= PCIPCI_TRITON; | 155 | pci_pci_problems |= PCIPCI_TRITON; |
157 | } | 156 | } |
158 | } | 157 | } |
@@ -212,7 +211,7 @@ static void quirk_vialatency(struct pci_dev *dev) | |||
212 | busarb &= ~(1<<5); | 211 | busarb &= ~(1<<5); |
213 | busarb |= (1<<4); | 212 | busarb |= (1<<4); |
214 | pci_write_config_byte(dev, 0x76, busarb); | 213 | pci_write_config_byte(dev, 0x76, busarb); |
215 | dev_info(&dev->dev, "Applying VIA southbridge workaround\n"); | 214 | pci_info(dev, "Applying VIA southbridge workaround\n"); |
216 | exit: | 215 | exit: |
217 | pci_dev_put(p); | 216 | pci_dev_put(p); |
218 | } | 217 | } |
@@ -230,7 +229,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, quirk_viala | |||
230 | static void quirk_viaetbf(struct pci_dev *dev) | 229 | static void quirk_viaetbf(struct pci_dev *dev) |
231 | { | 230 | { |
232 | if ((pci_pci_problems&PCIPCI_VIAETBF) == 0) { | 231 | if ((pci_pci_problems&PCIPCI_VIAETBF) == 0) { |
233 | dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); | 232 | pci_info(dev, "Limiting direct PCI/PCI transfers\n"); |
234 | pci_pci_problems |= PCIPCI_VIAETBF; | 233 | pci_pci_problems |= PCIPCI_VIAETBF; |
235 | } | 234 | } |
236 | } | 235 | } |
@@ -239,7 +238,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_via | |||
239 | static void quirk_vsfx(struct pci_dev *dev) | 238 | static void quirk_vsfx(struct pci_dev *dev) |
240 | { | 239 | { |
241 | if ((pci_pci_problems&PCIPCI_VSFX) == 0) { | 240 | if ((pci_pci_problems&PCIPCI_VSFX) == 0) { |
242 | dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); | 241 | pci_info(dev, "Limiting direct PCI/PCI transfers\n"); |
243 | pci_pci_problems |= PCIPCI_VSFX; | 242 | pci_pci_problems |= PCIPCI_VSFX; |
244 | } | 243 | } |
245 | } | 244 | } |
@@ -254,7 +253,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx) | |||
254 | static void quirk_alimagik(struct pci_dev *dev) | 253 | static void quirk_alimagik(struct pci_dev *dev) |
255 | { | 254 | { |
256 | if ((pci_pci_problems&PCIPCI_ALIMAGIK) == 0) { | 255 | if ((pci_pci_problems&PCIPCI_ALIMAGIK) == 0) { |
257 | dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); | 256 | pci_info(dev, "Limiting direct PCI/PCI transfers\n"); |
258 | pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON; | 257 | pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON; |
259 | } | 258 | } |
260 | } | 259 | } |
@@ -268,7 +267,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimagi | |||
268 | static void quirk_natoma(struct pci_dev *dev) | 267 | static void quirk_natoma(struct pci_dev *dev) |
269 | { | 268 | { |
270 | if ((pci_pci_problems&PCIPCI_NATOMA) == 0) { | 269 | if ((pci_pci_problems&PCIPCI_NATOMA) == 0) { |
271 | dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); | 270 | pci_info(dev, "Limiting direct PCI/PCI transfers\n"); |
272 | pci_pci_problems |= PCIPCI_NATOMA; | 271 | pci_pci_problems |= PCIPCI_NATOMA; |
273 | } | 272 | } |
274 | } | 273 | } |
@@ -313,7 +312,7 @@ static void quirk_extend_bar_to_page(struct pci_dev *dev) | |||
313 | r->end = PAGE_SIZE - 1; | 312 | r->end = PAGE_SIZE - 1; |
314 | r->start = 0; | 313 | r->start = 0; |
315 | r->flags |= IORESOURCE_UNSET; | 314 | r->flags |= IORESOURCE_UNSET; |
316 | dev_info(&dev->dev, "expanded BAR %d to page size: %pR\n", | 315 | pci_info(dev, "expanded BAR %d to page size: %pR\n", |
317 | i, r); | 316 | i, r); |
318 | } | 317 | } |
319 | } | 318 | } |
@@ -360,7 +359,7 @@ static void quirk_io(struct pci_dev *dev, int pos, unsigned size, | |||
360 | bus_region.end = region + size - 1; | 359 | bus_region.end = region + size - 1; |
361 | pcibios_bus_to_resource(dev->bus, res, &bus_region); | 360 | pcibios_bus_to_resource(dev->bus, res, &bus_region); |
362 | 361 | ||
363 | dev_info(&dev->dev, FW_BUG "%s quirk: reg 0x%x: %pR\n", | 362 | pci_info(dev, FW_BUG "%s quirk: reg 0x%x: %pR\n", |
364 | name, PCI_BASE_ADDRESS_0 + (pos << 2), res); | 363 | name, PCI_BASE_ADDRESS_0 + (pos << 2), res); |
365 | } | 364 | } |
366 | 365 | ||
@@ -381,7 +380,7 @@ static void quirk_cs5536_vsa(struct pci_dev *dev) | |||
381 | quirk_io(dev, 0, 8, name); /* SMB */ | 380 | quirk_io(dev, 0, 8, name); /* SMB */ |
382 | quirk_io(dev, 1, 256, name); /* GPIO */ | 381 | quirk_io(dev, 1, 256, name); /* GPIO */ |
383 | quirk_io(dev, 2, 64, name); /* MFGPT */ | 382 | quirk_io(dev, 2, 64, name); /* MFGPT */ |
384 | dev_info(&dev->dev, "%s bug detected (incorrect header); workaround applied\n", | 383 | pci_info(dev, "%s bug detected (incorrect header); workaround applied\n", |
385 | name); | 384 | name); |
386 | } | 385 | } |
387 | } | 386 | } |
@@ -409,7 +408,7 @@ static void quirk_io_region(struct pci_dev *dev, int port, | |||
409 | pcibios_bus_to_resource(dev->bus, res, &bus_region); | 408 | pcibios_bus_to_resource(dev->bus, res, &bus_region); |
410 | 409 | ||
411 | if (!pci_claim_resource(dev, nr)) | 410 | if (!pci_claim_resource(dev, nr)) |
412 | dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name); | 411 | pci_info(dev, "quirk: %pR claimed by %s\n", res, name); |
413 | } | 412 | } |
414 | 413 | ||
415 | /* | 414 | /* |
@@ -418,7 +417,7 @@ static void quirk_io_region(struct pci_dev *dev, int port, | |||
418 | */ | 417 | */ |
419 | static void quirk_ati_exploding_mce(struct pci_dev *dev) | 418 | static void quirk_ati_exploding_mce(struct pci_dev *dev) |
420 | { | 419 | { |
421 | dev_info(&dev->dev, "ATI Northbridge, reserving I/O ports 0x3b0 to 0x3bb\n"); | 420 | pci_info(dev, "ATI Northbridge, reserving I/O ports 0x3b0 to 0x3bb\n"); |
422 | /* Mae rhaid i ni beidio ag edrych ar y lleoliadiau I/O hyn */ | 421 | /* Mae rhaid i ni beidio ag edrych ar y lleoliadiau I/O hyn */ |
423 | request_region(0x3b0, 0x0C, "RadeonIGP"); | 422 | request_region(0x3b0, 0x0C, "RadeonIGP"); |
424 | request_region(0x3d3, 0x01, "RadeonIGP"); | 423 | request_region(0x3d3, 0x01, "RadeonIGP"); |
@@ -441,7 +440,7 @@ static void quirk_amd_nl_class(struct pci_dev *pdev) | |||
441 | 440 | ||
442 | /* Use "USB Device (not host controller)" class */ | 441 | /* Use "USB Device (not host controller)" class */ |
443 | pdev->class = PCI_CLASS_SERIAL_USB_DEVICE; | 442 | pdev->class = PCI_CLASS_SERIAL_USB_DEVICE; |
444 | dev_info(&pdev->dev, "PCI class overridden (%#08x -> %#08x) so dwc3 driver can claim this instead of xhci\n", | 443 | pci_info(pdev, "PCI class overridden (%#08x -> %#08x) so dwc3 driver can claim this instead of xhci\n", |
445 | class, pdev->class); | 444 | class, pdev->class); |
446 | } | 445 | } |
447 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB, | 446 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB, |
@@ -488,8 +487,7 @@ static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int p | |||
488 | * let's get enough confirmation reports first. | 487 | * let's get enough confirmation reports first. |
489 | */ | 488 | */ |
490 | base &= -size; | 489 | base &= -size; |
491 | dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, | 490 | pci_info(dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1); |
492 | base + size - 1); | ||
493 | } | 491 | } |
494 | 492 | ||
495 | static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable) | 493 | static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable) |
@@ -514,8 +512,7 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int | |||
514 | * reserve it, but let's get enough confirmation reports first. | 512 | * reserve it, but let's get enough confirmation reports first. |
515 | */ | 513 | */ |
516 | base &= -size; | 514 | base &= -size; |
517 | dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, | 515 | pci_info(dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1); |
518 | base + size - 1); | ||
519 | } | 516 | } |
520 | 517 | ||
521 | /* | 518 | /* |
@@ -644,7 +641,7 @@ static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const cha | |||
644 | base &= ~(size-1); | 641 | base &= ~(size-1); |
645 | 642 | ||
646 | /* Just print it out for now. We should reserve it after more debugging */ | 643 | /* Just print it out for now. We should reserve it after more debugging */ |
647 | dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base+size-1); | 644 | pci_info(dev, "%s PIO at %04x-%04x\n", name, base, base+size-1); |
648 | } | 645 | } |
649 | 646 | ||
650 | static void quirk_ich6_lpc(struct pci_dev *dev) | 647 | static void quirk_ich6_lpc(struct pci_dev *dev) |
@@ -679,7 +676,7 @@ static void ich7_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const cha | |||
679 | mask |= 3; | 676 | mask |= 3; |
680 | 677 | ||
681 | /* Just print it out for now. We should reserve it after more debugging */ | 678 | /* Just print it out for now. We should reserve it after more debugging */ |
682 | dev_info(&dev->dev, "%s PIO at %04x (mask %04x)\n", name, base, mask); | 679 | pci_info(dev, "%s PIO at %04x (mask %04x)\n", name, base, mask); |
683 | } | 680 | } |
684 | 681 | ||
685 | /* ICH7-10 has the same common LPC generic IO decode registers */ | 682 | /* ICH7-10 has the same common LPC generic IO decode registers */ |
@@ -758,7 +755,7 @@ static void quirk_xio2000a(struct pci_dev *dev) | |||
758 | struct pci_dev *pdev; | 755 | struct pci_dev *pdev; |
759 | u16 command; | 756 | u16 command; |
760 | 757 | ||
761 | dev_warn(&dev->dev, "TI XIO2000a quirk detected; secondary bus fast back-to-back transfers disabled\n"); | 758 | pci_warn(dev, "TI XIO2000a quirk detected; secondary bus fast back-to-back transfers disabled\n"); |
762 | list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) { | 759 | list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) { |
763 | pci_read_config_word(pdev, PCI_COMMAND, &command); | 760 | pci_read_config_word(pdev, PCI_COMMAND, &command); |
764 | if (command & PCI_COMMAND_FAST_BACK) | 761 | if (command & PCI_COMMAND_FAST_BACK) |
@@ -788,7 +785,7 @@ static void quirk_via_ioapic(struct pci_dev *dev) | |||
788 | else | 785 | else |
789 | tmp = 0x1f; /* all known bits (4-0) routed to external APIC */ | 786 | tmp = 0x1f; /* all known bits (4-0) routed to external APIC */ |
790 | 787 | ||
791 | dev_info(&dev->dev, "%sbling VIA external APIC routing\n", | 788 | pci_info(dev, "%sbling VIA external APIC routing\n", |
792 | tmp == 0 ? "Disa" : "Ena"); | 789 | tmp == 0 ? "Disa" : "Ena"); |
793 | 790 | ||
794 | /* Offset 0x58: External APIC IRQ output control */ | 791 | /* Offset 0x58: External APIC IRQ output control */ |
@@ -810,7 +807,7 @@ static void quirk_via_vt8237_bypass_apic_deassert(struct pci_dev *dev) | |||
810 | 807 | ||
811 | pci_read_config_byte(dev, 0x5B, &misc_control2); | 808 | pci_read_config_byte(dev, 0x5B, &misc_control2); |
812 | if (!(misc_control2 & BYPASS_APIC_DEASSERT)) { | 809 | if (!(misc_control2 & BYPASS_APIC_DEASSERT)) { |
813 | dev_info(&dev->dev, "Bypassing VIA 8237 APIC De-Assert Message\n"); | 810 | pci_info(dev, "Bypassing VIA 8237 APIC De-Assert Message\n"); |
814 | pci_write_config_byte(dev, 0x5B, misc_control2|BYPASS_APIC_DEASSERT); | 811 | pci_write_config_byte(dev, 0x5B, misc_control2|BYPASS_APIC_DEASSERT); |
815 | } | 812 | } |
816 | } | 813 | } |
@@ -829,8 +826,8 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk | |||
829 | static void quirk_amd_ioapic(struct pci_dev *dev) | 826 | static void quirk_amd_ioapic(struct pci_dev *dev) |
830 | { | 827 | { |
831 | if (dev->revision >= 0x02) { | 828 | if (dev->revision >= 0x02) { |
832 | dev_warn(&dev->dev, "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n"); | 829 | pci_warn(dev, "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n"); |
833 | dev_warn(&dev->dev, " : booting with the \"noapic\" option\n"); | 830 | pci_warn(dev, " : booting with the \"noapic\" option\n"); |
834 | } | 831 | } |
835 | } | 832 | } |
836 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic); | 833 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic); |
@@ -854,7 +851,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CAVIUM, 0xa018, quirk_cavium_sriov_rnm_lin | |||
854 | static void quirk_amd_8131_mmrbc(struct pci_dev *dev) | 851 | static void quirk_amd_8131_mmrbc(struct pci_dev *dev) |
855 | { | 852 | { |
856 | if (dev->subordinate && dev->revision <= 0x12) { | 853 | if (dev->subordinate && dev->revision <= 0x12) { |
857 | dev_info(&dev->dev, "AMD8131 rev %x detected; disabling PCI-X MMRBC\n", | 854 | pci_info(dev, "AMD8131 rev %x detected; disabling PCI-X MMRBC\n", |
858 | dev->revision); | 855 | dev->revision); |
859 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; | 856 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; |
860 | } | 857 | } |
@@ -962,7 +959,7 @@ static void quirk_via_vlink(struct pci_dev *dev) | |||
962 | 959 | ||
963 | pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); | 960 | pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); |
964 | if (new_irq != irq) { | 961 | if (new_irq != irq) { |
965 | dev_info(&dev->dev, "VIA VLink IRQ fixup, from %d to %d\n", | 962 | pci_info(dev, "VIA VLink IRQ fixup, from %d to %d\n", |
966 | irq, new_irq); | 963 | irq, new_irq); |
967 | udelay(15); /* unknown if delay really needed */ | 964 | udelay(15); /* unknown if delay really needed */ |
968 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); | 965 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); |
@@ -1011,7 +1008,7 @@ static void quirk_amd_ordering(struct pci_dev *dev) | |||
1011 | pci_read_config_dword(dev, 0x4C, &pcic); | 1008 | pci_read_config_dword(dev, 0x4C, &pcic); |
1012 | if ((pcic & 6) != 6) { | 1009 | if ((pcic & 6) != 6) { |
1013 | pcic |= 6; | 1010 | pcic |= 6; |
1014 | dev_warn(&dev->dev, "BIOS failed to enable PCI standards compliance; fixing this error\n"); | 1011 | pci_warn(dev, "BIOS failed to enable PCI standards compliance; fixing this error\n"); |
1015 | pci_write_config_dword(dev, 0x4C, pcic); | 1012 | pci_write_config_dword(dev, 0x4C, pcic); |
1016 | pci_read_config_dword(dev, 0x84, &pcic); | 1013 | pci_read_config_dword(dev, 0x84, &pcic); |
1017 | pcic |= (1 << 23); /* Required in this mode */ | 1014 | pcic |= (1 << 23); /* Required in this mode */ |
@@ -1064,7 +1061,7 @@ static void quirk_mediagx_master(struct pci_dev *dev) | |||
1064 | pci_read_config_byte(dev, 0x41, ®); | 1061 | pci_read_config_byte(dev, 0x41, ®); |
1065 | if (reg & 2) { | 1062 | if (reg & 2) { |
1066 | reg &= ~2; | 1063 | reg &= ~2; |
1067 | dev_info(&dev->dev, "Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n", | 1064 | pci_info(dev, "Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n", |
1068 | reg); | 1065 | reg); |
1069 | pci_write_config_byte(dev, 0x41, reg); | 1066 | pci_write_config_byte(dev, 0x41, reg); |
1070 | } | 1067 | } |
@@ -1087,7 +1084,7 @@ static void quirk_disable_pxb(struct pci_dev *pdev) | |||
1087 | if (config & (1<<6)) { | 1084 | if (config & (1<<6)) { |
1088 | config &= ~(1<<6); | 1085 | config &= ~(1<<6); |
1089 | pci_write_config_word(pdev, 0x40, config); | 1086 | pci_write_config_word(pdev, 0x40, config); |
1090 | dev_info(&pdev->dev, "C0 revision 450NX. Disabling PCI restreaming\n"); | 1087 | pci_info(pdev, "C0 revision 450NX. Disabling PCI restreaming\n"); |
1091 | } | 1088 | } |
1092 | } | 1089 | } |
1093 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb); | 1090 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb); |
@@ -1107,7 +1104,7 @@ static void quirk_amd_ide_mode(struct pci_dev *pdev) | |||
1107 | pci_write_config_byte(pdev, 0x40, tmp); | 1104 | pci_write_config_byte(pdev, 0x40, tmp); |
1108 | 1105 | ||
1109 | pdev->class = PCI_CLASS_STORAGE_SATA_AHCI; | 1106 | pdev->class = PCI_CLASS_STORAGE_SATA_AHCI; |
1110 | dev_info(&pdev->dev, "set SATA to AHCI mode\n"); | 1107 | pci_info(pdev, "set SATA to AHCI mode\n"); |
1111 | } | 1108 | } |
1112 | } | 1109 | } |
1113 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk_amd_ide_mode); | 1110 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk_amd_ide_mode); |
@@ -1145,7 +1142,7 @@ static void quirk_ide_samemode(struct pci_dev *pdev) | |||
1145 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog); | 1142 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog); |
1146 | 1143 | ||
1147 | if (((prog & 1) && !(prog & 4)) || ((prog & 4) && !(prog & 1))) { | 1144 | if (((prog & 1) && !(prog & 4)) || ((prog & 4) && !(prog & 1))) { |
1148 | dev_info(&pdev->dev, "IDE mode mismatch; forcing legacy mode\n"); | 1145 | pci_info(pdev, "IDE mode mismatch; forcing legacy mode\n"); |
1149 | prog &= ~5; | 1146 | prog &= ~5; |
1150 | pdev->class &= ~5; | 1147 | pdev->class &= ~5; |
1151 | pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); | 1148 | pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); |
@@ -1356,10 +1353,10 @@ static void asus_hides_smbus_lpc(struct pci_dev *dev) | |||
1356 | pci_write_config_word(dev, 0xF2, val & (~0x8)); | 1353 | pci_write_config_word(dev, 0xF2, val & (~0x8)); |
1357 | pci_read_config_word(dev, 0xF2, &val); | 1354 | pci_read_config_word(dev, 0xF2, &val); |
1358 | if (val & 0x8) | 1355 | if (val & 0x8) |
1359 | dev_info(&dev->dev, "i801 SMBus device continues to play 'hide and seek'! 0x%x\n", | 1356 | pci_info(dev, "i801 SMBus device continues to play 'hide and seek'! 0x%x\n", |
1360 | val); | 1357 | val); |
1361 | else | 1358 | else |
1362 | dev_info(&dev->dev, "Enabled i801 SMBus device\n"); | 1359 | pci_info(dev, "Enabled i801 SMBus device\n"); |
1363 | } | 1360 | } |
1364 | } | 1361 | } |
1365 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, asus_hides_smbus_lpc); | 1362 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, asus_hides_smbus_lpc); |
@@ -1411,7 +1408,7 @@ static void asus_hides_smbus_lpc_ich6_resume(struct pci_dev *dev) | |||
1411 | return; | 1408 | return; |
1412 | iounmap(asus_rcba_base); | 1409 | iounmap(asus_rcba_base); |
1413 | asus_rcba_base = NULL; | 1410 | asus_rcba_base = NULL; |
1414 | dev_info(&dev->dev, "Enabled ICH6/i801 SMBus device\n"); | 1411 | pci_info(dev, "Enabled ICH6/i801 SMBus device\n"); |
1415 | } | 1412 | } |
1416 | 1413 | ||
1417 | static void asus_hides_smbus_lpc_ich6(struct pci_dev *dev) | 1414 | static void asus_hides_smbus_lpc_ich6(struct pci_dev *dev) |
@@ -1433,7 +1430,7 @@ static void quirk_sis_96x_smbus(struct pci_dev *dev) | |||
1433 | u8 val = 0; | 1430 | u8 val = 0; |
1434 | pci_read_config_byte(dev, 0x77, &val); | 1431 | pci_read_config_byte(dev, 0x77, &val); |
1435 | if (val & 0x10) { | 1432 | if (val & 0x10) { |
1436 | dev_info(&dev->dev, "Enabling SiS 96x SMBus\n"); | 1433 | pci_info(dev, "Enabling SiS 96x SMBus\n"); |
1437 | pci_write_config_byte(dev, 0x77, val & ~0x10); | 1434 | pci_write_config_byte(dev, 0x77, val & ~0x10); |
1438 | } | 1435 | } |
1439 | } | 1436 | } |
@@ -1505,10 +1502,10 @@ static void asus_hides_ac97_lpc(struct pci_dev *dev) | |||
1505 | pci_write_config_byte(dev, 0x50, val & (~0xc0)); | 1502 | pci_write_config_byte(dev, 0x50, val & (~0xc0)); |
1506 | pci_read_config_byte(dev, 0x50, &val); | 1503 | pci_read_config_byte(dev, 0x50, &val); |
1507 | if (val & 0xc0) | 1504 | if (val & 0xc0) |
1508 | dev_info(&dev->dev, "Onboard AC97/MC97 devices continue to play 'hide and seek'! 0x%x\n", | 1505 | pci_info(dev, "Onboard AC97/MC97 devices continue to play 'hide and seek'! 0x%x\n", |
1509 | val); | 1506 | val); |
1510 | else | 1507 | else |
1511 | dev_info(&dev->dev, "Enabled onboard AC97/MC97 devices\n"); | 1508 | pci_info(dev, "Enabled onboard AC97/MC97 devices\n"); |
1512 | } | 1509 | } |
1513 | } | 1510 | } |
1514 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc); | 1511 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, asus_hides_ac97_lpc); |
@@ -1599,7 +1596,7 @@ static void quirk_jmicron_async_suspend(struct pci_dev *dev) | |||
1599 | { | 1596 | { |
1600 | if (dev->multifunction) { | 1597 | if (dev->multifunction) { |
1601 | device_disable_async_suspend(&dev->dev); | 1598 | device_disable_async_suspend(&dev->dev); |
1602 | dev_info(&dev->dev, "async suspend disabled to avoid multi-function power-on ordering issue\n"); | 1599 | pci_info(dev, "async suspend disabled to avoid multi-function power-on ordering issue\n"); |
1603 | } | 1600 | } |
1604 | } | 1601 | } |
1605 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, 8, quirk_jmicron_async_suspend); | 1602 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, 8, quirk_jmicron_async_suspend); |
@@ -1646,7 +1643,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, quirk_pcie_mch); | |||
1646 | static void quirk_pcie_pxh(struct pci_dev *dev) | 1643 | static void quirk_pcie_pxh(struct pci_dev *dev) |
1647 | { | 1644 | { |
1648 | dev->no_msi = 1; | 1645 | dev->no_msi = 1; |
1649 | dev_warn(&dev->dev, "PXH quirk detected; SHPC device MSI disabled\n"); | 1646 | pci_warn(dev, "PXH quirk detected; SHPC device MSI disabled\n"); |
1650 | } | 1647 | } |
1651 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_0, quirk_pcie_pxh); | 1648 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_0, quirk_pcie_pxh); |
1652 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_1, quirk_pcie_pxh); | 1649 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHD_1, quirk_pcie_pxh); |
@@ -1692,7 +1689,7 @@ static void quirk_radeon_pm(struct pci_dev *dev) | |||
1692 | dev->subsystem_device == 0x00e2) { | 1689 | dev->subsystem_device == 0x00e2) { |
1693 | if (dev->d3_delay < 20) { | 1690 | if (dev->d3_delay < 20) { |
1694 | dev->d3_delay = 20; | 1691 | dev->d3_delay = 20; |
1695 | dev_info(&dev->dev, "extending delay after power-on from D3 to %d msec\n", | 1692 | pci_info(dev, "extending delay after power-on from D3 to %d msec\n", |
1696 | dev->d3_delay); | 1693 | dev->d3_delay); |
1697 | } | 1694 | } |
1698 | } | 1695 | } |
@@ -1736,7 +1733,7 @@ static void quirk_reroute_to_boot_interrupts_intel(struct pci_dev *dev) | |||
1736 | return; | 1733 | return; |
1737 | 1734 | ||
1738 | dev->irq_reroute_variant = INTEL_IRQ_REROUTE_VARIANT; | 1735 | dev->irq_reroute_variant = INTEL_IRQ_REROUTE_VARIANT; |
1739 | dev_info(&dev->dev, "rerouting interrupts for [%04x:%04x]\n", | 1736 | pci_info(dev, "rerouting interrupts for [%04x:%04x]\n", |
1740 | dev->vendor, dev->device); | 1737 | dev->vendor, dev->device); |
1741 | } | 1738 | } |
1742 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80333_0, quirk_reroute_to_boot_interrupts_intel); | 1739 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80333_0, quirk_reroute_to_boot_interrupts_intel); |
@@ -1779,7 +1776,7 @@ static void quirk_disable_intel_boot_interrupt(struct pci_dev *dev) | |||
1779 | pci_config_word |= INTEL_6300_DISABLE_BOOT_IRQ; | 1776 | pci_config_word |= INTEL_6300_DISABLE_BOOT_IRQ; |
1780 | pci_write_config_word(dev, INTEL_6300_IOAPIC_ABAR, pci_config_word); | 1777 | pci_write_config_word(dev, INTEL_6300_IOAPIC_ABAR, pci_config_word); |
1781 | 1778 | ||
1782 | dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n", | 1779 | pci_info(dev, "disabled boot interrupts on device [%04x:%04x]\n", |
1783 | dev->vendor, dev->device); | 1780 | dev->vendor, dev->device); |
1784 | } | 1781 | } |
1785 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_10, quirk_disable_intel_boot_interrupt); | 1782 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_10, quirk_disable_intel_boot_interrupt); |
@@ -1812,7 +1809,7 @@ static void quirk_disable_broadcom_boot_interrupt(struct pci_dev *dev) | |||
1812 | 1809 | ||
1813 | pci_write_config_dword(dev, BC_HT1000_FEATURE_REG, pci_config_dword); | 1810 | pci_write_config_dword(dev, BC_HT1000_FEATURE_REG, pci_config_dword); |
1814 | 1811 | ||
1815 | dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n", | 1812 | pci_info(dev, "disabled boot interrupts on device [%04x:%04x]\n", |
1816 | dev->vendor, dev->device); | 1813 | dev->vendor, dev->device); |
1817 | } | 1814 | } |
1818 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB, quirk_disable_broadcom_boot_interrupt); | 1815 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB, quirk_disable_broadcom_boot_interrupt); |
@@ -1845,7 +1842,7 @@ static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev) | |||
1845 | pci_config_dword &= ~AMD_813X_NOIOAMODE; | 1842 | pci_config_dword &= ~AMD_813X_NOIOAMODE; |
1846 | pci_write_config_dword(dev, AMD_813X_MISC, pci_config_dword); | 1843 | pci_write_config_dword(dev, AMD_813X_MISC, pci_config_dword); |
1847 | 1844 | ||
1848 | dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n", | 1845 | pci_info(dev, "disabled boot interrupts on device [%04x:%04x]\n", |
1849 | dev->vendor, dev->device); | 1846 | dev->vendor, dev->device); |
1850 | } | 1847 | } |
1851 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt); | 1848 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt); |
@@ -1864,12 +1861,12 @@ static void quirk_disable_amd_8111_boot_interrupt(struct pci_dev *dev) | |||
1864 | 1861 | ||
1865 | pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word); | 1862 | pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word); |
1866 | if (!pci_config_word) { | 1863 | if (!pci_config_word) { |
1867 | dev_info(&dev->dev, "boot interrupts on device [%04x:%04x] already disabled\n", | 1864 | pci_info(dev, "boot interrupts on device [%04x:%04x] already disabled\n", |
1868 | dev->vendor, dev->device); | 1865 | dev->vendor, dev->device); |
1869 | return; | 1866 | return; |
1870 | } | 1867 | } |
1871 | pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0); | 1868 | pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0); |
1872 | dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n", | 1869 | pci_info(dev, "disabled boot interrupts on device [%04x:%04x]\n", |
1873 | dev->vendor, dev->device); | 1870 | dev->vendor, dev->device); |
1874 | } | 1871 | } |
1875 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, quirk_disable_amd_8111_boot_interrupt); | 1872 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, quirk_disable_amd_8111_boot_interrupt); |
@@ -1913,7 +1910,7 @@ static void quirk_plx_pci9050(struct pci_dev *dev) | |||
1913 | if (pci_resource_len(dev, bar) == 0x80 && | 1910 | if (pci_resource_len(dev, bar) == 0x80 && |
1914 | (pci_resource_start(dev, bar) & 0x80)) { | 1911 | (pci_resource_start(dev, bar) & 0x80)) { |
1915 | struct resource *r = &dev->resource[bar]; | 1912 | struct resource *r = &dev->resource[bar]; |
1916 | dev_info(&dev->dev, "Re-allocating PLX PCI 9050 BAR %u to length 256 to avoid bit 7 bug\n", | 1913 | pci_info(dev, "Re-allocating PLX PCI 9050 BAR %u to length 256 to avoid bit 7 bug\n", |
1917 | bar); | 1914 | bar); |
1918 | r->flags |= IORESOURCE_UNSET; | 1915 | r->flags |= IORESOURCE_UNSET; |
1919 | r->start = 0; | 1916 | r->start = 0; |
@@ -1960,7 +1957,7 @@ static void quirk_netmos(struct pci_dev *dev) | |||
1960 | case PCI_DEVICE_ID_NETMOS_9845: | 1957 | case PCI_DEVICE_ID_NETMOS_9845: |
1961 | case PCI_DEVICE_ID_NETMOS_9855: | 1958 | case PCI_DEVICE_ID_NETMOS_9855: |
1962 | if (num_parallel) { | 1959 | if (num_parallel) { |
1963 | dev_info(&dev->dev, "Netmos %04x (%u parallel, %u serial); changing class SERIAL to OTHER (use parport_serial)\n", | 1960 | pci_info(dev, "Netmos %04x (%u parallel, %u serial); changing class SERIAL to OTHER (use parport_serial)\n", |
1964 | dev->device, num_parallel, num_serial); | 1961 | dev->device, num_parallel, num_serial); |
1965 | dev->class = (PCI_CLASS_COMMUNICATION_OTHER << 8) | | 1962 | dev->class = (PCI_CLASS_COMMUNICATION_OTHER << 8) | |
1966 | (dev->class & 0xff); | 1963 | (dev->class & 0xff); |
@@ -2046,13 +2043,13 @@ static void quirk_e100_interrupt(struct pci_dev *dev) | |||
2046 | /* Convert from PCI bus to resource space. */ | 2043 | /* Convert from PCI bus to resource space. */ |
2047 | csr = ioremap(pci_resource_start(dev, 0), 8); | 2044 | csr = ioremap(pci_resource_start(dev, 0), 8); |
2048 | if (!csr) { | 2045 | if (!csr) { |
2049 | dev_warn(&dev->dev, "Can't map e100 registers\n"); | 2046 | pci_warn(dev, "Can't map e100 registers\n"); |
2050 | return; | 2047 | return; |
2051 | } | 2048 | } |
2052 | 2049 | ||
2053 | cmd_hi = readb(csr + 3); | 2050 | cmd_hi = readb(csr + 3); |
2054 | if (cmd_hi == 0) { | 2051 | if (cmd_hi == 0) { |
2055 | dev_warn(&dev->dev, "Firmware left e100 interrupts enabled; disabling\n"); | 2052 | pci_warn(dev, "Firmware left e100 interrupts enabled; disabling\n"); |
2056 | writeb(1, csr + 3); | 2053 | writeb(1, csr + 3); |
2057 | } | 2054 | } |
2058 | 2055 | ||
@@ -2067,7 +2064,7 @@ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, | |||
2067 | */ | 2064 | */ |
2068 | static void quirk_disable_aspm_l0s(struct pci_dev *dev) | 2065 | static void quirk_disable_aspm_l0s(struct pci_dev *dev) |
2069 | { | 2066 | { |
2070 | dev_info(&dev->dev, "Disabling L0s\n"); | 2067 | pci_info(dev, "Disabling L0s\n"); |
2071 | pci_disable_link_state(dev, PCIE_LINK_STATE_L0S); | 2068 | pci_disable_link_state(dev, PCIE_LINK_STATE_L0S); |
2072 | } | 2069 | } |
2073 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10a7, quirk_disable_aspm_l0s); | 2070 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10a7, quirk_disable_aspm_l0s); |
@@ -2097,7 +2094,7 @@ static void fixup_rev1_53c810(struct pci_dev *dev) | |||
2097 | return; | 2094 | return; |
2098 | 2095 | ||
2099 | dev->class = PCI_CLASS_STORAGE_SCSI << 8; | 2096 | dev->class = PCI_CLASS_STORAGE_SCSI << 8; |
2100 | dev_info(&dev->dev, "NCR 53c810 rev 1 PCI class overridden (%#08x -> %#08x)\n", | 2097 | pci_info(dev, "NCR 53c810 rev 1 PCI class overridden (%#08x -> %#08x)\n", |
2101 | class, dev->class); | 2098 | class, dev->class); |
2102 | } | 2099 | } |
2103 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810); | 2100 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810); |
@@ -2110,7 +2107,7 @@ static void quirk_p64h2_1k_io(struct pci_dev *dev) | |||
2110 | pci_read_config_word(dev, 0x40, &en1k); | 2107 | pci_read_config_word(dev, 0x40, &en1k); |
2111 | 2108 | ||
2112 | if (en1k & 0x200) { | 2109 | if (en1k & 0x200) { |
2113 | dev_info(&dev->dev, "Enable I/O Space to 1KB granularity\n"); | 2110 | pci_info(dev, "Enable I/O Space to 1KB granularity\n"); |
2114 | dev->io_window_1k = 1; | 2111 | dev->io_window_1k = 1; |
2115 | } | 2112 | } |
2116 | } | 2113 | } |
@@ -2126,7 +2123,7 @@ static void quirk_nvidia_ck804_pcie_aer_ext_cap(struct pci_dev *dev) | |||
2126 | if (pci_read_config_byte(dev, 0xf41, &b) == 0) { | 2123 | if (pci_read_config_byte(dev, 0xf41, &b) == 0) { |
2127 | if (!(b & 0x20)) { | 2124 | if (!(b & 0x20)) { |
2128 | pci_write_config_byte(dev, 0xf41, b | 0x20); | 2125 | pci_write_config_byte(dev, 0xf41, b | 0x20); |
2129 | dev_info(&dev->dev, "Linking AER extended capability\n"); | 2126 | pci_info(dev, "Linking AER extended capability\n"); |
2130 | } | 2127 | } |
2131 | } | 2128 | } |
2132 | } | 2129 | } |
@@ -2164,7 +2161,7 @@ static void quirk_via_cx700_pci_parking_caching(struct pci_dev *dev) | |||
2164 | /* Turn off PCI Bus Parking */ | 2161 | /* Turn off PCI Bus Parking */ |
2165 | pci_write_config_byte(dev, 0x76, b ^ 0x40); | 2162 | pci_write_config_byte(dev, 0x76, b ^ 0x40); |
2166 | 2163 | ||
2167 | dev_info(&dev->dev, "Disabling VIA CX700 PCI parking\n"); | 2164 | pci_info(dev, "Disabling VIA CX700 PCI parking\n"); |
2168 | } | 2165 | } |
2169 | } | 2166 | } |
2170 | 2167 | ||
@@ -2179,7 +2176,7 @@ static void quirk_via_cx700_pci_parking_caching(struct pci_dev *dev) | |||
2179 | /* Disable "Read FIFO Timer" */ | 2176 | /* Disable "Read FIFO Timer" */ |
2180 | pci_write_config_byte(dev, 0x77, 0x0); | 2177 | pci_write_config_byte(dev, 0x77, 0x0); |
2181 | 2178 | ||
2182 | dev_info(&dev->dev, "Disabling VIA CX700 PCI caching\n"); | 2179 | pci_info(dev, "Disabling VIA CX700 PCI caching\n"); |
2183 | } | 2180 | } |
2184 | } | 2181 | } |
2185 | } | 2182 | } |
@@ -2196,7 +2193,7 @@ static void quirk_blacklist_vpd(struct pci_dev *dev) | |||
2196 | { | 2193 | { |
2197 | if (dev->vpd) { | 2194 | if (dev->vpd) { |
2198 | dev->vpd->len = 0; | 2195 | dev->vpd->len = 0; |
2199 | dev_warn(&dev->dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n"); | 2196 | pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n"); |
2200 | } | 2197 | } |
2201 | } | 2198 | } |
2202 | 2199 | ||
@@ -2312,7 +2309,7 @@ static void quirk_unhide_mch_dev6(struct pci_dev *dev) | |||
2312 | u8 reg; | 2309 | u8 reg; |
2313 | 2310 | ||
2314 | if (pci_read_config_byte(dev, 0xF4, ®) == 0 && !(reg & 0x02)) { | 2311 | if (pci_read_config_byte(dev, 0xF4, ®) == 0 && !(reg & 0x02)) { |
2315 | dev_info(&dev->dev, "Enabling MCH 'Overflow' Device\n"); | 2312 | pci_info(dev, "Enabling MCH 'Overflow' Device\n"); |
2316 | pci_write_config_byte(dev, 0xF4, reg | 0x02); | 2313 | pci_write_config_byte(dev, 0xF4, reg | 0x02); |
2317 | } | 2314 | } |
2318 | } | 2315 | } |
@@ -2351,7 +2348,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8624, quirk_tile_plx_gen1); | |||
2351 | static void quirk_disable_all_msi(struct pci_dev *dev) | 2348 | static void quirk_disable_all_msi(struct pci_dev *dev) |
2352 | { | 2349 | { |
2353 | pci_no_msi(); | 2350 | pci_no_msi(); |
2354 | dev_warn(&dev->dev, "MSI quirk detected; MSI disabled\n"); | 2351 | pci_warn(dev, "MSI quirk detected; MSI disabled\n"); |
2355 | } | 2352 | } |
2356 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_GCNB_LE, quirk_disable_all_msi); | 2353 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_GCNB_LE, quirk_disable_all_msi); |
2357 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_disable_all_msi); | 2354 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_disable_all_msi); |
@@ -2366,7 +2363,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, 0x0761, quirk_disable_all_msi); | |||
2366 | static void quirk_disable_msi(struct pci_dev *dev) | 2363 | static void quirk_disable_msi(struct pci_dev *dev) |
2367 | { | 2364 | { |
2368 | if (dev->subordinate) { | 2365 | if (dev->subordinate) { |
2369 | dev_warn(&dev->dev, "MSI quirk detected; subordinate MSI disabled\n"); | 2366 | pci_warn(dev, "MSI quirk detected; subordinate MSI disabled\n"); |
2370 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | 2367 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; |
2371 | } | 2368 | } |
2372 | } | 2369 | } |
@@ -2406,7 +2403,7 @@ static int msi_ht_cap_enabled(struct pci_dev *dev) | |||
2406 | 2403 | ||
2407 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, | 2404 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, |
2408 | &flags) == 0) { | 2405 | &flags) == 0) { |
2409 | dev_info(&dev->dev, "Found %s HT MSI Mapping\n", | 2406 | pci_info(dev, "Found %s HT MSI Mapping\n", |
2410 | flags & HT_MSI_FLAGS_ENABLE ? | 2407 | flags & HT_MSI_FLAGS_ENABLE ? |
2411 | "enabled" : "disabled"); | 2408 | "enabled" : "disabled"); |
2412 | return (flags & HT_MSI_FLAGS_ENABLE) != 0; | 2409 | return (flags & HT_MSI_FLAGS_ENABLE) != 0; |
@@ -2422,7 +2419,7 @@ static int msi_ht_cap_enabled(struct pci_dev *dev) | |||
2422 | static void quirk_msi_ht_cap(struct pci_dev *dev) | 2419 | static void quirk_msi_ht_cap(struct pci_dev *dev) |
2423 | { | 2420 | { |
2424 | if (dev->subordinate && !msi_ht_cap_enabled(dev)) { | 2421 | if (dev->subordinate && !msi_ht_cap_enabled(dev)) { |
2425 | dev_warn(&dev->dev, "MSI quirk detected; subordinate MSI disabled\n"); | 2422 | pci_warn(dev, "MSI quirk detected; subordinate MSI disabled\n"); |
2426 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | 2423 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; |
2427 | } | 2424 | } |
2428 | } | 2425 | } |
@@ -2446,7 +2443,7 @@ static void quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev) | |||
2446 | if (!pdev) | 2443 | if (!pdev) |
2447 | return; | 2444 | return; |
2448 | if (!msi_ht_cap_enabled(dev) && !msi_ht_cap_enabled(pdev)) { | 2445 | if (!msi_ht_cap_enabled(dev) && !msi_ht_cap_enabled(pdev)) { |
2449 | dev_warn(&dev->dev, "MSI quirk detected; subordinate MSI disabled\n"); | 2446 | pci_warn(dev, "MSI quirk detected; subordinate MSI disabled\n"); |
2450 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | 2447 | dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; |
2451 | } | 2448 | } |
2452 | pci_dev_put(pdev); | 2449 | pci_dev_put(pdev); |
@@ -2465,7 +2462,7 @@ static void ht_enable_msi_mapping(struct pci_dev *dev) | |||
2465 | 2462 | ||
2466 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, | 2463 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, |
2467 | &flags) == 0) { | 2464 | &flags) == 0) { |
2468 | dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); | 2465 | pci_info(dev, "Enabling HT MSI Mapping\n"); |
2469 | 2466 | ||
2470 | pci_write_config_byte(dev, pos + HT_MSI_FLAGS, | 2467 | pci_write_config_byte(dev, pos + HT_MSI_FLAGS, |
2471 | flags | HT_MSI_FLAGS_ENABLE); | 2468 | flags | HT_MSI_FLAGS_ENABLE); |
@@ -2492,7 +2489,7 @@ static void nvenet_msi_disable(struct pci_dev *dev) | |||
2492 | if (board_name && | 2489 | if (board_name && |
2493 | (strstr(board_name, "P5N32-SLI PREMIUM") || | 2490 | (strstr(board_name, "P5N32-SLI PREMIUM") || |
2494 | strstr(board_name, "P5N32-E SLI"))) { | 2491 | strstr(board_name, "P5N32-E SLI"))) { |
2495 | dev_info(&dev->dev, "Disabling msi for MCP55 NIC on P5N32-SLI\n"); | 2492 | pci_info(dev, "Disabling MSI for MCP55 NIC on P5N32-SLI\n"); |
2496 | dev->no_msi = 1; | 2493 | dev->no_msi = 1; |
2497 | } | 2494 | } |
2498 | } | 2495 | } |
@@ -2669,7 +2666,7 @@ static void ht_disable_msi_mapping(struct pci_dev *dev) | |||
2669 | 2666 | ||
2670 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, | 2667 | if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, |
2671 | &flags) == 0) { | 2668 | &flags) == 0) { |
2672 | dev_info(&dev->dev, "Disabling HT MSI Mapping\n"); | 2669 | pci_info(dev, "Disabling HT MSI Mapping\n"); |
2673 | 2670 | ||
2674 | pci_write_config_byte(dev, pos + HT_MSI_FLAGS, | 2671 | pci_write_config_byte(dev, pos + HT_MSI_FLAGS, |
2675 | flags & ~HT_MSI_FLAGS_ENABLE); | 2672 | flags & ~HT_MSI_FLAGS_ENABLE); |
@@ -2702,7 +2699,7 @@ static void __nv_msi_ht_cap_quirk(struct pci_dev *dev, int all) | |||
2702 | host_bridge = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), 0, | 2699 | host_bridge = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), 0, |
2703 | PCI_DEVFN(0, 0)); | 2700 | PCI_DEVFN(0, 0)); |
2704 | if (host_bridge == NULL) { | 2701 | if (host_bridge == NULL) { |
2705 | dev_warn(&dev->dev, "nv_msi_ht_cap_quirk didn't locate host bridge\n"); | 2702 | pci_warn(dev, "nv_msi_ht_cap_quirk didn't locate host bridge\n"); |
2706 | return; | 2703 | return; |
2707 | } | 2704 | } |
2708 | 2705 | ||
@@ -2771,7 +2768,7 @@ static void quirk_msi_intx_disable_qca_bug(struct pci_dev *dev) | |||
2771 | { | 2768 | { |
2772 | /* AR816X/AR817X/E210X MSI is fixed at HW level from revision 0x18 */ | 2769 | /* AR816X/AR817X/E210X MSI is fixed at HW level from revision 0x18 */ |
2773 | if (dev->revision < 0x18) { | 2770 | if (dev->revision < 0x18) { |
2774 | dev_info(&dev->dev, "set MSI_INTX_DISABLE_BUG flag\n"); | 2771 | pci_info(dev, "set MSI_INTX_DISABLE_BUG flag\n"); |
2775 | dev->dev_flags |= PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG; | 2772 | dev->dev_flags |= PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG; |
2776 | } | 2773 | } |
2777 | } | 2774 | } |
@@ -2900,8 +2897,8 @@ static void ricoh_mmc_fixup_rl5c476(struct pci_dev *dev) | |||
2900 | pci_write_config_byte(dev, 0x8E, write_enable); | 2897 | pci_write_config_byte(dev, 0x8E, write_enable); |
2901 | pci_write_config_byte(dev, 0x8D, write_target); | 2898 | pci_write_config_byte(dev, 0x8D, write_target); |
2902 | 2899 | ||
2903 | dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via cardbus function)\n"); | 2900 | pci_notice(dev, "proprietary Ricoh MMC controller disabled (via cardbus function)\n"); |
2904 | dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n"); | 2901 | pci_notice(dev, "MMC cards are now supported by standard SDHCI controller\n"); |
2905 | } | 2902 | } |
2906 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476); | 2903 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476); |
2907 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476); | 2904 | DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476); |
@@ -2936,7 +2933,7 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev) | |||
2936 | pci_write_config_byte(dev, 0xe1, 0x32); | 2933 | pci_write_config_byte(dev, 0xe1, 0x32); |
2937 | pci_write_config_byte(dev, 0xfc, 0x00); | 2934 | pci_write_config_byte(dev, 0xfc, 0x00); |
2938 | 2935 | ||
2939 | dev_notice(&dev->dev, "MMC controller base frequency changed to 50Mhz.\n"); | 2936 | pci_notice(dev, "MMC controller base frequency changed to 50Mhz.\n"); |
2940 | } | 2937 | } |
2941 | 2938 | ||
2942 | pci_read_config_byte(dev, 0xCB, &disable); | 2939 | pci_read_config_byte(dev, 0xCB, &disable); |
@@ -2949,8 +2946,8 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev) | |||
2949 | pci_write_config_byte(dev, 0xCB, disable | 0x02); | 2946 | pci_write_config_byte(dev, 0xCB, disable | 0x02); |
2950 | pci_write_config_byte(dev, 0xCA, write_enable); | 2947 | pci_write_config_byte(dev, 0xCA, write_enable); |
2951 | 2948 | ||
2952 | dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via firewire function)\n"); | 2949 | pci_notice(dev, "proprietary Ricoh MMC controller disabled (via firewire function)\n"); |
2953 | dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n"); | 2950 | pci_notice(dev, "MMC cards are now supported by standard SDHCI controller\n"); |
2954 | 2951 | ||
2955 | } | 2952 | } |
2956 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832); | 2953 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832); |
@@ -2991,7 +2988,7 @@ static void fixup_ti816x_class(struct pci_dev *dev) | |||
2991 | 2988 | ||
2992 | /* TI 816x devices do not have class code set when in PCIe boot mode */ | 2989 | /* TI 816x devices do not have class code set when in PCIe boot mode */ |
2993 | dev->class = PCI_CLASS_MULTIMEDIA_VIDEO << 8; | 2990 | dev->class = PCI_CLASS_MULTIMEDIA_VIDEO << 8; |
2994 | dev_info(&dev->dev, "PCI class overridden (%#08x -> %#08x)\n", | 2991 | pci_info(dev, "PCI class overridden (%#08x -> %#08x)\n", |
2995 | class, dev->class); | 2992 | class, dev->class); |
2996 | } | 2993 | } |
2997 | DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_TI, 0xb800, | 2994 | DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_TI, 0xb800, |
@@ -3033,7 +3030,7 @@ static void quirk_intel_mc_errata(struct pci_dev *dev) | |||
3033 | */ | 3030 | */ |
3034 | err = pci_read_config_word(dev, 0x48, &rcc); | 3031 | err = pci_read_config_word(dev, 0x48, &rcc); |
3035 | if (err) { | 3032 | if (err) { |
3036 | dev_err(&dev->dev, "Error attempting to read the read completion coalescing register\n"); | 3033 | pci_err(dev, "Error attempting to read the read completion coalescing register\n"); |
3037 | return; | 3034 | return; |
3038 | } | 3035 | } |
3039 | 3036 | ||
@@ -3044,7 +3041,7 @@ static void quirk_intel_mc_errata(struct pci_dev *dev) | |||
3044 | 3041 | ||
3045 | err = pci_write_config_word(dev, 0x48, rcc); | 3042 | err = pci_write_config_word(dev, 0x48, rcc); |
3046 | if (err) { | 3043 | if (err) { |
3047 | dev_err(&dev->dev, "Error attempting to write the read completion coalescing register\n"); | 3044 | pci_err(dev, "Error attempting to write the read completion coalescing register\n"); |
3048 | return; | 3045 | return; |
3049 | } | 3046 | } |
3050 | 3047 | ||
@@ -3109,7 +3106,7 @@ static ktime_t fixup_debug_start(struct pci_dev *dev, | |||
3109 | { | 3106 | { |
3110 | ktime_t calltime = 0; | 3107 | ktime_t calltime = 0; |
3111 | 3108 | ||
3112 | dev_dbg(&dev->dev, "calling %pF\n", fn); | 3109 | pci_dbg(dev, "calling %pF\n", fn); |
3113 | if (initcall_debug) { | 3110 | if (initcall_debug) { |
3114 | pr_debug("calling %pF @ %i for %s\n", | 3111 | pr_debug("calling %pF @ %i for %s\n", |
3115 | fn, task_pid_nr(current), dev_name(&dev->dev)); | 3112 | fn, task_pid_nr(current), dev_name(&dev->dev)); |
@@ -3151,13 +3148,13 @@ static void disable_igfx_irq(struct pci_dev *dev) | |||
3151 | { | 3148 | { |
3152 | void __iomem *regs = pci_iomap(dev, 0, 0); | 3149 | void __iomem *regs = pci_iomap(dev, 0, 0); |
3153 | if (regs == NULL) { | 3150 | if (regs == NULL) { |
3154 | dev_warn(&dev->dev, "igfx quirk: Can't iomap PCI device\n"); | 3151 | pci_warn(dev, "igfx quirk: Can't iomap PCI device\n"); |
3155 | return; | 3152 | return; |
3156 | } | 3153 | } |
3157 | 3154 | ||
3158 | /* Check if any interrupt line is still enabled */ | 3155 | /* Check if any interrupt line is still enabled */ |
3159 | if (readl(regs + I915_DEIER_REG) != 0) { | 3156 | if (readl(regs + I915_DEIER_REG) != 0) { |
3160 | dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; disabling\n"); | 3157 | pci_warn(dev, "BIOS left Intel GPU interrupts enabled; disabling\n"); |
3161 | 3158 | ||
3162 | writel(0, regs + I915_DEIER_REG); | 3159 | writel(0, regs + I915_DEIER_REG); |
3163 | } | 3160 | } |
@@ -3318,13 +3315,13 @@ static void mellanox_check_broken_intx_masking(struct pci_dev *pdev) | |||
3318 | 3315 | ||
3319 | /* For ConnectX-4 and ConnectX-4LX, need to check FW support */ | 3316 | /* For ConnectX-4 and ConnectX-4LX, need to check FW support */ |
3320 | if (pci_enable_device_mem(pdev)) { | 3317 | if (pci_enable_device_mem(pdev)) { |
3321 | dev_warn(&pdev->dev, "Can't enable device memory\n"); | 3318 | pci_warn(pdev, "Can't enable device memory\n"); |
3322 | return; | 3319 | return; |
3323 | } | 3320 | } |
3324 | 3321 | ||
3325 | fw_ver = ioremap(pci_resource_start(pdev, 0), 4); | 3322 | fw_ver = ioremap(pci_resource_start(pdev, 0), 4); |
3326 | if (!fw_ver) { | 3323 | if (!fw_ver) { |
3327 | dev_warn(&pdev->dev, "Can't map ConnectX-4 initialization segment\n"); | 3324 | pci_warn(pdev, "Can't map ConnectX-4 initialization segment\n"); |
3328 | goto out; | 3325 | goto out; |
3329 | } | 3326 | } |
3330 | 3327 | ||
@@ -3336,7 +3333,7 @@ static void mellanox_check_broken_intx_masking(struct pci_dev *pdev) | |||
3336 | fw_subminor = fw_sub_min & 0xffff; | 3333 | fw_subminor = fw_sub_min & 0xffff; |
3337 | if (fw_minor > CONNECTX_4_CURR_MAX_MINOR || | 3334 | if (fw_minor > CONNECTX_4_CURR_MAX_MINOR || |
3338 | fw_minor < CONNECTX_4_INTX_SUPPORT_MINOR) { | 3335 | fw_minor < CONNECTX_4_INTX_SUPPORT_MINOR) { |
3339 | dev_warn(&pdev->dev, "ConnectX-4: FW %u.%u.%u doesn't support INTx masking, disabling. Please upgrade FW to %d.14.1100 and up for INTx support\n", | 3336 | pci_warn(pdev, "ConnectX-4: FW %u.%u.%u doesn't support INTx masking, disabling. Please upgrade FW to %d.14.1100 and up for INTx support\n", |
3340 | fw_major, fw_minor, fw_subminor, pdev->device == | 3337 | fw_major, fw_minor, fw_subminor, pdev->device == |
3341 | PCI_DEVICE_ID_MELLANOX_CONNECTX4 ? 12 : 14); | 3338 | PCI_DEVICE_ID_MELLANOX_CONNECTX4 ? 12 : 14); |
3342 | pdev->broken_intx_masking = 1; | 3339 | pdev->broken_intx_masking = 1; |
@@ -3474,7 +3471,7 @@ static void quirk_apple_poweroff_thunderbolt(struct pci_dev *dev) | |||
3474 | || ACPI_FAILURE(acpi_get_handle(bridge, "DSB0.NHI0.SXFP", &SXFP)) | 3471 | || ACPI_FAILURE(acpi_get_handle(bridge, "DSB0.NHI0.SXFP", &SXFP)) |
3475 | || ACPI_FAILURE(acpi_get_handle(bridge, "DSB0.NHI0.SXLV", &SXLV))) | 3472 | || ACPI_FAILURE(acpi_get_handle(bridge, "DSB0.NHI0.SXLV", &SXLV))) |
3476 | return; | 3473 | return; |
3477 | dev_info(&dev->dev, "quirk: cutting power to thunderbolt controller...\n"); | 3474 | pci_info(dev, "quirk: cutting power to thunderbolt controller...\n"); |
3478 | 3475 | ||
3479 | /* magic sequence */ | 3476 | /* magic sequence */ |
3480 | acpi_execute_simple_method(SXIO, NULL, 1); | 3477 | acpi_execute_simple_method(SXIO, NULL, 1); |
@@ -3525,7 +3522,7 @@ static void quirk_apple_wait_for_thunderbolt(struct pci_dev *dev) | |||
3525 | nhi->device != PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI) | 3522 | nhi->device != PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI) |
3526 | || nhi->class != PCI_CLASS_SYSTEM_OTHER << 8) | 3523 | || nhi->class != PCI_CLASS_SYSTEM_OTHER << 8) |
3527 | goto out; | 3524 | goto out; |
3528 | dev_info(&dev->dev, "quirk: waiting for thunderbolt to reestablish PCI tunnels...\n"); | 3525 | pci_info(dev, "quirk: waiting for thunderbolt to reestablish PCI tunnels...\n"); |
3529 | device_pm_wait_for_dev(&dev->dev, &nhi->dev); | 3526 | device_pm_wait_for_dev(&dev->dev, &nhi->dev); |
3530 | out: | 3527 | out: |
3531 | pci_dev_put(nhi); | 3528 | pci_dev_put(nhi); |
@@ -3741,7 +3738,7 @@ static int reset_ivb_igd(struct pci_dev *dev, int probe) | |||
3741 | goto reset_complete; | 3738 | goto reset_complete; |
3742 | msleep(10); | 3739 | msleep(10); |
3743 | } while (time_before(jiffies, timeout)); | 3740 | } while (time_before(jiffies, timeout)); |
3744 | dev_warn(&dev->dev, "timeout during reset\n"); | 3741 | pci_warn(dev, "timeout during reset\n"); |
3745 | 3742 | ||
3746 | reset_complete: | 3743 | reset_complete: |
3747 | iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE); | 3744 | iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE); |
@@ -4013,7 +4010,7 @@ static void quirk_tw686x_class(struct pci_dev *pdev) | |||
4013 | 4010 | ||
4014 | /* Use "Multimedia controller" class */ | 4011 | /* Use "Multimedia controller" class */ |
4015 | pdev->class = (PCI_CLASS_MULTIMEDIA_OTHER << 8) | 0x01; | 4012 | pdev->class = (PCI_CLASS_MULTIMEDIA_OTHER << 8) | 0x01; |
4016 | dev_info(&pdev->dev, "TW686x PCI class overridden (%#08x -> %#08x)\n", | 4013 | pci_info(pdev, "TW686x PCI class overridden (%#08x -> %#08x)\n", |
4017 | class, pdev->class); | 4014 | class, pdev->class); |
4018 | } | 4015 | } |
4019 | DECLARE_PCI_FIXUP_CLASS_EARLY(0x1797, 0x6864, PCI_CLASS_NOT_DEFINED, 8, | 4016 | DECLARE_PCI_FIXUP_CLASS_EARLY(0x1797, 0x6864, PCI_CLASS_NOT_DEFINED, 8, |
@@ -4033,7 +4030,7 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(0x1797, 0x6869, PCI_CLASS_NOT_DEFINED, 8, | |||
4033 | static void quirk_relaxedordering_disable(struct pci_dev *dev) | 4030 | static void quirk_relaxedordering_disable(struct pci_dev *dev) |
4034 | { | 4031 | { |
4035 | dev->dev_flags |= PCI_DEV_FLAGS_NO_RELAXED_ORDERING; | 4032 | dev->dev_flags |= PCI_DEV_FLAGS_NO_RELAXED_ORDERING; |
4036 | dev_info(&dev->dev, "Disable Relaxed Ordering Attributes to avoid PCIe Completion erratum\n"); | 4033 | pci_info(dev, "Disable Relaxed Ordering Attributes to avoid PCIe Completion erratum\n"); |
4037 | } | 4034 | } |
4038 | 4035 | ||
4039 | /* | 4036 | /* |
@@ -4142,11 +4139,11 @@ static void quirk_disable_root_port_attributes(struct pci_dev *pdev) | |||
4142 | struct pci_dev *root_port = pci_find_pcie_root_port(pdev); | 4139 | struct pci_dev *root_port = pci_find_pcie_root_port(pdev); |
4143 | 4140 | ||
4144 | if (!root_port) { | 4141 | if (!root_port) { |
4145 | dev_warn(&pdev->dev, "PCIe Completion erratum may cause device errors\n"); | 4142 | pci_warn(pdev, "PCIe Completion erratum may cause device errors\n"); |
4146 | return; | 4143 | return; |
4147 | } | 4144 | } |
4148 | 4145 | ||
4149 | dev_info(&root_port->dev, "Disabling No Snoop/Relaxed Ordering Attributes to avoid PCIe Completion erratum in %s\n", | 4146 | pci_info(root_port, "Disabling No Snoop/Relaxed Ordering Attributes to avoid PCIe Completion erratum in %s\n", |
4150 | dev_name(&pdev->dev)); | 4147 | dev_name(&pdev->dev)); |
4151 | pcie_capability_clear_and_set_word(root_port, PCI_EXP_DEVCTL, | 4148 | pcie_capability_clear_and_set_word(root_port, PCI_EXP_DEVCTL, |
4152 | PCI_EXP_DEVCTL_RELAX_EN | | 4149 | PCI_EXP_DEVCTL_RELAX_EN | |
@@ -4340,7 +4337,7 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags) | |||
4340 | u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV); | 4337 | u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV); |
4341 | int ret = acs_flags & ~flags ? 0 : 1; | 4338 | int ret = acs_flags & ~flags ? 0 : 1; |
4342 | 4339 | ||
4343 | dev_info(&dev->dev, "Using QCOM ACS Quirk (%d)\n", ret); | 4340 | pci_info(dev, "Using QCOM ACS Quirk (%d)\n", ret); |
4344 | 4341 | ||
4345 | return ret; | 4342 | return ret; |
4346 | } | 4343 | } |
@@ -4592,7 +4589,7 @@ static int pci_quirk_enable_intel_lpc_acs(struct pci_dev *dev) | |||
4592 | if (bspr != (INTEL_BSPR_REG_BPNPD | INTEL_BSPR_REG_BPPD)) { | 4589 | if (bspr != (INTEL_BSPR_REG_BPNPD | INTEL_BSPR_REG_BPPD)) { |
4593 | updcr = readl(rcba_mem + INTEL_UPDCR_REG); | 4590 | updcr = readl(rcba_mem + INTEL_UPDCR_REG); |
4594 | if (updcr & INTEL_UPDCR_REG_MASK) { | 4591 | if (updcr & INTEL_UPDCR_REG_MASK) { |
4595 | dev_info(&dev->dev, "Disabling UPDCR peer decodes\n"); | 4592 | pci_info(dev, "Disabling UPDCR peer decodes\n"); |
4596 | updcr &= ~INTEL_UPDCR_REG_MASK; | 4593 | updcr &= ~INTEL_UPDCR_REG_MASK; |
4597 | writel(updcr, rcba_mem + INTEL_UPDCR_REG); | 4594 | writel(updcr, rcba_mem + INTEL_UPDCR_REG); |
4598 | } | 4595 | } |
@@ -4619,7 +4616,7 @@ static void pci_quirk_enable_intel_rp_mpc_acs(struct pci_dev *dev) | |||
4619 | */ | 4616 | */ |
4620 | pci_read_config_dword(dev, INTEL_MPC_REG, &mpc); | 4617 | pci_read_config_dword(dev, INTEL_MPC_REG, &mpc); |
4621 | if (!(mpc & INTEL_MPC_REG_IRBNCE)) { | 4618 | if (!(mpc & INTEL_MPC_REG_IRBNCE)) { |
4622 | dev_info(&dev->dev, "Enabling MPC IRBNCE\n"); | 4619 | pci_info(dev, "Enabling MPC IRBNCE\n"); |
4623 | mpc |= INTEL_MPC_REG_IRBNCE; | 4620 | mpc |= INTEL_MPC_REG_IRBNCE; |
4624 | pci_write_config_word(dev, INTEL_MPC_REG, mpc); | 4621 | pci_write_config_word(dev, INTEL_MPC_REG, mpc); |
4625 | } | 4622 | } |
@@ -4631,7 +4628,7 @@ static int pci_quirk_enable_intel_pch_acs(struct pci_dev *dev) | |||
4631 | return -ENOTTY; | 4628 | return -ENOTTY; |
4632 | 4629 | ||
4633 | if (pci_quirk_enable_intel_lpc_acs(dev)) { | 4630 | if (pci_quirk_enable_intel_lpc_acs(dev)) { |
4634 | dev_warn(&dev->dev, "Failed to enable Intel PCH ACS quirk\n"); | 4631 | pci_warn(dev, "Failed to enable Intel PCH ACS quirk\n"); |
4635 | return 0; | 4632 | return 0; |
4636 | } | 4633 | } |
4637 | 4634 | ||
@@ -4639,7 +4636,7 @@ static int pci_quirk_enable_intel_pch_acs(struct pci_dev *dev) | |||
4639 | 4636 | ||
4640 | dev->dev_flags |= PCI_DEV_FLAGS_ACS_ENABLED_QUIRK; | 4637 | dev->dev_flags |= PCI_DEV_FLAGS_ACS_ENABLED_QUIRK; |
4641 | 4638 | ||
4642 | dev_info(&dev->dev, "Intel PCH root port ACS workaround enabled\n"); | 4639 | pci_info(dev, "Intel PCH root port ACS workaround enabled\n"); |
4643 | 4640 | ||
4644 | return 0; | 4641 | return 0; |
4645 | } | 4642 | } |
@@ -4666,7 +4663,7 @@ static int pci_quirk_enable_intel_spt_pch_acs(struct pci_dev *dev) | |||
4666 | 4663 | ||
4667 | pci_write_config_dword(dev, pos + INTEL_SPT_ACS_CTRL, ctrl); | 4664 | pci_write_config_dword(dev, pos + INTEL_SPT_ACS_CTRL, ctrl); |
4668 | 4665 | ||
4669 | dev_info(&dev->dev, "Intel SPT PCH root port ACS workaround enabled\n"); | 4666 | pci_info(dev, "Intel SPT PCH root port ACS workaround enabled\n"); |
4670 | 4667 | ||
4671 | return 0; | 4668 | return 0; |
4672 | } | 4669 | } |
@@ -4801,7 +4798,7 @@ static void quirk_no_ext_tags(struct pci_dev *pdev) | |||
4801 | return; | 4798 | return; |
4802 | 4799 | ||
4803 | bridge->no_ext_tags = 1; | 4800 | bridge->no_ext_tags = 1; |
4804 | dev_info(&pdev->dev, "disabling Extended Tags (this device can't handle them)\n"); | 4801 | pci_info(pdev, "disabling Extended Tags (this device can't handle them)\n"); |
4805 | 4802 | ||
4806 | pci_walk_bus(bridge->bus, pci_configure_extended_tags, NULL); | 4803 | pci_walk_bus(bridge->bus, pci_configure_extended_tags, NULL); |
4807 | } | 4804 | } |
@@ -4816,7 +4813,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0144, quirk_no_ext_tags); | |||
4816 | */ | 4813 | */ |
4817 | static void quirk_no_ats(struct pci_dev *pdev) | 4814 | static void quirk_no_ats(struct pci_dev *pdev) |
4818 | { | 4815 | { |
4819 | dev_info(&pdev->dev, "disabling ATS (broken on this device)\n"); | 4816 | pci_info(pdev, "disabling ATS (broken on this device)\n"); |
4820 | pdev->ats_cap = 0; | 4817 | pdev->ats_cap = 0; |
4821 | } | 4818 | } |
4822 | 4819 | ||
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index 1f5e6af96c83..61f9e8a5ea8b 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c | |||
@@ -92,14 +92,14 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) | |||
92 | void __iomem *pds; | 92 | void __iomem *pds; |
93 | /* Standard PCI ROMs start out with these bytes 55 AA */ | 93 | /* Standard PCI ROMs start out with these bytes 55 AA */ |
94 | if (readw(image) != 0xAA55) { | 94 | if (readw(image) != 0xAA55) { |
95 | dev_err(&pdev->dev, "Invalid PCI ROM header signature: expecting 0xaa55, got %#06x\n", | 95 | pci_err(pdev, "Invalid PCI ROM header signature: expecting 0xaa55, got %#06x\n", |
96 | readw(image)); | 96 | readw(image)); |
97 | break; | 97 | break; |
98 | } | 98 | } |
99 | /* get the PCI data structure and check its "PCIR" signature */ | 99 | /* get the PCI data structure and check its "PCIR" signature */ |
100 | pds = image + readw(image + 24); | 100 | pds = image + readw(image + 24); |
101 | if (readl(pds) != 0x52494350) { | 101 | if (readl(pds) != 0x52494350) { |
102 | dev_err(&pdev->dev, "Invalid PCI ROM data signature: expecting 0x52494350, got %#010x\n", | 102 | pci_err(pdev, "Invalid PCI ROM data signature: expecting 0x52494350, got %#010x\n", |
103 | readl(pds)); | 103 | readl(pds)); |
104 | break; | 104 | break; |
105 | } | 105 | } |
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index b1ad466199ad..b56bfdc18b46 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c | |||
@@ -67,10 +67,8 @@ static int add_to_list(struct list_head *head, | |||
67 | struct pci_dev_resource *tmp; | 67 | struct pci_dev_resource *tmp; |
68 | 68 | ||
69 | tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); | 69 | tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); |
70 | if (!tmp) { | 70 | if (!tmp) |
71 | pr_warn("add_to_list: kmalloc() failed!\n"); | ||
72 | return -ENOMEM; | 71 | return -ENOMEM; |
73 | } | ||
74 | 72 | ||
75 | tmp->res = res; | 73 | tmp->res = res; |
76 | tmp->dev = dev; | 74 | tmp->dev = dev; |
@@ -152,7 +150,7 @@ static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head) | |||
152 | 150 | ||
153 | r_align = pci_resource_alignment(dev, r); | 151 | r_align = pci_resource_alignment(dev, r); |
154 | if (!r_align) { | 152 | if (!r_align) { |
155 | dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", | 153 | pci_warn(dev, "BAR %d: %pR has bogus alignment\n", |
156 | i, r); | 154 | i, r); |
157 | continue; | 155 | continue; |
158 | } | 156 | } |
@@ -260,7 +258,7 @@ static void reassign_resources_sorted(struct list_head *realloc_head, | |||
260 | (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN); | 258 | (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN); |
261 | if (pci_reassign_resource(add_res->dev, idx, | 259 | if (pci_reassign_resource(add_res->dev, idx, |
262 | add_size, align)) | 260 | add_size, align)) |
263 | dev_printk(KERN_DEBUG, &add_res->dev->dev, | 261 | pci_printk(KERN_DEBUG, add_res->dev, |
264 | "failed to add %llx res[%d]=%pR\n", | 262 | "failed to add %llx res[%d]=%pR\n", |
265 | (unsigned long long)add_size, | 263 | (unsigned long long)add_size, |
266 | idx, res); | 264 | idx, res); |
@@ -519,7 +517,7 @@ void pci_setup_cardbus(struct pci_bus *bus) | |||
519 | struct resource *res; | 517 | struct resource *res; |
520 | struct pci_bus_region region; | 518 | struct pci_bus_region region; |
521 | 519 | ||
522 | dev_info(&bridge->dev, "CardBus bridge to %pR\n", | 520 | pci_info(bridge, "CardBus bridge to %pR\n", |
523 | &bus->busn_res); | 521 | &bus->busn_res); |
524 | 522 | ||
525 | res = bus->resource[0]; | 523 | res = bus->resource[0]; |
@@ -529,7 +527,7 @@ void pci_setup_cardbus(struct pci_bus *bus) | |||
529 | * The IO resource is allocated a range twice as large as it | 527 | * The IO resource is allocated a range twice as large as it |
530 | * would normally need. This allows us to set both IO regs. | 528 | * would normally need. This allows us to set both IO regs. |
531 | */ | 529 | */ |
532 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 530 | pci_info(bridge, " bridge window %pR\n", res); |
533 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, | 531 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, |
534 | region.start); | 532 | region.start); |
535 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, | 533 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, |
@@ -539,7 +537,7 @@ void pci_setup_cardbus(struct pci_bus *bus) | |||
539 | res = bus->resource[1]; | 537 | res = bus->resource[1]; |
540 | pcibios_resource_to_bus(bridge->bus, ®ion, res); | 538 | pcibios_resource_to_bus(bridge->bus, ®ion, res); |
541 | if (res->flags & IORESOURCE_IO) { | 539 | if (res->flags & IORESOURCE_IO) { |
542 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 540 | pci_info(bridge, " bridge window %pR\n", res); |
543 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, | 541 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, |
544 | region.start); | 542 | region.start); |
545 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, | 543 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, |
@@ -549,7 +547,7 @@ void pci_setup_cardbus(struct pci_bus *bus) | |||
549 | res = bus->resource[2]; | 547 | res = bus->resource[2]; |
550 | pcibios_resource_to_bus(bridge->bus, ®ion, res); | 548 | pcibios_resource_to_bus(bridge->bus, ®ion, res); |
551 | if (res->flags & IORESOURCE_MEM) { | 549 | if (res->flags & IORESOURCE_MEM) { |
552 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 550 | pci_info(bridge, " bridge window %pR\n", res); |
553 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, | 551 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, |
554 | region.start); | 552 | region.start); |
555 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, | 553 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, |
@@ -559,7 +557,7 @@ void pci_setup_cardbus(struct pci_bus *bus) | |||
559 | res = bus->resource[3]; | 557 | res = bus->resource[3]; |
560 | pcibios_resource_to_bus(bridge->bus, ®ion, res); | 558 | pcibios_resource_to_bus(bridge->bus, ®ion, res); |
561 | if (res->flags & IORESOURCE_MEM) { | 559 | if (res->flags & IORESOURCE_MEM) { |
562 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 560 | pci_info(bridge, " bridge window %pR\n", res); |
563 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, | 561 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, |
564 | region.start); | 562 | region.start); |
565 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, | 563 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, |
@@ -602,7 +600,7 @@ static void pci_setup_bridge_io(struct pci_dev *bridge) | |||
602 | l = ((u16) io_limit_lo << 8) | io_base_lo; | 600 | l = ((u16) io_limit_lo << 8) | io_base_lo; |
603 | /* Set up upper 16 bits of I/O base/limit. */ | 601 | /* Set up upper 16 bits of I/O base/limit. */ |
604 | io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); | 602 | io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); |
605 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 603 | pci_info(bridge, " bridge window %pR\n", res); |
606 | } else { | 604 | } else { |
607 | /* Clear upper 16 bits of I/O base/limit. */ | 605 | /* Clear upper 16 bits of I/O base/limit. */ |
608 | io_upper16 = 0; | 606 | io_upper16 = 0; |
@@ -628,7 +626,7 @@ static void pci_setup_bridge_mmio(struct pci_dev *bridge) | |||
628 | if (res->flags & IORESOURCE_MEM) { | 626 | if (res->flags & IORESOURCE_MEM) { |
629 | l = (region.start >> 16) & 0xfff0; | 627 | l = (region.start >> 16) & 0xfff0; |
630 | l |= region.end & 0xfff00000; | 628 | l |= region.end & 0xfff00000; |
631 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 629 | pci_info(bridge, " bridge window %pR\n", res); |
632 | } else { | 630 | } else { |
633 | l = 0x0000fff0; | 631 | l = 0x0000fff0; |
634 | } | 632 | } |
@@ -657,7 +655,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge) | |||
657 | bu = upper_32_bits(region.start); | 655 | bu = upper_32_bits(region.start); |
658 | lu = upper_32_bits(region.end); | 656 | lu = upper_32_bits(region.end); |
659 | } | 657 | } |
660 | dev_info(&bridge->dev, " bridge window %pR\n", res); | 658 | pci_info(bridge, " bridge window %pR\n", res); |
661 | } else { | 659 | } else { |
662 | l = 0x0000fff0; | 660 | l = 0x0000fff0; |
663 | } | 661 | } |
@@ -672,7 +670,7 @@ static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type) | |||
672 | { | 670 | { |
673 | struct pci_dev *bridge = bus->self; | 671 | struct pci_dev *bridge = bus->self; |
674 | 672 | ||
675 | dev_info(&bridge->dev, "PCI bridge to %pR\n", | 673 | pci_info(bridge, "PCI bridge to %pR\n", |
676 | &bus->busn_res); | 674 | &bus->busn_res); |
677 | 675 | ||
678 | if (type & IORESOURCE_IO) | 676 | if (type & IORESOURCE_IO) |
@@ -944,7 +942,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, | |||
944 | resource_size(b_res), min_align); | 942 | resource_size(b_res), min_align); |
945 | if (!size0 && !size1) { | 943 | if (!size0 && !size1) { |
946 | if (b_res->start || b_res->end) | 944 | if (b_res->start || b_res->end) |
947 | dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n", | 945 | pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", |
948 | b_res, &bus->busn_res); | 946 | b_res, &bus->busn_res); |
949 | b_res->flags = 0; | 947 | b_res->flags = 0; |
950 | return; | 948 | return; |
@@ -956,7 +954,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, | |||
956 | if (size1 > size0 && realloc_head) { | 954 | if (size1 > size0 && realloc_head) { |
957 | add_to_list(realloc_head, bus->self, b_res, size1-size0, | 955 | add_to_list(realloc_head, bus->self, b_res, size1-size0, |
958 | min_align); | 956 | min_align); |
959 | dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx\n", | 957 | pci_printk(KERN_DEBUG, bus->self, "bridge window %pR to %pR add_size %llx\n", |
960 | b_res, &bus->busn_res, | 958 | b_res, &bus->busn_res, |
961 | (unsigned long long)size1-size0); | 959 | (unsigned long long)size1-size0); |
962 | } | 960 | } |
@@ -1061,7 +1059,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, | |||
1061 | if (order < 0) | 1059 | if (order < 0) |
1062 | order = 0; | 1060 | order = 0; |
1063 | if (order >= ARRAY_SIZE(aligns)) { | 1061 | if (order >= ARRAY_SIZE(aligns)) { |
1064 | dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n", | 1062 | pci_warn(dev, "disabling BAR %d: %pR (bad alignment %#llx)\n", |
1065 | i, r, (unsigned long long) align); | 1063 | i, r, (unsigned long long) align); |
1066 | r->flags = 0; | 1064 | r->flags = 0; |
1067 | continue; | 1065 | continue; |
@@ -1093,7 +1091,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, | |||
1093 | resource_size(b_res), add_align); | 1091 | resource_size(b_res), add_align); |
1094 | if (!size0 && !size1) { | 1092 | if (!size0 && !size1) { |
1095 | if (b_res->start || b_res->end) | 1093 | if (b_res->start || b_res->end) |
1096 | dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n", | 1094 | pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", |
1097 | b_res, &bus->busn_res); | 1095 | b_res, &bus->busn_res); |
1098 | b_res->flags = 0; | 1096 | b_res->flags = 0; |
1099 | return 0; | 1097 | return 0; |
@@ -1103,7 +1101,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, | |||
1103 | b_res->flags |= IORESOURCE_STARTALIGN; | 1101 | b_res->flags |= IORESOURCE_STARTALIGN; |
1104 | if (size1 > size0 && realloc_head) { | 1102 | if (size1 > size0 && realloc_head) { |
1105 | add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align); | 1103 | add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align); |
1106 | dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window %pR to %pR add_size %llx add_align %llx\n", | 1104 | pci_printk(KERN_DEBUG, bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n", |
1107 | b_res, &bus->busn_res, | 1105 | b_res, &bus->busn_res, |
1108 | (unsigned long long) (size1 - size0), | 1106 | (unsigned long long) (size1 - size0), |
1109 | (unsigned long long) add_align); | 1107 | (unsigned long long) add_align); |
@@ -1407,7 +1405,7 @@ void __pci_bus_assign_resources(const struct pci_bus *bus, | |||
1407 | break; | 1405 | break; |
1408 | 1406 | ||
1409 | default: | 1407 | default: |
1410 | dev_info(&dev->dev, "not setting up bridge for bus %04x:%02x\n", | 1408 | pci_info(dev, "not setting up bridge for bus %04x:%02x\n", |
1411 | pci_domain_nr(b), b->number); | 1409 | pci_domain_nr(b), b->number); |
1412 | break; | 1410 | break; |
1413 | } | 1411 | } |
@@ -1513,7 +1511,7 @@ static void __pci_bridge_assign_resources(const struct pci_dev *bridge, | |||
1513 | break; | 1511 | break; |
1514 | 1512 | ||
1515 | default: | 1513 | default: |
1516 | dev_info(&bridge->dev, "not setting up bridge for bus %04x:%02x\n", | 1514 | pci_info(bridge, "not setting up bridge for bus %04x:%02x\n", |
1517 | pci_domain_nr(b), b->number); | 1515 | pci_domain_nr(b), b->number); |
1518 | break; | 1516 | break; |
1519 | } | 1517 | } |
@@ -1571,7 +1569,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus, | |||
1571 | release_child_resources(r); | 1569 | release_child_resources(r); |
1572 | if (!release_resource(r)) { | 1570 | if (!release_resource(r)) { |
1573 | type = old_flags = r->flags & PCI_RES_TYPE_MASK; | 1571 | type = old_flags = r->flags & PCI_RES_TYPE_MASK; |
1574 | dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n", | 1572 | pci_printk(KERN_DEBUG, dev, "resource %d %pR released\n", |
1575 | PCI_BRIDGE_RESOURCES + idx, r); | 1573 | PCI_BRIDGE_RESOURCES + idx, r); |
1576 | /* keep the old size */ | 1574 | /* keep the old size */ |
1577 | r->end = resource_size(r) - 1; | 1575 | r->end = resource_size(r) - 1; |
@@ -1874,7 +1872,7 @@ static void extend_bridge_window(struct pci_dev *bridge, struct resource *res, | |||
1874 | return; | 1872 | return; |
1875 | 1873 | ||
1876 | dev_res->add_size = available - resource_size(res); | 1874 | dev_res->add_size = available - resource_size(res); |
1877 | dev_dbg(&bridge->dev, "bridge window %pR extended by %pa\n", res, | 1875 | pci_dbg(bridge, "bridge window %pR extended by %pa\n", res, |
1878 | &dev_res->add_size); | 1876 | &dev_res->add_size); |
1879 | } | 1877 | } |
1880 | 1878 | ||
@@ -2085,7 +2083,7 @@ again: | |||
2085 | enable_all: | 2083 | enable_all: |
2086 | retval = pci_reenable_device(bridge); | 2084 | retval = pci_reenable_device(bridge); |
2087 | if (retval) | 2085 | if (retval) |
2088 | dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval); | 2086 | pci_err(bridge, "Error reenabling bridge (%d)\n", retval); |
2089 | pci_set_master(bridge); | 2087 | pci_set_master(bridge); |
2090 | } | 2088 | } |
2091 | EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); | 2089 | EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); |
@@ -2119,7 +2117,7 @@ int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type) | |||
2119 | if (ret) | 2117 | if (ret) |
2120 | goto cleanup; | 2118 | goto cleanup; |
2121 | 2119 | ||
2122 | dev_info(&bridge->dev, "BAR %d: releasing %pR\n", | 2120 | pci_info(bridge, "BAR %d: releasing %pR\n", |
2123 | i, res); | 2121 | i, res); |
2124 | 2122 | ||
2125 | if (res->parent) | 2123 | if (res->parent) |
diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c index 86106c44ce94..774defe2f7e8 100644 --- a/drivers/pci/setup-irq.c +++ b/drivers/pci/setup-irq.c | |||
@@ -25,7 +25,7 @@ void pci_assign_irq(struct pci_dev *dev) | |||
25 | struct pci_host_bridge *hbrg = pci_find_host_bridge(dev->bus); | 25 | struct pci_host_bridge *hbrg = pci_find_host_bridge(dev->bus); |
26 | 26 | ||
27 | if (!(hbrg->map_irq)) { | 27 | if (!(hbrg->map_irq)) { |
28 | dev_dbg(&dev->dev, "runtime IRQ mapping not provided by arch\n"); | 28 | pci_dbg(dev, "runtime IRQ mapping not provided by arch\n"); |
29 | return; | 29 | return; |
30 | } | 30 | } |
31 | 31 | ||
@@ -55,7 +55,7 @@ void pci_assign_irq(struct pci_dev *dev) | |||
55 | } | 55 | } |
56 | dev->irq = irq; | 56 | dev->irq = irq; |
57 | 57 | ||
58 | dev_dbg(&dev->dev, "assign IRQ: got %d\n", dev->irq); | 58 | pci_dbg(dev, "assign IRQ: got %d\n", dev->irq); |
59 | 59 | ||
60 | /* Always tell the device, so the driver knows what is | 60 | /* Always tell the device, so the driver knows what is |
61 | the real IRQ to use; the device does not use it. */ | 61 | the real IRQ to use; the device does not use it. */ |
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index e815111f3f81..369d48d6c6f1 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c | |||
@@ -103,7 +103,7 @@ static void pci_std_update_resource(struct pci_dev *dev, int resno) | |||
103 | pci_read_config_dword(dev, reg, &check); | 103 | pci_read_config_dword(dev, reg, &check); |
104 | 104 | ||
105 | if ((new ^ check) & mask) { | 105 | if ((new ^ check) & mask) { |
106 | dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n", | 106 | pci_err(dev, "BAR %d: error updating (%#08x != %#08x)\n", |
107 | resno, new, check); | 107 | resno, new, check); |
108 | } | 108 | } |
109 | 109 | ||
@@ -112,7 +112,7 @@ static void pci_std_update_resource(struct pci_dev *dev, int resno) | |||
112 | pci_write_config_dword(dev, reg + 4, new); | 112 | pci_write_config_dword(dev, reg + 4, new); |
113 | pci_read_config_dword(dev, reg + 4, &check); | 113 | pci_read_config_dword(dev, reg + 4, &check); |
114 | if (check != new) { | 114 | if (check != new) { |
115 | dev_err(&dev->dev, "BAR %d: error updating (high %#08x != %#08x)\n", | 115 | pci_err(dev, "BAR %d: error updating (high %#08x != %#08x)\n", |
116 | resno, new, check); | 116 | resno, new, check); |
117 | } | 117 | } |
118 | } | 118 | } |
@@ -137,7 +137,7 @@ int pci_claim_resource(struct pci_dev *dev, int resource) | |||
137 | struct resource *root, *conflict; | 137 | struct resource *root, *conflict; |
138 | 138 | ||
139 | if (res->flags & IORESOURCE_UNSET) { | 139 | if (res->flags & IORESOURCE_UNSET) { |
140 | dev_info(&dev->dev, "can't claim BAR %d %pR: no address assigned\n", | 140 | pci_info(dev, "can't claim BAR %d %pR: no address assigned\n", |
141 | resource, res); | 141 | resource, res); |
142 | return -EINVAL; | 142 | return -EINVAL; |
143 | } | 143 | } |
@@ -152,7 +152,7 @@ int pci_claim_resource(struct pci_dev *dev, int resource) | |||
152 | 152 | ||
153 | root = pci_find_parent_resource(dev, res); | 153 | root = pci_find_parent_resource(dev, res); |
154 | if (!root) { | 154 | if (!root) { |
155 | dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n", | 155 | pci_info(dev, "can't claim BAR %d %pR: no compatible bridge window\n", |
156 | resource, res); | 156 | resource, res); |
157 | res->flags |= IORESOURCE_UNSET; | 157 | res->flags |= IORESOURCE_UNSET; |
158 | return -EINVAL; | 158 | return -EINVAL; |
@@ -160,7 +160,7 @@ int pci_claim_resource(struct pci_dev *dev, int resource) | |||
160 | 160 | ||
161 | conflict = request_resource_conflict(root, res); | 161 | conflict = request_resource_conflict(root, res); |
162 | if (conflict) { | 162 | if (conflict) { |
163 | dev_info(&dev->dev, "can't claim BAR %d %pR: address conflict with %s %pR\n", | 163 | pci_info(dev, "can't claim BAR %d %pR: address conflict with %s %pR\n", |
164 | resource, res, conflict->name, conflict); | 164 | resource, res, conflict->name, conflict); |
165 | res->flags |= IORESOURCE_UNSET; | 165 | res->flags |= IORESOURCE_UNSET; |
166 | return -EBUSY; | 166 | return -EBUSY; |
@@ -172,7 +172,7 @@ EXPORT_SYMBOL(pci_claim_resource); | |||
172 | 172 | ||
173 | void pci_disable_bridge_window(struct pci_dev *dev) | 173 | void pci_disable_bridge_window(struct pci_dev *dev) |
174 | { | 174 | { |
175 | dev_info(&dev->dev, "disabling bridge mem windows\n"); | 175 | pci_info(dev, "disabling bridge mem windows\n"); |
176 | 176 | ||
177 | /* MMIO Base/Limit */ | 177 | /* MMIO Base/Limit */ |
178 | pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0); | 178 | pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0); |
@@ -221,11 +221,11 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev, | |||
221 | root = &iomem_resource; | 221 | root = &iomem_resource; |
222 | } | 222 | } |
223 | 223 | ||
224 | dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n", | 224 | pci_info(dev, "BAR %d: trying firmware assignment %pR\n", |
225 | resno, res); | 225 | resno, res); |
226 | conflict = request_resource_conflict(root, res); | 226 | conflict = request_resource_conflict(root, res); |
227 | if (conflict) { | 227 | if (conflict) { |
228 | dev_info(&dev->dev, "BAR %d: %pR conflicts with %s %pR\n", | 228 | pci_info(dev, "BAR %d: %pR conflicts with %s %pR\n", |
229 | resno, res, conflict->name, conflict); | 229 | resno, res, conflict->name, conflict); |
230 | res->start = start; | 230 | res->start = start; |
231 | res->end = end; | 231 | res->end = end; |
@@ -324,7 +324,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno) | |||
324 | res->flags |= IORESOURCE_UNSET; | 324 | res->flags |= IORESOURCE_UNSET; |
325 | align = pci_resource_alignment(dev, res); | 325 | align = pci_resource_alignment(dev, res); |
326 | if (!align) { | 326 | if (!align) { |
327 | dev_info(&dev->dev, "BAR %d: can't assign %pR (bogus alignment)\n", | 327 | pci_info(dev, "BAR %d: can't assign %pR (bogus alignment)\n", |
328 | resno, res); | 328 | resno, res); |
329 | return -EINVAL; | 329 | return -EINVAL; |
330 | } | 330 | } |
@@ -338,19 +338,18 @@ int pci_assign_resource(struct pci_dev *dev, int resno) | |||
338 | * working, which is better than just leaving it disabled. | 338 | * working, which is better than just leaving it disabled. |
339 | */ | 339 | */ |
340 | if (ret < 0) { | 340 | if (ret < 0) { |
341 | dev_info(&dev->dev, "BAR %d: no space for %pR\n", resno, res); | 341 | pci_info(dev, "BAR %d: no space for %pR\n", resno, res); |
342 | ret = pci_revert_fw_address(res, dev, resno, size); | 342 | ret = pci_revert_fw_address(res, dev, resno, size); |
343 | } | 343 | } |
344 | 344 | ||
345 | if (ret < 0) { | 345 | if (ret < 0) { |
346 | dev_info(&dev->dev, "BAR %d: failed to assign %pR\n", resno, | 346 | pci_info(dev, "BAR %d: failed to assign %pR\n", resno, res); |
347 | res); | ||
348 | return ret; | 347 | return ret; |
349 | } | 348 | } |
350 | 349 | ||
351 | res->flags &= ~IORESOURCE_UNSET; | 350 | res->flags &= ~IORESOURCE_UNSET; |
352 | res->flags &= ~IORESOURCE_STARTALIGN; | 351 | res->flags &= ~IORESOURCE_STARTALIGN; |
353 | dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res); | 352 | pci_info(dev, "BAR %d: assigned %pR\n", resno, res); |
354 | if (resno < PCI_BRIDGE_RESOURCES) | 353 | if (resno < PCI_BRIDGE_RESOURCES) |
355 | pci_update_resource(dev, resno); | 354 | pci_update_resource(dev, resno); |
356 | 355 | ||
@@ -372,7 +371,7 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz | |||
372 | flags = res->flags; | 371 | flags = res->flags; |
373 | res->flags |= IORESOURCE_UNSET; | 372 | res->flags |= IORESOURCE_UNSET; |
374 | if (!res->parent) { | 373 | if (!res->parent) { |
375 | dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR\n", | 374 | pci_info(dev, "BAR %d: can't reassign an unassigned resource %pR\n", |
376 | resno, res); | 375 | resno, res); |
377 | return -EINVAL; | 376 | return -EINVAL; |
378 | } | 377 | } |
@@ -382,14 +381,14 @@ int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsiz | |||
382 | ret = _pci_assign_resource(dev, resno, new_size, min_align); | 381 | ret = _pci_assign_resource(dev, resno, new_size, min_align); |
383 | if (ret) { | 382 | if (ret) { |
384 | res->flags = flags; | 383 | res->flags = flags; |
385 | dev_info(&dev->dev, "BAR %d: %pR (failed to expand by %#llx)\n", | 384 | pci_info(dev, "BAR %d: %pR (failed to expand by %#llx)\n", |
386 | resno, res, (unsigned long long) addsize); | 385 | resno, res, (unsigned long long) addsize); |
387 | return ret; | 386 | return ret; |
388 | } | 387 | } |
389 | 388 | ||
390 | res->flags &= ~IORESOURCE_UNSET; | 389 | res->flags &= ~IORESOURCE_UNSET; |
391 | res->flags &= ~IORESOURCE_STARTALIGN; | 390 | res->flags &= ~IORESOURCE_STARTALIGN; |
392 | dev_info(&dev->dev, "BAR %d: reassigned %pR (expanded by %#llx)\n", | 391 | pci_info(dev, "BAR %d: reassigned %pR (expanded by %#llx)\n", |
393 | resno, res, (unsigned long long) addsize); | 392 | resno, res, (unsigned long long) addsize); |
394 | if (resno < PCI_BRIDGE_RESOURCES) | 393 | if (resno < PCI_BRIDGE_RESOURCES) |
395 | pci_update_resource(dev, resno); | 394 | pci_update_resource(dev, resno); |
@@ -401,7 +400,7 @@ void pci_release_resource(struct pci_dev *dev, int resno) | |||
401 | { | 400 | { |
402 | struct resource *res = dev->resource + resno; | 401 | struct resource *res = dev->resource + resno; |
403 | 402 | ||
404 | dev_info(&dev->dev, "BAR %d: releasing %pR\n", resno, res); | 403 | pci_info(dev, "BAR %d: releasing %pR\n", resno, res); |
405 | release_resource(res); | 404 | release_resource(res); |
406 | res->end = resource_size(res) - 1; | 405 | res->end = resource_size(res) - 1; |
407 | res->start = 0; | 406 | res->start = 0; |
@@ -477,13 +476,13 @@ int pci_enable_resources(struct pci_dev *dev, int mask) | |||
477 | continue; | 476 | continue; |
478 | 477 | ||
479 | if (r->flags & IORESOURCE_UNSET) { | 478 | if (r->flags & IORESOURCE_UNSET) { |
480 | dev_err(&dev->dev, "can't enable device: BAR %d %pR not assigned\n", | 479 | pci_err(dev, "can't enable device: BAR %d %pR not assigned\n", |
481 | i, r); | 480 | i, r); |
482 | return -EINVAL; | 481 | return -EINVAL; |
483 | } | 482 | } |
484 | 483 | ||
485 | if (!r->parent) { | 484 | if (!r->parent) { |
486 | dev_err(&dev->dev, "can't enable device: BAR %d %pR not claimed\n", | 485 | pci_err(dev, "can't enable device: BAR %d %pR not claimed\n", |
487 | i, r); | 486 | i, r); |
488 | return -EINVAL; | 487 | return -EINVAL; |
489 | } | 488 | } |
@@ -495,8 +494,7 @@ int pci_enable_resources(struct pci_dev *dev, int mask) | |||
495 | } | 494 | } |
496 | 495 | ||
497 | if (cmd != old_cmd) { | 496 | if (cmd != old_cmd) { |
498 | dev_info(&dev->dev, "enabling device (%04x -> %04x)\n", | 497 | pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd); |
499 | old_cmd, cmd); | ||
500 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 498 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
501 | } | 499 | } |
502 | return 0; | 500 | return 0; |
diff --git a/drivers/pci/vc.c b/drivers/pci/vc.c index 1fa3a3219c45..881b9861aed4 100644 --- a/drivers/pci/vc.c +++ b/drivers/pci/vc.c | |||
@@ -57,7 +57,7 @@ static void pci_vc_load_arb_table(struct pci_dev *dev, int pos) | |||
57 | PCI_VC_PORT_STATUS_TABLE)) | 57 | PCI_VC_PORT_STATUS_TABLE)) |
58 | return; | 58 | return; |
59 | 59 | ||
60 | dev_err(&dev->dev, "VC arbitration table failed to load\n"); | 60 | pci_err(dev, "VC arbitration table failed to load\n"); |
61 | } | 61 | } |
62 | 62 | ||
63 | /** | 63 | /** |
@@ -85,7 +85,7 @@ static void pci_vc_load_port_arb_table(struct pci_dev *dev, int pos, int res) | |||
85 | if (pci_wait_for_pending(dev, status_pos, PCI_VC_RES_STATUS_TABLE)) | 85 | if (pci_wait_for_pending(dev, status_pos, PCI_VC_RES_STATUS_TABLE)) |
86 | return; | 86 | return; |
87 | 87 | ||
88 | dev_err(&dev->dev, "VC%d port arbitration table failed to load\n", res); | 88 | pci_err(dev, "VC%d port arbitration table failed to load\n", res); |
89 | } | 89 | } |
90 | 90 | ||
91 | /** | 91 | /** |
@@ -161,11 +161,11 @@ enable: | |||
161 | pci_write_config_dword(dev, ctrl_pos, ctrl); | 161 | pci_write_config_dword(dev, ctrl_pos, ctrl); |
162 | 162 | ||
163 | if (!pci_wait_for_pending(dev, status_pos, PCI_VC_RES_STATUS_NEGO)) | 163 | if (!pci_wait_for_pending(dev, status_pos, PCI_VC_RES_STATUS_NEGO)) |
164 | dev_err(&dev->dev, "VC%d negotiation stuck pending\n", id); | 164 | pci_err(dev, "VC%d negotiation stuck pending\n", id); |
165 | 165 | ||
166 | if (link && !pci_wait_for_pending(link, status_pos2, | 166 | if (link && !pci_wait_for_pending(link, status_pos2, |
167 | PCI_VC_RES_STATUS_NEGO)) | 167 | PCI_VC_RES_STATUS_NEGO)) |
168 | dev_err(&link->dev, "VC%d negotiation stuck pending\n", id); | 168 | pci_err(link, "VC%d negotiation stuck pending\n", id); |
169 | } | 169 | } |
170 | 170 | ||
171 | /** | 171 | /** |
@@ -195,8 +195,7 @@ static int pci_vc_do_save_buffer(struct pci_dev *dev, int pos, | |||
195 | /* Sanity check buffer size for save/restore */ | 195 | /* Sanity check buffer size for save/restore */ |
196 | if (buf && save_state->cap.size != | 196 | if (buf && save_state->cap.size != |
197 | pci_vc_do_save_buffer(dev, pos, NULL, save)) { | 197 | pci_vc_do_save_buffer(dev, pos, NULL, save)) { |
198 | dev_err(&dev->dev, | 198 | pci_err(dev, "VC save buffer size does not match @0x%x\n", pos); |
199 | "VC save buffer size does not match @0x%x\n", pos); | ||
200 | return -ENOMEM; | 199 | return -ENOMEM; |
201 | } | 200 | } |
202 | 201 | ||
@@ -366,14 +365,14 @@ int pci_save_vc_state(struct pci_dev *dev) | |||
366 | 365 | ||
367 | save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id); | 366 | save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id); |
368 | if (!save_state) { | 367 | if (!save_state) { |
369 | dev_err(&dev->dev, "%s buffer not found in %s\n", | 368 | pci_err(dev, "%s buffer not found in %s\n", |
370 | vc_caps[i].name, __func__); | 369 | vc_caps[i].name, __func__); |
371 | return -ENOMEM; | 370 | return -ENOMEM; |
372 | } | 371 | } |
373 | 372 | ||
374 | ret = pci_vc_do_save_buffer(dev, pos, save_state, true); | 373 | ret = pci_vc_do_save_buffer(dev, pos, save_state, true); |
375 | if (ret) { | 374 | if (ret) { |
376 | dev_err(&dev->dev, "%s save unsuccessful %s\n", | 375 | pci_err(dev, "%s save unsuccessful %s\n", |
377 | vc_caps[i].name, __func__); | 376 | vc_caps[i].name, __func__); |
378 | return ret; | 377 | return ret; |
379 | } | 378 | } |
@@ -426,8 +425,7 @@ void pci_allocate_vc_save_buffers(struct pci_dev *dev) | |||
426 | 425 | ||
427 | len = pci_vc_do_save_buffer(dev, pos, NULL, false); | 426 | len = pci_vc_do_save_buffer(dev, pos, NULL, false); |
428 | if (pci_add_ext_cap_save_buffer(dev, vc_caps[i].id, len)) | 427 | if (pci_add_ext_cap_save_buffer(dev, vc_caps[i].id, len)) |
429 | dev_err(&dev->dev, | 428 | pci_err(dev, "unable to preallocate %s save buffer\n", |
430 | "unable to preallocate %s save buffer\n", | ||
431 | vc_caps[i].name); | 429 | vc_caps[i].name); |
432 | } | 430 | } |
433 | } | 431 | } |
diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c index 94b25b552254..69888196756d 100644 --- a/drivers/pci/xen-pcifront.c +++ b/drivers/pci/xen-pcifront.c | |||
@@ -261,8 +261,8 @@ static int pci_frontend_enable_msix(struct pci_dev *dev, | |||
261 | struct msi_desc *entry; | 261 | struct msi_desc *entry; |
262 | 262 | ||
263 | if (nvec > SH_INFO_MAX_VEC) { | 263 | if (nvec > SH_INFO_MAX_VEC) { |
264 | dev_err(&dev->dev, "too much vector for pci frontend: %x." | 264 | pci_err(dev, "too many vectors (0x%x) for PCI frontend:" |
265 | " Increase SH_INFO_MAX_VEC.\n", nvec); | 265 | " Increase SH_INFO_MAX_VEC\n", nvec); |
266 | return -EINVAL; | 266 | return -EINVAL; |
267 | } | 267 | } |
268 | 268 | ||
@@ -281,7 +281,7 @@ static int pci_frontend_enable_msix(struct pci_dev *dev, | |||
281 | /* we get the result */ | 281 | /* we get the result */ |
282 | for (i = 0; i < nvec; i++) { | 282 | for (i = 0; i < nvec; i++) { |
283 | if (op.msix_entries[i].vector <= 0) { | 283 | if (op.msix_entries[i].vector <= 0) { |
284 | dev_warn(&dev->dev, "MSI-X entry %d is invalid: %d!\n", | 284 | pci_warn(dev, "MSI-X entry %d is invalid: %d!\n", |
285 | i, op.msix_entries[i].vector); | 285 | i, op.msix_entries[i].vector); |
286 | err = -EINVAL; | 286 | err = -EINVAL; |
287 | vector[i] = -1; | 287 | vector[i] = -1; |
@@ -295,7 +295,7 @@ static int pci_frontend_enable_msix(struct pci_dev *dev, | |||
295 | err = op.value; | 295 | err = op.value; |
296 | } | 296 | } |
297 | } else { | 297 | } else { |
298 | dev_err(&dev->dev, "enable msix get err %x\n", err); | 298 | pci_err(dev, "enable msix get err %x\n", err); |
299 | } | 299 | } |
300 | return err; | 300 | return err; |
301 | } | 301 | } |
@@ -316,7 +316,7 @@ static void pci_frontend_disable_msix(struct pci_dev *dev) | |||
316 | 316 | ||
317 | /* What should do for error ? */ | 317 | /* What should do for error ? */ |
318 | if (err) | 318 | if (err) |
319 | dev_err(&dev->dev, "pci_disable_msix get err %x\n", err); | 319 | pci_err(dev, "pci_disable_msix get err %x\n", err); |
320 | } | 320 | } |
321 | 321 | ||
322 | static int pci_frontend_enable_msi(struct pci_dev *dev, int vector[]) | 322 | static int pci_frontend_enable_msi(struct pci_dev *dev, int vector[]) |
@@ -335,13 +335,13 @@ static int pci_frontend_enable_msi(struct pci_dev *dev, int vector[]) | |||
335 | if (likely(!err)) { | 335 | if (likely(!err)) { |
336 | vector[0] = op.value; | 336 | vector[0] = op.value; |
337 | if (op.value <= 0) { | 337 | if (op.value <= 0) { |
338 | dev_warn(&dev->dev, "MSI entry is invalid: %d!\n", | 338 | pci_warn(dev, "MSI entry is invalid: %d!\n", |
339 | op.value); | 339 | op.value); |
340 | err = -EINVAL; | 340 | err = -EINVAL; |
341 | vector[0] = -1; | 341 | vector[0] = -1; |
342 | } | 342 | } |
343 | } else { | 343 | } else { |
344 | dev_err(&dev->dev, "pci frontend enable msi failed for dev " | 344 | pci_err(dev, "pci frontend enable msi failed for dev " |
345 | "%x:%x\n", op.bus, op.devfn); | 345 | "%x:%x\n", op.bus, op.devfn); |
346 | err = -EINVAL; | 346 | err = -EINVAL; |
347 | } | 347 | } |
@@ -560,7 +560,7 @@ static void free_root_bus_devs(struct pci_bus *bus) | |||
560 | while (!list_empty(&bus->devices)) { | 560 | while (!list_empty(&bus->devices)) { |
561 | dev = container_of(bus->devices.next, struct pci_dev, | 561 | dev = container_of(bus->devices.next, struct pci_dev, |
562 | bus_list); | 562 | bus_list); |
563 | dev_dbg(&dev->dev, "removing device\n"); | 563 | pci_dbg(dev, "removing device\n"); |
564 | pci_stop_and_remove_bus_device(dev); | 564 | pci_stop_and_remove_bus_device(dev); |
565 | } | 565 | } |
566 | } | 566 | } |
@@ -614,8 +614,7 @@ static pci_ers_result_t pcifront_common_process(int cmd, | |||
614 | 614 | ||
615 | if (pdrv) { | 615 | if (pdrv) { |
616 | if (pdrv->err_handler && pdrv->err_handler->error_detected) { | 616 | if (pdrv->err_handler && pdrv->err_handler->error_detected) { |
617 | dev_dbg(&pcidev->dev, | 617 | pci_dbg(pcidev, "trying to call AER service\n"); |
618 | "trying to call AER service\n"); | ||
619 | if (pcidev) { | 618 | if (pcidev) { |
620 | flag = 1; | 619 | flag = 1; |
621 | switch (cmd) { | 620 | switch (cmd) { |