diff options
author | Shawn Lin <shawn.lin@rock-chips.com> | 2016-11-23 20:54:21 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-12-07 16:08:25 -0500 |
commit | 0722bdd2962a4a0f6d5e8973b0d274d147adacfb (patch) | |
tree | 806ba9f34000158a12745a9d27b2c8b73afcd3cd /drivers/pci | |
parent | 9e663d3f11ee34dfe92dcea98992151cae55e1ea (diff) |
PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
Move deassert of pm/aclk/pclk after phy_init() as we want to optimize the
logic of reset control and reuse rockchip_pcie_init_port() later which
should fully follow the cold boot procedure of ROM code.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/host/pcie-rockchip.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 89c219d935b5..460fd3cf4aa0 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c | |||
@@ -471,26 +471,6 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) | |||
471 | return err; | 471 | return err; |
472 | } | 472 | } |
473 | 473 | ||
474 | udelay(10); | ||
475 | |||
476 | err = reset_control_deassert(rockchip->pm_rst); | ||
477 | if (err) { | ||
478 | dev_err(dev, "deassert pm_rst err %d\n", err); | ||
479 | return err; | ||
480 | } | ||
481 | |||
482 | err = reset_control_deassert(rockchip->aclk_rst); | ||
483 | if (err) { | ||
484 | dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); | ||
485 | return err; | ||
486 | } | ||
487 | |||
488 | err = reset_control_deassert(rockchip->pclk_rst); | ||
489 | if (err) { | ||
490 | dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); | ||
491 | return err; | ||
492 | } | ||
493 | |||
494 | err = phy_init(rockchip->phy); | 474 | err = phy_init(rockchip->phy); |
495 | if (err < 0) { | 475 | if (err < 0) { |
496 | dev_err(dev, "fail to init phy, err %d\n", err); | 476 | dev_err(dev, "fail to init phy, err %d\n", err); |
@@ -521,6 +501,26 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) | |||
521 | return err; | 501 | return err; |
522 | } | 502 | } |
523 | 503 | ||
504 | udelay(10); | ||
505 | |||
506 | err = reset_control_deassert(rockchip->pm_rst); | ||
507 | if (err) { | ||
508 | dev_err(dev, "deassert pm_rst err %d\n", err); | ||
509 | return err; | ||
510 | } | ||
511 | |||
512 | err = reset_control_deassert(rockchip->aclk_rst); | ||
513 | if (err) { | ||
514 | dev_err(dev, "deassert aclk_rst err %d\n", err); | ||
515 | return err; | ||
516 | } | ||
517 | |||
518 | err = reset_control_deassert(rockchip->pclk_rst); | ||
519 | if (err) { | ||
520 | dev_err(dev, "deassert pclk_rst err %d\n", err); | ||
521 | return err; | ||
522 | } | ||
523 | |||
524 | if (rockchip->link_gen == 2) | 524 | if (rockchip->link_gen == 2) |
525 | rockchip_pcie_write(rockchip, PCIE_CLIENT_GEN_SEL_2, | 525 | rockchip_pcie_write(rockchip, PCIE_CLIENT_GEN_SEL_2, |
526 | PCIE_CLIENT_CONFIG); | 526 | PCIE_CLIENT_CONFIG); |