Merge branch 'pci/host-rockchip' into next

* pci/host-rockchip:
  PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
  PCI: rockchip: Split out rockchip_cfg_atu()
  PCI: rockchip: Clean up bit definitions for PCIE_RC_CONFIG_LCS
  PCI: rockchip: Correct the use of FTS mask
  PCI: rockchip: Remove the pointer to L1 substate cap
  PCI: rockchip: Specify the link capability
  PCI: rockchip: Fix negotiated lanes calculation
  PCI: rockchip: Add Kconfig COMPILE_TEST
  PCI: rockchip: Mark RC as common clock architecture
  PCI: rockchip: Provide captured slot power limit and scale
  PCI: rockchip: Add three new resets as required properties
  PCI: Don't attempt to claim shadow copies of ROM
  PCI: designware: Check for iATU unroll support after initializing host
  PCI: qcom: Fix pp->dev usage before assignment
  PCI: designware-plat: Update author email address
  PCI: layerscape: Fix drvdata usage before assignment
  PCI: designware-plat: Change maintainer to Jose Abreu

1 files changed, 8 insertions, 0 deletions

diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 045427336e11..4bc589ee78d0 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -141,6 +141,14 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
                 return -EINVAL;
         }
 
+        /*
+         * If we have a shadow copy in RAM, the PCI device doesn't respond
+         * to the shadow range, so we don't need to claim it, and upstream
+         * bridges don't need to route the range to the device.
+         */
+        if (res->flags & IORESOURCE_ROM_SHADOW)
+                return 0;
+
         root = pci_find_parent_resource(dev, res);
         if (!root) {
                 dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",