diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-05-08 22:03:25 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-05-08 22:03:25 -0400 |
commit | 857f8640147c9fb43f20e43cbca6452710e1ca5d (patch) | |
tree | 76a92068d703b8001ca790ffa096d435fa24ae81 /drivers/pci/proc.c | |
parent | 8f3207c7eab9d885cc64c778416537034a7d9c5b (diff) | |
parent | 3146c8f4de9b0858794a902f273aec13f168596e (diff) |
Merge tag 'pci-v4.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
- add framework for supporting PCIe devices in Endpoint mode (Kishon
Vijay Abraham I)
- use non-postable PCI config space mappings when possible (Lorenzo
Pieralisi)
- clean up and unify mmap of PCI BARs (David Woodhouse)
- export and unify Function Level Reset support (Christoph Hellwig)
- avoid FLR for Intel 82579 NICs (Sasha Neftin)
- add pci_request_irq() and pci_free_irq() helpers (Christoph Hellwig)
- short-circuit config access failures for disconnected devices (Keith
Busch)
- remove D3 sleep delay when possible (Adrian Hunter)
- freeze PME scan before suspending devices (Lukas Wunner)
- stop disabling MSI/MSI-X in pci_device_shutdown() (Prarit Bhargava)
- disable boot interrupt quirk for ASUS M2N-LR (Stefan Assmann)
- add arch-specific alignment control to improve device passthrough by
avoiding multiple BARs in a page (Yongji Xie)
- add sysfs sriov_drivers_autoprobe to control VF driver binding
(Bodong Wang)
- allow slots below PCI-to-PCIe "reverse bridges" (Bjorn Helgaas)
- fix crashes when unbinding host controllers that don't support
removal (Brian Norris)
- add driver for MicroSemi Switchtec management interface (Logan
Gunthorpe)
- add driver for Faraday Technology FTPCI100 host bridge (Linus
Walleij)
- add i.MX7D support (Andrey Smirnov)
- use generic MSI support for Aardvark (Thomas Petazzoni)
- make Rockchip driver modular (Brian Norris)
- advertise 128-byte Read Completion Boundary support for Rockchip
(Shawn Lin)
- advertise PCI_EXP_LNKSTA_SLC for Rockchip root port (Shawn Lin)
- convert atomic_t to refcount_t in HV driver (Elena Reshetova)
- add CPU IRQ affinity in HV driver (K. Y. Srinivasan)
- fix PCI bus removal in HV driver (Long Li)
- add support for ThunderX2 DMA alias topology (Jayachandran C)
- add ThunderX pass2.x 2nd node MCFG quirk (Tomasz Nowicki)
- add ITE 8893 bridge DMA alias quirk (Jarod Wilson)
- restrict Cavium ACS quirk only to CN81xx/CN83xx/CN88xx devices
(Manish Jaggi)
* tag 'pci-v4.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (146 commits)
PCI: Don't allow unbinding host controllers that aren't prepared
ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
MAINTAINERS: Add PCI Endpoint maintainer
Documentation: PCI: Add userguide for PCI endpoint test function
tools: PCI: Add sample test script to invoke pcitest
tools: PCI: Add a userspace tool to test PCI endpoint
Documentation: misc-devices: Add Documentation for pci-endpoint-test driver
misc: Add host side PCI driver for PCI test function device
PCI: Add device IDs for DRA74x and DRA72x
dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access
PCI: dwc: dra7xx: Workaround for errata id i870
dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode
PCI: dwc: dra7xx: Add EP mode support
PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled independently
dt-bindings: PCI: Add DT bindings for PCI designware EP mode
PCI: dwc: designware: Add EP mode support
Documentation: PCI: Add binding documentation for pci-test endpoint function
ixgbe: Use pcie_flr() instead of duplicating it
IB/hfi1: Use pcie_flr() instead of duplicating it
PCI: imx6: Fix spelling mistake: "contol" -> "control"
...
Diffstat (limited to 'drivers/pci/proc.c')
-rw-r--r-- | drivers/pci/proc.c | 41 |
1 files changed, 27 insertions, 14 deletions
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index f82710a8694d..098360d7ff81 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
@@ -202,6 +202,8 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, | |||
202 | 202 | ||
203 | #ifdef HAVE_PCI_MMAP | 203 | #ifdef HAVE_PCI_MMAP |
204 | case PCIIOC_MMAP_IS_IO: | 204 | case PCIIOC_MMAP_IS_IO: |
205 | if (!arch_can_pci_mmap_io()) | ||
206 | return -EINVAL; | ||
205 | fpriv->mmap_state = pci_mmap_io; | 207 | fpriv->mmap_state = pci_mmap_io; |
206 | break; | 208 | break; |
207 | 209 | ||
@@ -210,14 +212,15 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, | |||
210 | break; | 212 | break; |
211 | 213 | ||
212 | case PCIIOC_WRITE_COMBINE: | 214 | case PCIIOC_WRITE_COMBINE: |
213 | if (arg) | 215 | if (arch_can_pci_mmap_wc()) { |
214 | fpriv->write_combine = 1; | 216 | if (arg) |
215 | else | 217 | fpriv->write_combine = 1; |
216 | fpriv->write_combine = 0; | 218 | else |
217 | break; | 219 | fpriv->write_combine = 0; |
218 | 220 | break; | |
221 | } | ||
222 | /* If arch decided it can't, fall through... */ | ||
219 | #endif /* HAVE_PCI_MMAP */ | 223 | #endif /* HAVE_PCI_MMAP */ |
220 | |||
221 | default: | 224 | default: |
222 | ret = -EINVAL; | 225 | ret = -EINVAL; |
223 | break; | 226 | break; |
@@ -231,25 +234,35 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) | |||
231 | { | 234 | { |
232 | struct pci_dev *dev = PDE_DATA(file_inode(file)); | 235 | struct pci_dev *dev = PDE_DATA(file_inode(file)); |
233 | struct pci_filp_private *fpriv = file->private_data; | 236 | struct pci_filp_private *fpriv = file->private_data; |
234 | int i, ret, write_combine; | 237 | int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM; |
235 | 238 | ||
236 | if (!capable(CAP_SYS_RAWIO)) | 239 | if (!capable(CAP_SYS_RAWIO)) |
237 | return -EPERM; | 240 | return -EPERM; |
238 | 241 | ||
242 | if (fpriv->mmap_state == pci_mmap_io) { | ||
243 | if (!arch_can_pci_mmap_io()) | ||
244 | return -EINVAL; | ||
245 | res_bit = IORESOURCE_IO; | ||
246 | } | ||
247 | |||
239 | /* Make sure the caller is mapping a real resource for this device */ | 248 | /* Make sure the caller is mapping a real resource for this device */ |
240 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | 249 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { |
241 | if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) | 250 | if (dev->resource[i].flags & res_bit && |
251 | pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) | ||
242 | break; | 252 | break; |
243 | } | 253 | } |
244 | 254 | ||
245 | if (i >= PCI_ROM_RESOURCE) | 255 | if (i >= PCI_ROM_RESOURCE) |
246 | return -ENODEV; | 256 | return -ENODEV; |
247 | 257 | ||
248 | if (fpriv->mmap_state == pci_mmap_mem) | 258 | if (fpriv->mmap_state == pci_mmap_mem && |
249 | write_combine = fpriv->write_combine; | 259 | fpriv->write_combine) { |
250 | else | 260 | if (dev->resource[i].flags & IORESOURCE_PREFETCH) |
251 | write_combine = 0; | 261 | write_combine = 1; |
252 | ret = pci_mmap_page_range(dev, vma, | 262 | else |
263 | return -EINVAL; | ||
264 | } | ||
265 | ret = pci_mmap_page_range(dev, i, vma, | ||
253 | fpriv->mmap_state, write_combine); | 266 | fpriv->mmap_state, write_combine); |
254 | if (ret < 0) | 267 | if (ret < 0) |
255 | return ret; | 268 | return ret; |