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authorChristoph Hellwig <hch@lst.de>2016-07-12 05:20:14 -0400
committerBjorn Helgaas <bhelgaas@google.com>2016-07-21 16:04:24 -0400
commit5eb6d660193ccc471b415d6f31e17312a63de167 (patch)
tree904684139e077310120e0ef52732d15d691a5af8 /drivers/pci/msi.c
parent5e385a6ef31fbbf2acbda770aecc2bc2ff933d17 (diff)
PCI: Add pci_msix_desc_addr() helper
Add a pci_msix_desc_addr() helper to factor out the calculation of the base address for a given MSI-X vector. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alexander Gordeev <agordeev@redhat.com>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r--drivers/pci/msi.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index a080f4496fe2..0d94fbf95ba6 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -207,6 +207,12 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
207 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag); 207 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
208} 208}
209 209
210static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
211{
212 return desc->mask_base +
213 desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
214}
215
210/* 216/*
211 * This internal function does not flush PCI writes to the device. 217 * This internal function does not flush PCI writes to the device.
212 * All users must ensure that they read from the device before either 218 * All users must ensure that they read from the device before either
@@ -217,8 +223,6 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
217u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag) 223u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
218{ 224{
219 u32 mask_bits = desc->masked; 225 u32 mask_bits = desc->masked;
220 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
221 PCI_MSIX_ENTRY_VECTOR_CTRL;
222 226
223 if (pci_msi_ignore_mask) 227 if (pci_msi_ignore_mask)
224 return 0; 228 return 0;
@@ -226,7 +230,7 @@ u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
226 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; 230 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
227 if (flag) 231 if (flag)
228 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; 232 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
229 writel(mask_bits, desc->mask_base + offset); 233 writel(mask_bits, pci_msix_desc_addr(desc) + PCI_MSIX_ENTRY_VECTOR_CTRL);
230 234
231 return mask_bits; 235 return mask_bits;
232} 236}
@@ -284,8 +288,7 @@ void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
284 BUG_ON(dev->current_state != PCI_D0); 288 BUG_ON(dev->current_state != PCI_D0);
285 289
286 if (entry->msi_attrib.is_msix) { 290 if (entry->msi_attrib.is_msix) {
287 void __iomem *base = entry->mask_base + 291 void __iomem *base = pci_msix_desc_addr(entry);
288 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
289 292
290 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR); 293 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
291 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR); 294 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
@@ -315,9 +318,7 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
315 if (dev->current_state != PCI_D0) { 318 if (dev->current_state != PCI_D0) {
316 /* Don't touch the hardware now */ 319 /* Don't touch the hardware now */
317 } else if (entry->msi_attrib.is_msix) { 320 } else if (entry->msi_attrib.is_msix) {
318 void __iomem *base; 321 void __iomem *base = pci_msix_desc_addr(entry);
319 base = entry->mask_base +
320 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
321 322
322 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); 323 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
323 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); 324 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);