diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2016-01-20 12:48:25 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-01-20 12:48:25 -0500 |
commit | 9662e32c810ad3e6ce49832d5f585a54f8fbdbdb (patch) | |
tree | fd9fd3f8cd44e231b8dc71c2e360eb19963972d5 /drivers/pci/hotplug/ibmphp_hpc.c | |
parent | 904f664b585cc9f3dc134a8c0dd08e9bce6c10bc (diff) | |
parent | bd7900825a3db4c4916fafb400c1f669120039d2 (diff) |
Merge branch 'pci/trivial' into next
* pci/trivial:
PCI: shpchp: Constify hpc_ops structure
PCI: Use kobj_to_dev() instead of open-coding it
PCI: Use to_pci_dev() instead of open-coding it
PCI: Fix all whitespace issues
PCI/MSI: Fix typos in <linux/msi.h>
Diffstat (limited to 'drivers/pci/hotplug/ibmphp_hpc.c')
-rw-r--r-- | drivers/pci/hotplug/ibmphp_hpc.c | 370 |
1 files changed, 185 insertions, 185 deletions
diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c index e2608585abd3..a6b458e4ab46 100644 --- a/drivers/pci/hotplug/ibmphp_hpc.c +++ b/drivers/pci/hotplug/ibmphp_hpc.c | |||
@@ -40,7 +40,7 @@ | |||
40 | #include "ibmphp.h" | 40 | #include "ibmphp.h" |
41 | 41 | ||
42 | static int to_debug = 0; | 42 | static int to_debug = 0; |
43 | #define debug_polling(fmt, arg...) do { if (to_debug) debug (fmt, arg); } while (0) | 43 | #define debug_polling(fmt, arg...) do { if (to_debug) debug(fmt, arg); } while (0) |
44 | 44 | ||
45 | //---------------------------------------------------------------------------- | 45 | //---------------------------------------------------------------------------- |
46 | // timeout values | 46 | // timeout values |
@@ -110,16 +110,16 @@ static struct task_struct *ibmphp_poll_thread; | |||
110 | //---------------------------------------------------------------------------- | 110 | //---------------------------------------------------------------------------- |
111 | // local function prototypes | 111 | // local function prototypes |
112 | //---------------------------------------------------------------------------- | 112 | //---------------------------------------------------------------------------- |
113 | static u8 i2c_ctrl_read (struct controller *, void __iomem *, u8); | 113 | static u8 i2c_ctrl_read(struct controller *, void __iomem *, u8); |
114 | static u8 i2c_ctrl_write (struct controller *, void __iomem *, u8, u8); | 114 | static u8 i2c_ctrl_write(struct controller *, void __iomem *, u8, u8); |
115 | static u8 hpc_writecmdtoindex (u8, u8); | 115 | static u8 hpc_writecmdtoindex(u8, u8); |
116 | static u8 hpc_readcmdtoindex (u8, u8); | 116 | static u8 hpc_readcmdtoindex(u8, u8); |
117 | static void get_hpc_access (void); | 117 | static void get_hpc_access(void); |
118 | static void free_hpc_access (void); | 118 | static void free_hpc_access(void); |
119 | static int poll_hpc(void *data); | 119 | static int poll_hpc(void *data); |
120 | static int process_changeinstatus (struct slot *, struct slot *); | 120 | static int process_changeinstatus(struct slot *, struct slot *); |
121 | static int process_changeinlatch (u8, u8, struct controller *); | 121 | static int process_changeinlatch(u8, u8, struct controller *); |
122 | static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *); | 122 | static int hpc_wait_ctlr_notworking(int, struct controller *, void __iomem *, u8 *); |
123 | //---------------------------------------------------------------------------- | 123 | //---------------------------------------------------------------------------- |
124 | 124 | ||
125 | 125 | ||
@@ -128,16 +128,16 @@ static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u | |||
128 | * | 128 | * |
129 | * Action: initialize semaphores and variables | 129 | * Action: initialize semaphores and variables |
130 | *---------------------------------------------------------------------*/ | 130 | *---------------------------------------------------------------------*/ |
131 | void __init ibmphp_hpc_initvars (void) | 131 | void __init ibmphp_hpc_initvars(void) |
132 | { | 132 | { |
133 | debug ("%s - Entry\n", __func__); | 133 | debug("%s - Entry\n", __func__); |
134 | 134 | ||
135 | mutex_init(&sem_hpcaccess); | 135 | mutex_init(&sem_hpcaccess); |
136 | sema_init(&semOperations, 1); | 136 | sema_init(&semOperations, 1); |
137 | sema_init(&sem_exit, 0); | 137 | sema_init(&sem_exit, 0); |
138 | to_debug = 0; | 138 | to_debug = 0; |
139 | 139 | ||
140 | debug ("%s - Exit\n", __func__); | 140 | debug("%s - Exit\n", __func__); |
141 | } | 141 | } |
142 | 142 | ||
143 | /*---------------------------------------------------------------------- | 143 | /*---------------------------------------------------------------------- |
@@ -146,7 +146,7 @@ void __init ibmphp_hpc_initvars (void) | |||
146 | * Action: read from HPC over I2C | 146 | * Action: read from HPC over I2C |
147 | * | 147 | * |
148 | *---------------------------------------------------------------------*/ | 148 | *---------------------------------------------------------------------*/ |
149 | static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index) | 149 | static u8 i2c_ctrl_read(struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index) |
150 | { | 150 | { |
151 | u8 status; | 151 | u8 status; |
152 | int i; | 152 | int i; |
@@ -155,7 +155,7 @@ static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
155 | unsigned long ultemp; | 155 | unsigned long ultemp; |
156 | unsigned long data; // actual data HILO format | 156 | unsigned long data; // actual data HILO format |
157 | 157 | ||
158 | debug_polling ("%s - Entry WPGBbar[%p] index[%x] \n", __func__, WPGBbar, index); | 158 | debug_polling("%s - Entry WPGBbar[%p] index[%x] \n", __func__, WPGBbar, index); |
159 | 159 | ||
160 | //-------------------------------------------------------------------- | 160 | //-------------------------------------------------------------------- |
161 | // READ - step 1 | 161 | // READ - step 1 |
@@ -178,28 +178,28 @@ static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
178 | ultemp = ultemp << 8; | 178 | ultemp = ultemp << 8; |
179 | data |= ultemp; | 179 | data |= ultemp; |
180 | } else { | 180 | } else { |
181 | err ("this controller type is not supported \n"); | 181 | err("this controller type is not supported \n"); |
182 | return HPC_ERROR; | 182 | return HPC_ERROR; |
183 | } | 183 | } |
184 | 184 | ||
185 | wpg_data = swab32 (data); // swap data before writing | 185 | wpg_data = swab32(data); // swap data before writing |
186 | wpg_addr = WPGBbar + WPG_I2CMOSUP_OFFSET; | 186 | wpg_addr = WPGBbar + WPG_I2CMOSUP_OFFSET; |
187 | writel (wpg_data, wpg_addr); | 187 | writel(wpg_data, wpg_addr); |
188 | 188 | ||
189 | //-------------------------------------------------------------------- | 189 | //-------------------------------------------------------------------- |
190 | // READ - step 2 : clear the message buffer | 190 | // READ - step 2 : clear the message buffer |
191 | data = 0x00000000; | 191 | data = 0x00000000; |
192 | wpg_data = swab32 (data); | 192 | wpg_data = swab32(data); |
193 | wpg_addr = WPGBbar + WPG_I2CMBUFL_OFFSET; | 193 | wpg_addr = WPGBbar + WPG_I2CMBUFL_OFFSET; |
194 | writel (wpg_data, wpg_addr); | 194 | writel(wpg_data, wpg_addr); |
195 | 195 | ||
196 | //-------------------------------------------------------------------- | 196 | //-------------------------------------------------------------------- |
197 | // READ - step 3 : issue start operation, I2C master control bit 30:ON | 197 | // READ - step 3 : issue start operation, I2C master control bit 30:ON |
198 | // 2020 : [20] OR operation at [20] offset 0x20 | 198 | // 2020 : [20] OR operation at [20] offset 0x20 |
199 | data = WPG_I2CMCNTL_STARTOP_MASK; | 199 | data = WPG_I2CMCNTL_STARTOP_MASK; |
200 | wpg_data = swab32 (data); | 200 | wpg_data = swab32(data); |
201 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET + WPG_I2C_OR; | 201 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET + WPG_I2C_OR; |
202 | writel (wpg_data, wpg_addr); | 202 | writel(wpg_data, wpg_addr); |
203 | 203 | ||
204 | //-------------------------------------------------------------------- | 204 | //-------------------------------------------------------------------- |
205 | // READ - step 4 : wait until start operation bit clears | 205 | // READ - step 4 : wait until start operation bit clears |
@@ -207,14 +207,14 @@ static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
207 | while (i) { | 207 | while (i) { |
208 | msleep(10); | 208 | msleep(10); |
209 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET; | 209 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET; |
210 | wpg_data = readl (wpg_addr); | 210 | wpg_data = readl(wpg_addr); |
211 | data = swab32 (wpg_data); | 211 | data = swab32(wpg_data); |
212 | if (!(data & WPG_I2CMCNTL_STARTOP_MASK)) | 212 | if (!(data & WPG_I2CMCNTL_STARTOP_MASK)) |
213 | break; | 213 | break; |
214 | i--; | 214 | i--; |
215 | } | 215 | } |
216 | if (i == 0) { | 216 | if (i == 0) { |
217 | debug ("%s - Error : WPG timeout\n", __func__); | 217 | debug("%s - Error : WPG timeout\n", __func__); |
218 | return HPC_ERROR; | 218 | return HPC_ERROR; |
219 | } | 219 | } |
220 | //-------------------------------------------------------------------- | 220 | //-------------------------------------------------------------------- |
@@ -223,26 +223,26 @@ static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
223 | while (i) { | 223 | while (i) { |
224 | msleep(10); | 224 | msleep(10); |
225 | wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET; | 225 | wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET; |
226 | wpg_data = readl (wpg_addr); | 226 | wpg_data = readl(wpg_addr); |
227 | data = swab32 (wpg_data); | 227 | data = swab32(wpg_data); |
228 | if (HPC_I2CSTATUS_CHECK (data)) | 228 | if (HPC_I2CSTATUS_CHECK(data)) |
229 | break; | 229 | break; |
230 | i--; | 230 | i--; |
231 | } | 231 | } |
232 | if (i == 0) { | 232 | if (i == 0) { |
233 | debug ("ctrl_read - Exit Error:I2C timeout\n"); | 233 | debug("ctrl_read - Exit Error:I2C timeout\n"); |
234 | return HPC_ERROR; | 234 | return HPC_ERROR; |
235 | } | 235 | } |
236 | 236 | ||
237 | //-------------------------------------------------------------------- | 237 | //-------------------------------------------------------------------- |
238 | // READ - step 6 : get DATA | 238 | // READ - step 6 : get DATA |
239 | wpg_addr = WPGBbar + WPG_I2CMBUFL_OFFSET; | 239 | wpg_addr = WPGBbar + WPG_I2CMBUFL_OFFSET; |
240 | wpg_data = readl (wpg_addr); | 240 | wpg_data = readl(wpg_addr); |
241 | data = swab32 (wpg_data); | 241 | data = swab32(wpg_data); |
242 | 242 | ||
243 | status = (u8) data; | 243 | status = (u8) data; |
244 | 244 | ||
245 | debug_polling ("%s - Exit index[%x] status[%x]\n", __func__, index, status); | 245 | debug_polling("%s - Exit index[%x] status[%x]\n", __func__, index, status); |
246 | 246 | ||
247 | return (status); | 247 | return (status); |
248 | } | 248 | } |
@@ -254,7 +254,7 @@ static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
254 | * | 254 | * |
255 | * Return 0 or error codes | 255 | * Return 0 or error codes |
256 | *---------------------------------------------------------------------*/ | 256 | *---------------------------------------------------------------------*/ |
257 | static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index, u8 cmd) | 257 | static u8 i2c_ctrl_write(struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index, u8 cmd) |
258 | { | 258 | { |
259 | u8 rc; | 259 | u8 rc; |
260 | void __iomem *wpg_addr; // base addr + offset | 260 | void __iomem *wpg_addr; // base addr + offset |
@@ -263,7 +263,7 @@ static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
263 | unsigned long data; // actual data HILO format | 263 | unsigned long data; // actual data HILO format |
264 | int i; | 264 | int i; |
265 | 265 | ||
266 | debug_polling ("%s - Entry WPGBbar[%p] index[%x] cmd[%x]\n", __func__, WPGBbar, index, cmd); | 266 | debug_polling("%s - Entry WPGBbar[%p] index[%x] cmd[%x]\n", __func__, WPGBbar, index, cmd); |
267 | 267 | ||
268 | rc = 0; | 268 | rc = 0; |
269 | //-------------------------------------------------------------------- | 269 | //-------------------------------------------------------------------- |
@@ -289,28 +289,28 @@ static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
289 | ultemp = ultemp << 8; | 289 | ultemp = ultemp << 8; |
290 | data |= ultemp; | 290 | data |= ultemp; |
291 | } else { | 291 | } else { |
292 | err ("this controller type is not supported \n"); | 292 | err("this controller type is not supported \n"); |
293 | return HPC_ERROR; | 293 | return HPC_ERROR; |
294 | } | 294 | } |
295 | 295 | ||
296 | wpg_data = swab32 (data); // swap data before writing | 296 | wpg_data = swab32(data); // swap data before writing |
297 | wpg_addr = WPGBbar + WPG_I2CMOSUP_OFFSET; | 297 | wpg_addr = WPGBbar + WPG_I2CMOSUP_OFFSET; |
298 | writel (wpg_data, wpg_addr); | 298 | writel(wpg_data, wpg_addr); |
299 | 299 | ||
300 | //-------------------------------------------------------------------- | 300 | //-------------------------------------------------------------------- |
301 | // WRITE - step 2 : clear the message buffer | 301 | // WRITE - step 2 : clear the message buffer |
302 | data = 0x00000000 | (unsigned long)cmd; | 302 | data = 0x00000000 | (unsigned long)cmd; |
303 | wpg_data = swab32 (data); | 303 | wpg_data = swab32(data); |
304 | wpg_addr = WPGBbar + WPG_I2CMBUFL_OFFSET; | 304 | wpg_addr = WPGBbar + WPG_I2CMBUFL_OFFSET; |
305 | writel (wpg_data, wpg_addr); | 305 | writel(wpg_data, wpg_addr); |
306 | 306 | ||
307 | //-------------------------------------------------------------------- | 307 | //-------------------------------------------------------------------- |
308 | // WRITE - step 3 : issue start operation,I2C master control bit 30:ON | 308 | // WRITE - step 3 : issue start operation,I2C master control bit 30:ON |
309 | // 2020 : [20] OR operation at [20] offset 0x20 | 309 | // 2020 : [20] OR operation at [20] offset 0x20 |
310 | data = WPG_I2CMCNTL_STARTOP_MASK; | 310 | data = WPG_I2CMCNTL_STARTOP_MASK; |
311 | wpg_data = swab32 (data); | 311 | wpg_data = swab32(data); |
312 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET + WPG_I2C_OR; | 312 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET + WPG_I2C_OR; |
313 | writel (wpg_data, wpg_addr); | 313 | writel(wpg_data, wpg_addr); |
314 | 314 | ||
315 | //-------------------------------------------------------------------- | 315 | //-------------------------------------------------------------------- |
316 | // WRITE - step 4 : wait until start operation bit clears | 316 | // WRITE - step 4 : wait until start operation bit clears |
@@ -318,14 +318,14 @@ static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
318 | while (i) { | 318 | while (i) { |
319 | msleep(10); | 319 | msleep(10); |
320 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET; | 320 | wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET; |
321 | wpg_data = readl (wpg_addr); | 321 | wpg_data = readl(wpg_addr); |
322 | data = swab32 (wpg_data); | 322 | data = swab32(wpg_data); |
323 | if (!(data & WPG_I2CMCNTL_STARTOP_MASK)) | 323 | if (!(data & WPG_I2CMCNTL_STARTOP_MASK)) |
324 | break; | 324 | break; |
325 | i--; | 325 | i--; |
326 | } | 326 | } |
327 | if (i == 0) { | 327 | if (i == 0) { |
328 | debug ("%s - Exit Error:WPG timeout\n", __func__); | 328 | debug("%s - Exit Error:WPG timeout\n", __func__); |
329 | rc = HPC_ERROR; | 329 | rc = HPC_ERROR; |
330 | } | 330 | } |
331 | 331 | ||
@@ -335,25 +335,25 @@ static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 | |||
335 | while (i) { | 335 | while (i) { |
336 | msleep(10); | 336 | msleep(10); |
337 | wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET; | 337 | wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET; |
338 | wpg_data = readl (wpg_addr); | 338 | wpg_data = readl(wpg_addr); |
339 | data = swab32 (wpg_data); | 339 | data = swab32(wpg_data); |
340 | if (HPC_I2CSTATUS_CHECK (data)) | 340 | if (HPC_I2CSTATUS_CHECK(data)) |
341 | break; | 341 | break; |
342 | i--; | 342 | i--; |
343 | } | 343 | } |
344 | if (i == 0) { | 344 | if (i == 0) { |
345 | debug ("ctrl_read - Error : I2C timeout\n"); | 345 | debug("ctrl_read - Error : I2C timeout\n"); |
346 | rc = HPC_ERROR; | 346 | rc = HPC_ERROR; |
347 | } | 347 | } |
348 | 348 | ||
349 | debug_polling ("%s Exit rc[%x]\n", __func__, rc); | 349 | debug_polling("%s Exit rc[%x]\n", __func__, rc); |
350 | return (rc); | 350 | return (rc); |
351 | } | 351 | } |
352 | 352 | ||
353 | //------------------------------------------------------------ | 353 | //------------------------------------------------------------ |
354 | // Read from ISA type HPC | 354 | // Read from ISA type HPC |
355 | //------------------------------------------------------------ | 355 | //------------------------------------------------------------ |
356 | static u8 isa_ctrl_read (struct controller *ctlr_ptr, u8 offset) | 356 | static u8 isa_ctrl_read(struct controller *ctlr_ptr, u8 offset) |
357 | { | 357 | { |
358 | u16 start_address; | 358 | u16 start_address; |
359 | u16 end_address; | 359 | u16 end_address; |
@@ -361,56 +361,56 @@ static u8 isa_ctrl_read (struct controller *ctlr_ptr, u8 offset) | |||
361 | 361 | ||
362 | start_address = ctlr_ptr->u.isa_ctlr.io_start; | 362 | start_address = ctlr_ptr->u.isa_ctlr.io_start; |
363 | end_address = ctlr_ptr->u.isa_ctlr.io_end; | 363 | end_address = ctlr_ptr->u.isa_ctlr.io_end; |
364 | data = inb (start_address + offset); | 364 | data = inb(start_address + offset); |
365 | return data; | 365 | return data; |
366 | } | 366 | } |
367 | 367 | ||
368 | //-------------------------------------------------------------- | 368 | //-------------------------------------------------------------- |
369 | // Write to ISA type HPC | 369 | // Write to ISA type HPC |
370 | //-------------------------------------------------------------- | 370 | //-------------------------------------------------------------- |
371 | static void isa_ctrl_write (struct controller *ctlr_ptr, u8 offset, u8 data) | 371 | static void isa_ctrl_write(struct controller *ctlr_ptr, u8 offset, u8 data) |
372 | { | 372 | { |
373 | u16 start_address; | 373 | u16 start_address; |
374 | u16 port_address; | 374 | u16 port_address; |
375 | 375 | ||
376 | start_address = ctlr_ptr->u.isa_ctlr.io_start; | 376 | start_address = ctlr_ptr->u.isa_ctlr.io_start; |
377 | port_address = start_address + (u16) offset; | 377 | port_address = start_address + (u16) offset; |
378 | outb (data, port_address); | 378 | outb(data, port_address); |
379 | } | 379 | } |
380 | 380 | ||
381 | static u8 pci_ctrl_read (struct controller *ctrl, u8 offset) | 381 | static u8 pci_ctrl_read(struct controller *ctrl, u8 offset) |
382 | { | 382 | { |
383 | u8 data = 0x00; | 383 | u8 data = 0x00; |
384 | debug ("inside pci_ctrl_read\n"); | 384 | debug("inside pci_ctrl_read\n"); |
385 | if (ctrl->ctrl_dev) | 385 | if (ctrl->ctrl_dev) |
386 | pci_read_config_byte (ctrl->ctrl_dev, HPC_PCI_OFFSET + offset, &data); | 386 | pci_read_config_byte(ctrl->ctrl_dev, HPC_PCI_OFFSET + offset, &data); |
387 | return data; | 387 | return data; |
388 | } | 388 | } |
389 | 389 | ||
390 | static u8 pci_ctrl_write (struct controller *ctrl, u8 offset, u8 data) | 390 | static u8 pci_ctrl_write(struct controller *ctrl, u8 offset, u8 data) |
391 | { | 391 | { |
392 | u8 rc = -ENODEV; | 392 | u8 rc = -ENODEV; |
393 | debug ("inside pci_ctrl_write\n"); | 393 | debug("inside pci_ctrl_write\n"); |
394 | if (ctrl->ctrl_dev) { | 394 | if (ctrl->ctrl_dev) { |
395 | pci_write_config_byte (ctrl->ctrl_dev, HPC_PCI_OFFSET + offset, data); | 395 | pci_write_config_byte(ctrl->ctrl_dev, HPC_PCI_OFFSET + offset, data); |
396 | rc = 0; | 396 | rc = 0; |
397 | } | 397 | } |
398 | return rc; | 398 | return rc; |
399 | } | 399 | } |
400 | 400 | ||
401 | static u8 ctrl_read (struct controller *ctlr, void __iomem *base, u8 offset) | 401 | static u8 ctrl_read(struct controller *ctlr, void __iomem *base, u8 offset) |
402 | { | 402 | { |
403 | u8 rc; | 403 | u8 rc; |
404 | switch (ctlr->ctlr_type) { | 404 | switch (ctlr->ctlr_type) { |
405 | case 0: | 405 | case 0: |
406 | rc = isa_ctrl_read (ctlr, offset); | 406 | rc = isa_ctrl_read(ctlr, offset); |
407 | break; | 407 | break; |
408 | case 1: | 408 | case 1: |
409 | rc = pci_ctrl_read (ctlr, offset); | 409 | rc = pci_ctrl_read(ctlr, offset); |
410 | break; | 410 | break; |
411 | case 2: | 411 | case 2: |
412 | case 4: | 412 | case 4: |
413 | rc = i2c_ctrl_read (ctlr, base, offset); | 413 | rc = i2c_ctrl_read(ctlr, base, offset); |
414 | break; | 414 | break; |
415 | default: | 415 | default: |
416 | return -ENODEV; | 416 | return -ENODEV; |
@@ -418,7 +418,7 @@ static u8 ctrl_read (struct controller *ctlr, void __iomem *base, u8 offset) | |||
418 | return rc; | 418 | return rc; |
419 | } | 419 | } |
420 | 420 | ||
421 | static u8 ctrl_write (struct controller *ctlr, void __iomem *base, u8 offset, u8 data) | 421 | static u8 ctrl_write(struct controller *ctlr, void __iomem *base, u8 offset, u8 data) |
422 | { | 422 | { |
423 | u8 rc = 0; | 423 | u8 rc = 0; |
424 | switch (ctlr->ctlr_type) { | 424 | switch (ctlr->ctlr_type) { |
@@ -426,7 +426,7 @@ static u8 ctrl_write (struct controller *ctlr, void __iomem *base, u8 offset, u8 | |||
426 | isa_ctrl_write(ctlr, offset, data); | 426 | isa_ctrl_write(ctlr, offset, data); |
427 | break; | 427 | break; |
428 | case 1: | 428 | case 1: |
429 | rc = pci_ctrl_write (ctlr, offset, data); | 429 | rc = pci_ctrl_write(ctlr, offset, data); |
430 | break; | 430 | break; |
431 | case 2: | 431 | case 2: |
432 | case 4: | 432 | case 4: |
@@ -444,7 +444,7 @@ static u8 ctrl_write (struct controller *ctlr, void __iomem *base, u8 offset, u8 | |||
444 | * | 444 | * |
445 | * Return index, HPC_ERROR | 445 | * Return index, HPC_ERROR |
446 | *---------------------------------------------------------------------*/ | 446 | *---------------------------------------------------------------------*/ |
447 | static u8 hpc_writecmdtoindex (u8 cmd, u8 index) | 447 | static u8 hpc_writecmdtoindex(u8 cmd, u8 index) |
448 | { | 448 | { |
449 | u8 rc; | 449 | u8 rc; |
450 | 450 | ||
@@ -476,7 +476,7 @@ static u8 hpc_writecmdtoindex (u8 cmd, u8 index) | |||
476 | break; | 476 | break; |
477 | 477 | ||
478 | default: | 478 | default: |
479 | err ("hpc_writecmdtoindex - Error invalid cmd[%x]\n", cmd); | 479 | err("hpc_writecmdtoindex - Error invalid cmd[%x]\n", cmd); |
480 | rc = HPC_ERROR; | 480 | rc = HPC_ERROR; |
481 | } | 481 | } |
482 | 482 | ||
@@ -490,7 +490,7 @@ static u8 hpc_writecmdtoindex (u8 cmd, u8 index) | |||
490 | * | 490 | * |
491 | * Return index, HPC_ERROR | 491 | * Return index, HPC_ERROR |
492 | *---------------------------------------------------------------------*/ | 492 | *---------------------------------------------------------------------*/ |
493 | static u8 hpc_readcmdtoindex (u8 cmd, u8 index) | 493 | static u8 hpc_readcmdtoindex(u8 cmd, u8 index) |
494 | { | 494 | { |
495 | u8 rc; | 495 | u8 rc; |
496 | 496 | ||
@@ -533,7 +533,7 @@ static u8 hpc_readcmdtoindex (u8 cmd, u8 index) | |||
533 | * | 533 | * |
534 | * Return 0 or error codes | 534 | * Return 0 or error codes |
535 | *---------------------------------------------------------------------*/ | 535 | *---------------------------------------------------------------------*/ |
536 | int ibmphp_hpc_readslot (struct slot *pslot, u8 cmd, u8 *pstatus) | 536 | int ibmphp_hpc_readslot(struct slot *pslot, u8 cmd, u8 *pstatus) |
537 | { | 537 | { |
538 | void __iomem *wpg_bbar = NULL; | 538 | void __iomem *wpg_bbar = NULL; |
539 | struct controller *ctlr_ptr; | 539 | struct controller *ctlr_ptr; |
@@ -541,69 +541,69 @@ int ibmphp_hpc_readslot (struct slot *pslot, u8 cmd, u8 *pstatus) | |||
541 | int rc = 0; | 541 | int rc = 0; |
542 | int busindex; | 542 | int busindex; |
543 | 543 | ||
544 | debug_polling ("%s - Entry pslot[%p] cmd[%x] pstatus[%p]\n", __func__, pslot, cmd, pstatus); | 544 | debug_polling("%s - Entry pslot[%p] cmd[%x] pstatus[%p]\n", __func__, pslot, cmd, pstatus); |
545 | 545 | ||
546 | if ((pslot == NULL) | 546 | if ((pslot == NULL) |
547 | || ((pstatus == NULL) && (cmd != READ_ALLSTAT) && (cmd != READ_BUSSTATUS))) { | 547 | || ((pstatus == NULL) && (cmd != READ_ALLSTAT) && (cmd != READ_BUSSTATUS))) { |
548 | rc = -EINVAL; | 548 | rc = -EINVAL; |
549 | err ("%s - Error invalid pointer, rc[%d]\n", __func__, rc); | 549 | err("%s - Error invalid pointer, rc[%d]\n", __func__, rc); |
550 | return rc; | 550 | return rc; |
551 | } | 551 | } |
552 | 552 | ||
553 | if (cmd == READ_BUSSTATUS) { | 553 | if (cmd == READ_BUSSTATUS) { |
554 | busindex = ibmphp_get_bus_index (pslot->bus); | 554 | busindex = ibmphp_get_bus_index(pslot->bus); |
555 | if (busindex < 0) { | 555 | if (busindex < 0) { |
556 | rc = -EINVAL; | 556 | rc = -EINVAL; |
557 | err ("%s - Exit Error:invalid bus, rc[%d]\n", __func__, rc); | 557 | err("%s - Exit Error:invalid bus, rc[%d]\n", __func__, rc); |
558 | return rc; | 558 | return rc; |
559 | } else | 559 | } else |
560 | index = (u8) busindex; | 560 | index = (u8) busindex; |
561 | } else | 561 | } else |
562 | index = pslot->ctlr_index; | 562 | index = pslot->ctlr_index; |
563 | 563 | ||
564 | index = hpc_readcmdtoindex (cmd, index); | 564 | index = hpc_readcmdtoindex(cmd, index); |
565 | 565 | ||
566 | if (index == HPC_ERROR) { | 566 | if (index == HPC_ERROR) { |
567 | rc = -EINVAL; | 567 | rc = -EINVAL; |
568 | err ("%s - Exit Error:invalid index, rc[%d]\n", __func__, rc); | 568 | err("%s - Exit Error:invalid index, rc[%d]\n", __func__, rc); |
569 | return rc; | 569 | return rc; |
570 | } | 570 | } |
571 | 571 | ||
572 | ctlr_ptr = pslot->ctrl; | 572 | ctlr_ptr = pslot->ctrl; |
573 | 573 | ||
574 | get_hpc_access (); | 574 | get_hpc_access(); |
575 | 575 | ||
576 | //-------------------------------------------------------------------- | 576 | //-------------------------------------------------------------------- |
577 | // map physical address to logical address | 577 | // map physical address to logical address |
578 | //-------------------------------------------------------------------- | 578 | //-------------------------------------------------------------------- |
579 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) | 579 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) |
580 | wpg_bbar = ioremap (ctlr_ptr->u.wpeg_ctlr.wpegbbar, WPG_I2C_IOREMAP_SIZE); | 580 | wpg_bbar = ioremap(ctlr_ptr->u.wpeg_ctlr.wpegbbar, WPG_I2C_IOREMAP_SIZE); |
581 | 581 | ||
582 | //-------------------------------------------------------------------- | 582 | //-------------------------------------------------------------------- |
583 | // check controller status before reading | 583 | // check controller status before reading |
584 | //-------------------------------------------------------------------- | 584 | //-------------------------------------------------------------------- |
585 | rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, &status); | 585 | rc = hpc_wait_ctlr_notworking(HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, &status); |
586 | if (!rc) { | 586 | if (!rc) { |
587 | switch (cmd) { | 587 | switch (cmd) { |
588 | case READ_ALLSTAT: | 588 | case READ_ALLSTAT: |
589 | // update the slot structure | 589 | // update the slot structure |
590 | pslot->ctrl->status = status; | 590 | pslot->ctrl->status = status; |
591 | pslot->status = ctrl_read (ctlr_ptr, wpg_bbar, index); | 591 | pslot->status = ctrl_read(ctlr_ptr, wpg_bbar, index); |
592 | rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, | 592 | rc = hpc_wait_ctlr_notworking(HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, |
593 | &status); | 593 | &status); |
594 | if (!rc) | 594 | if (!rc) |
595 | pslot->ext_status = ctrl_read (ctlr_ptr, wpg_bbar, index + WPG_1ST_EXTSLOT_INDEX); | 595 | pslot->ext_status = ctrl_read(ctlr_ptr, wpg_bbar, index + WPG_1ST_EXTSLOT_INDEX); |
596 | 596 | ||
597 | break; | 597 | break; |
598 | 598 | ||
599 | case READ_SLOTSTATUS: | 599 | case READ_SLOTSTATUS: |
600 | // DO NOT update the slot structure | 600 | // DO NOT update the slot structure |
601 | *pstatus = ctrl_read (ctlr_ptr, wpg_bbar, index); | 601 | *pstatus = ctrl_read(ctlr_ptr, wpg_bbar, index); |
602 | break; | 602 | break; |
603 | 603 | ||
604 | case READ_EXTSLOTSTATUS: | 604 | case READ_EXTSLOTSTATUS: |
605 | // DO NOT update the slot structure | 605 | // DO NOT update the slot structure |
606 | *pstatus = ctrl_read (ctlr_ptr, wpg_bbar, index); | 606 | *pstatus = ctrl_read(ctlr_ptr, wpg_bbar, index); |
607 | break; | 607 | break; |
608 | 608 | ||
609 | case READ_CTLRSTATUS: | 609 | case READ_CTLRSTATUS: |
@@ -612,17 +612,17 @@ int ibmphp_hpc_readslot (struct slot *pslot, u8 cmd, u8 *pstatus) | |||
612 | break; | 612 | break; |
613 | 613 | ||
614 | case READ_BUSSTATUS: | 614 | case READ_BUSSTATUS: |
615 | pslot->busstatus = ctrl_read (ctlr_ptr, wpg_bbar, index); | 615 | pslot->busstatus = ctrl_read(ctlr_ptr, wpg_bbar, index); |
616 | break; | 616 | break; |
617 | case READ_REVLEVEL: | 617 | case READ_REVLEVEL: |
618 | *pstatus = ctrl_read (ctlr_ptr, wpg_bbar, index); | 618 | *pstatus = ctrl_read(ctlr_ptr, wpg_bbar, index); |
619 | break; | 619 | break; |
620 | case READ_HPCOPTIONS: | 620 | case READ_HPCOPTIONS: |
621 | *pstatus = ctrl_read (ctlr_ptr, wpg_bbar, index); | 621 | *pstatus = ctrl_read(ctlr_ptr, wpg_bbar, index); |
622 | break; | 622 | break; |
623 | case READ_SLOTLATCHLOWREG: | 623 | case READ_SLOTLATCHLOWREG: |
624 | // DO NOT update the slot structure | 624 | // DO NOT update the slot structure |
625 | *pstatus = ctrl_read (ctlr_ptr, wpg_bbar, index); | 625 | *pstatus = ctrl_read(ctlr_ptr, wpg_bbar, index); |
626 | break; | 626 | break; |
627 | 627 | ||
628 | // Not used | 628 | // Not used |
@@ -630,18 +630,18 @@ int ibmphp_hpc_readslot (struct slot *pslot, u8 cmd, u8 *pstatus) | |||
630 | list_for_each_entry(pslot, &ibmphp_slot_head, | 630 | list_for_each_entry(pslot, &ibmphp_slot_head, |
631 | ibm_slot_list) { | 631 | ibm_slot_list) { |
632 | index = pslot->ctlr_index; | 632 | index = pslot->ctlr_index; |
633 | rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, ctlr_ptr, | 633 | rc = hpc_wait_ctlr_notworking(HPC_CTLR_WORKING_TOUT, ctlr_ptr, |
634 | wpg_bbar, &status); | 634 | wpg_bbar, &status); |
635 | if (!rc) { | 635 | if (!rc) { |
636 | pslot->status = ctrl_read (ctlr_ptr, wpg_bbar, index); | 636 | pslot->status = ctrl_read(ctlr_ptr, wpg_bbar, index); |
637 | rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, | 637 | rc = hpc_wait_ctlr_notworking(HPC_CTLR_WORKING_TOUT, |
638 | ctlr_ptr, wpg_bbar, &status); | 638 | ctlr_ptr, wpg_bbar, &status); |
639 | if (!rc) | 639 | if (!rc) |
640 | pslot->ext_status = | 640 | pslot->ext_status = |
641 | ctrl_read (ctlr_ptr, wpg_bbar, | 641 | ctrl_read(ctlr_ptr, wpg_bbar, |
642 | index + WPG_1ST_EXTSLOT_INDEX); | 642 | index + WPG_1ST_EXTSLOT_INDEX); |
643 | } else { | 643 | } else { |
644 | err ("%s - Error ctrl_read failed\n", __func__); | 644 | err("%s - Error ctrl_read failed\n", __func__); |
645 | rc = -EINVAL; | 645 | rc = -EINVAL; |
646 | break; | 646 | break; |
647 | } | 647 | } |
@@ -658,11 +658,11 @@ int ibmphp_hpc_readslot (struct slot *pslot, u8 cmd, u8 *pstatus) | |||
658 | 658 | ||
659 | // remove physical to logical address mapping | 659 | // remove physical to logical address mapping |
660 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) | 660 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) |
661 | iounmap (wpg_bbar); | 661 | iounmap(wpg_bbar); |
662 | 662 | ||
663 | free_hpc_access (); | 663 | free_hpc_access(); |
664 | 664 | ||
665 | debug_polling ("%s - Exit rc[%d]\n", __func__, rc); | 665 | debug_polling("%s - Exit rc[%d]\n", __func__, rc); |
666 | return rc; | 666 | return rc; |
667 | } | 667 | } |
668 | 668 | ||
@@ -671,7 +671,7 @@ int ibmphp_hpc_readslot (struct slot *pslot, u8 cmd, u8 *pstatus) | |||
671 | * | 671 | * |
672 | * Action: issue a WRITE command to HPC | 672 | * Action: issue a WRITE command to HPC |
673 | *---------------------------------------------------------------------*/ | 673 | *---------------------------------------------------------------------*/ |
674 | int ibmphp_hpc_writeslot (struct slot *pslot, u8 cmd) | 674 | int ibmphp_hpc_writeslot(struct slot *pslot, u8 cmd) |
675 | { | 675 | { |
676 | void __iomem *wpg_bbar = NULL; | 676 | void __iomem *wpg_bbar = NULL; |
677 | struct controller *ctlr_ptr; | 677 | struct controller *ctlr_ptr; |
@@ -681,55 +681,55 @@ int ibmphp_hpc_writeslot (struct slot *pslot, u8 cmd) | |||
681 | int rc = 0; | 681 | int rc = 0; |
682 | int timeout; | 682 | int timeout; |
683 | 683 | ||
684 | debug_polling ("%s - Entry pslot[%p] cmd[%x]\n", __func__, pslot, cmd); | 684 | debug_polling("%s - Entry pslot[%p] cmd[%x]\n", __func__, pslot, cmd); |
685 | if (pslot == NULL) { | 685 | if (pslot == NULL) { |
686 | rc = -EINVAL; | 686 | rc = -EINVAL; |
687 | err ("%s - Error Exit rc[%d]\n", __func__, rc); | 687 | err("%s - Error Exit rc[%d]\n", __func__, rc); |
688 | return rc; | 688 | return rc; |
689 | } | 689 | } |
690 | 690 | ||
691 | if ((cmd == HPC_BUS_33CONVMODE) || (cmd == HPC_BUS_66CONVMODE) || | 691 | if ((cmd == HPC_BUS_33CONVMODE) || (cmd == HPC_BUS_66CONVMODE) || |
692 | (cmd == HPC_BUS_66PCIXMODE) || (cmd == HPC_BUS_100PCIXMODE) || | 692 | (cmd == HPC_BUS_66PCIXMODE) || (cmd == HPC_BUS_100PCIXMODE) || |
693 | (cmd == HPC_BUS_133PCIXMODE)) { | 693 | (cmd == HPC_BUS_133PCIXMODE)) { |
694 | busindex = ibmphp_get_bus_index (pslot->bus); | 694 | busindex = ibmphp_get_bus_index(pslot->bus); |
695 | if (busindex < 0) { | 695 | if (busindex < 0) { |
696 | rc = -EINVAL; | 696 | rc = -EINVAL; |
697 | err ("%s - Exit Error:invalid bus, rc[%d]\n", __func__, rc); | 697 | err("%s - Exit Error:invalid bus, rc[%d]\n", __func__, rc); |
698 | return rc; | 698 | return rc; |
699 | } else | 699 | } else |
700 | index = (u8) busindex; | 700 | index = (u8) busindex; |
701 | } else | 701 | } else |
702 | index = pslot->ctlr_index; | 702 | index = pslot->ctlr_index; |
703 | 703 | ||
704 | index = hpc_writecmdtoindex (cmd, index); | 704 | index = hpc_writecmdtoindex(cmd, index); |
705 | 705 | ||
706 | if (index == HPC_ERROR) { | 706 | if (index == HPC_ERROR) { |
707 | rc = -EINVAL; | 707 | rc = -EINVAL; |
708 | err ("%s - Error Exit rc[%d]\n", __func__, rc); | 708 | err("%s - Error Exit rc[%d]\n", __func__, rc); |
709 | return rc; | 709 | return rc; |
710 | } | 710 | } |
711 | 711 | ||
712 | ctlr_ptr = pslot->ctrl; | 712 | ctlr_ptr = pslot->ctrl; |
713 | 713 | ||
714 | get_hpc_access (); | 714 | get_hpc_access(); |
715 | 715 | ||
716 | //-------------------------------------------------------------------- | 716 | //-------------------------------------------------------------------- |
717 | // map physical address to logical address | 717 | // map physical address to logical address |
718 | //-------------------------------------------------------------------- | 718 | //-------------------------------------------------------------------- |
719 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) { | 719 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) { |
720 | wpg_bbar = ioremap (ctlr_ptr->u.wpeg_ctlr.wpegbbar, WPG_I2C_IOREMAP_SIZE); | 720 | wpg_bbar = ioremap(ctlr_ptr->u.wpeg_ctlr.wpegbbar, WPG_I2C_IOREMAP_SIZE); |
721 | 721 | ||
722 | debug ("%s - ctlr id[%x] physical[%lx] logical[%lx] i2c[%x]\n", __func__, | 722 | debug("%s - ctlr id[%x] physical[%lx] logical[%lx] i2c[%x]\n", __func__, |
723 | ctlr_ptr->ctlr_id, (ulong) (ctlr_ptr->u.wpeg_ctlr.wpegbbar), (ulong) wpg_bbar, | 723 | ctlr_ptr->ctlr_id, (ulong) (ctlr_ptr->u.wpeg_ctlr.wpegbbar), (ulong) wpg_bbar, |
724 | ctlr_ptr->u.wpeg_ctlr.i2c_addr); | 724 | ctlr_ptr->u.wpeg_ctlr.i2c_addr); |
725 | } | 725 | } |
726 | //-------------------------------------------------------------------- | 726 | //-------------------------------------------------------------------- |
727 | // check controller status before writing | 727 | // check controller status before writing |
728 | //-------------------------------------------------------------------- | 728 | //-------------------------------------------------------------------- |
729 | rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, &status); | 729 | rc = hpc_wait_ctlr_notworking(HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, &status); |
730 | if (!rc) { | 730 | if (!rc) { |
731 | 731 | ||
732 | ctrl_write (ctlr_ptr, wpg_bbar, index, cmd); | 732 | ctrl_write(ctlr_ptr, wpg_bbar, index, cmd); |
733 | 733 | ||
734 | //-------------------------------------------------------------------- | 734 | //-------------------------------------------------------------------- |
735 | // check controller is still not working on the command | 735 | // check controller is still not working on the command |
@@ -737,11 +737,11 @@ int ibmphp_hpc_writeslot (struct slot *pslot, u8 cmd) | |||
737 | timeout = CMD_COMPLETE_TOUT_SEC; | 737 | timeout = CMD_COMPLETE_TOUT_SEC; |
738 | done = 0; | 738 | done = 0; |
739 | while (!done) { | 739 | while (!done) { |
740 | rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, | 740 | rc = hpc_wait_ctlr_notworking(HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar, |
741 | &status); | 741 | &status); |
742 | if (!rc) { | 742 | if (!rc) { |
743 | if (NEEDTOCHECK_CMDSTATUS (cmd)) { | 743 | if (NEEDTOCHECK_CMDSTATUS(cmd)) { |
744 | if (CTLR_FINISHED (status) == HPC_CTLR_FINISHED_YES) | 744 | if (CTLR_FINISHED(status) == HPC_CTLR_FINISHED_YES) |
745 | done = 1; | 745 | done = 1; |
746 | } else | 746 | } else |
747 | done = 1; | 747 | done = 1; |
@@ -750,7 +750,7 @@ int ibmphp_hpc_writeslot (struct slot *pslot, u8 cmd) | |||
750 | msleep(1000); | 750 | msleep(1000); |
751 | if (timeout < 1) { | 751 | if (timeout < 1) { |
752 | done = 1; | 752 | done = 1; |
753 | err ("%s - Error command complete timeout\n", __func__); | 753 | err("%s - Error command complete timeout\n", __func__); |
754 | rc = -EFAULT; | 754 | rc = -EFAULT; |
755 | } else | 755 | } else |
756 | timeout--; | 756 | timeout--; |
@@ -762,10 +762,10 @@ int ibmphp_hpc_writeslot (struct slot *pslot, u8 cmd) | |||
762 | 762 | ||
763 | // remove physical to logical address mapping | 763 | // remove physical to logical address mapping |
764 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) | 764 | if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4)) |
765 | iounmap (wpg_bbar); | 765 | iounmap(wpg_bbar); |
766 | free_hpc_access (); | 766 | free_hpc_access(); |
767 | 767 | ||
768 | debug_polling ("%s - Exit rc[%d]\n", __func__, rc); | 768 | debug_polling("%s - Exit rc[%d]\n", __func__, rc); |
769 | return rc; | 769 | return rc; |
770 | } | 770 | } |
771 | 771 | ||
@@ -774,7 +774,7 @@ int ibmphp_hpc_writeslot (struct slot *pslot, u8 cmd) | |||
774 | * | 774 | * |
775 | * Action: make sure only one process can access HPC at one time | 775 | * Action: make sure only one process can access HPC at one time |
776 | *---------------------------------------------------------------------*/ | 776 | *---------------------------------------------------------------------*/ |
777 | static void get_hpc_access (void) | 777 | static void get_hpc_access(void) |
778 | { | 778 | { |
779 | mutex_lock(&sem_hpcaccess); | 779 | mutex_lock(&sem_hpcaccess); |
780 | } | 780 | } |
@@ -782,7 +782,7 @@ static void get_hpc_access (void) | |||
782 | /*---------------------------------------------------------------------- | 782 | /*---------------------------------------------------------------------- |
783 | * Name: free_hpc_access() | 783 | * Name: free_hpc_access() |
784 | *---------------------------------------------------------------------*/ | 784 | *---------------------------------------------------------------------*/ |
785 | void free_hpc_access (void) | 785 | void free_hpc_access(void) |
786 | { | 786 | { |
787 | mutex_unlock(&sem_hpcaccess); | 787 | mutex_unlock(&sem_hpcaccess); |
788 | } | 788 | } |
@@ -792,21 +792,21 @@ void free_hpc_access (void) | |||
792 | * | 792 | * |
793 | * Action: make sure only one process can change the data structure | 793 | * Action: make sure only one process can change the data structure |
794 | *---------------------------------------------------------------------*/ | 794 | *---------------------------------------------------------------------*/ |
795 | void ibmphp_lock_operations (void) | 795 | void ibmphp_lock_operations(void) |
796 | { | 796 | { |
797 | down (&semOperations); | 797 | down(&semOperations); |
798 | to_debug = 1; | 798 | to_debug = 1; |
799 | } | 799 | } |
800 | 800 | ||
801 | /*---------------------------------------------------------------------- | 801 | /*---------------------------------------------------------------------- |
802 | * Name: ibmphp_unlock_operations() | 802 | * Name: ibmphp_unlock_operations() |
803 | *---------------------------------------------------------------------*/ | 803 | *---------------------------------------------------------------------*/ |
804 | void ibmphp_unlock_operations (void) | 804 | void ibmphp_unlock_operations(void) |
805 | { | 805 | { |
806 | debug ("%s - Entry\n", __func__); | 806 | debug("%s - Entry\n", __func__); |
807 | up (&semOperations); | 807 | up(&semOperations); |
808 | to_debug = 0; | 808 | to_debug = 0; |
809 | debug ("%s - Exit\n", __func__); | 809 | debug("%s - Exit\n", __func__); |
810 | } | 810 | } |
811 | 811 | ||
812 | /*---------------------------------------------------------------------- | 812 | /*---------------------------------------------------------------------- |
@@ -826,11 +826,11 @@ static int poll_hpc(void *data) | |||
826 | int poll_count = 0; | 826 | int poll_count = 0; |
827 | u8 ctrl_count = 0x00; | 827 | u8 ctrl_count = 0x00; |
828 | 828 | ||
829 | debug ("%s - Entry\n", __func__); | 829 | debug("%s - Entry\n", __func__); |
830 | 830 | ||
831 | while (!kthread_should_stop()) { | 831 | while (!kthread_should_stop()) { |
832 | /* try to get the lock to do some kind of hardware access */ | 832 | /* try to get the lock to do some kind of hardware access */ |
833 | down (&semOperations); | 833 | down(&semOperations); |
834 | 834 | ||
835 | switch (poll_state) { | 835 | switch (poll_state) { |
836 | case POLL_LATCH_REGISTER: | 836 | case POLL_LATCH_REGISTER: |
@@ -842,12 +842,12 @@ static int poll_hpc(void *data) | |||
842 | break; | 842 | break; |
843 | if (pslot->ctrl->ctlr_relative_id == ctrl_count) { | 843 | if (pslot->ctrl->ctlr_relative_id == ctrl_count) { |
844 | ctrl_count++; | 844 | ctrl_count++; |
845 | if (READ_SLOT_LATCH (pslot->ctrl)) { | 845 | if (READ_SLOT_LATCH(pslot->ctrl)) { |
846 | rc = ibmphp_hpc_readslot (pslot, | 846 | rc = ibmphp_hpc_readslot(pslot, |
847 | READ_SLOTLATCHLOWREG, | 847 | READ_SLOTLATCHLOWREG, |
848 | &curlatchlow); | 848 | &curlatchlow); |
849 | if (oldlatchlow != curlatchlow) | 849 | if (oldlatchlow != curlatchlow) |
850 | process_changeinlatch (oldlatchlow, | 850 | process_changeinlatch(oldlatchlow, |
851 | curlatchlow, | 851 | curlatchlow, |
852 | pslot->ctrl); | 852 | pslot->ctrl); |
853 | } | 853 | } |
@@ -860,12 +860,12 @@ static int poll_hpc(void *data) | |||
860 | list_for_each_entry(pslot, &ibmphp_slot_head, | 860 | list_for_each_entry(pslot, &ibmphp_slot_head, |
861 | ibm_slot_list) { | 861 | ibm_slot_list) { |
862 | // make a copy of the old status | 862 | // make a copy of the old status |
863 | memcpy ((void *) &myslot, (void *) pslot, | 863 | memcpy((void *) &myslot, (void *) pslot, |
864 | sizeof (struct slot)); | 864 | sizeof(struct slot)); |
865 | rc = ibmphp_hpc_readslot (pslot, READ_ALLSTAT, NULL); | 865 | rc = ibmphp_hpc_readslot(pslot, READ_ALLSTAT, NULL); |
866 | if ((myslot.status != pslot->status) | 866 | if ((myslot.status != pslot->status) |
867 | || (myslot.ext_status != pslot->ext_status)) | 867 | || (myslot.ext_status != pslot->ext_status)) |
868 | process_changeinstatus (pslot, &myslot); | 868 | process_changeinstatus(pslot, &myslot); |
869 | } | 869 | } |
870 | ctrl_count = 0x00; | 870 | ctrl_count = 0x00; |
871 | list_for_each_entry(pslot, &ibmphp_slot_head, | 871 | list_for_each_entry(pslot, &ibmphp_slot_head, |
@@ -874,8 +874,8 @@ static int poll_hpc(void *data) | |||
874 | break; | 874 | break; |
875 | if (pslot->ctrl->ctlr_relative_id == ctrl_count) { | 875 | if (pslot->ctrl->ctlr_relative_id == ctrl_count) { |
876 | ctrl_count++; | 876 | ctrl_count++; |
877 | if (READ_SLOT_LATCH (pslot->ctrl)) | 877 | if (READ_SLOT_LATCH(pslot->ctrl)) |
878 | rc = ibmphp_hpc_readslot (pslot, | 878 | rc = ibmphp_hpc_readslot(pslot, |
879 | READ_SLOTLATCHLOWREG, | 879 | READ_SLOTLATCHLOWREG, |
880 | &curlatchlow); | 880 | &curlatchlow); |
881 | } | 881 | } |
@@ -885,13 +885,13 @@ static int poll_hpc(void *data) | |||
885 | break; | 885 | break; |
886 | case POLL_SLEEP: | 886 | case POLL_SLEEP: |
887 | /* don't sleep with a lock on the hardware */ | 887 | /* don't sleep with a lock on the hardware */ |
888 | up (&semOperations); | 888 | up(&semOperations); |
889 | msleep(POLL_INTERVAL_SEC * 1000); | 889 | msleep(POLL_INTERVAL_SEC * 1000); |
890 | 890 | ||
891 | if (kthread_should_stop()) | 891 | if (kthread_should_stop()) |
892 | goto out_sleep; | 892 | goto out_sleep; |
893 | 893 | ||
894 | down (&semOperations); | 894 | down(&semOperations); |
895 | 895 | ||
896 | if (poll_count >= POLL_LATCH_CNT) { | 896 | if (poll_count >= POLL_LATCH_CNT) { |
897 | poll_count = 0; | 897 | poll_count = 0; |
@@ -901,13 +901,13 @@ static int poll_hpc(void *data) | |||
901 | break; | 901 | break; |
902 | } | 902 | } |
903 | /* give up the hardware semaphore */ | 903 | /* give up the hardware semaphore */ |
904 | up (&semOperations); | 904 | up(&semOperations); |
905 | /* sleep for a short time just for good measure */ | 905 | /* sleep for a short time just for good measure */ |
906 | out_sleep: | 906 | out_sleep: |
907 | msleep(100); | 907 | msleep(100); |
908 | } | 908 | } |
909 | up (&sem_exit); | 909 | up(&sem_exit); |
910 | debug ("%s - Exit\n", __func__); | 910 | debug("%s - Exit\n", __func__); |
911 | return 0; | 911 | return 0; |
912 | } | 912 | } |
913 | 913 | ||
@@ -927,14 +927,14 @@ out_sleep: | |||
927 | * | 927 | * |
928 | * Notes: | 928 | * Notes: |
929 | *---------------------------------------------------------------------*/ | 929 | *---------------------------------------------------------------------*/ |
930 | static int process_changeinstatus (struct slot *pslot, struct slot *poldslot) | 930 | static int process_changeinstatus(struct slot *pslot, struct slot *poldslot) |
931 | { | 931 | { |
932 | u8 status; | 932 | u8 status; |
933 | int rc = 0; | 933 | int rc = 0; |
934 | u8 disable = 0; | 934 | u8 disable = 0; |
935 | u8 update = 0; | 935 | u8 update = 0; |
936 | 936 | ||
937 | debug ("process_changeinstatus - Entry pslot[%p], poldslot[%p]\n", pslot, poldslot); | 937 | debug("process_changeinstatus - Entry pslot[%p], poldslot[%p]\n", pslot, poldslot); |
938 | 938 | ||
939 | // bit 0 - HPC_SLOT_POWER | 939 | // bit 0 - HPC_SLOT_POWER |
940 | if ((pslot->status & 0x01) != (poldslot->status & 0x01)) | 940 | if ((pslot->status & 0x01) != (poldslot->status & 0x01)) |
@@ -956,7 +956,7 @@ static int process_changeinstatus (struct slot *pslot, struct slot *poldslot) | |||
956 | // bit 5 - HPC_SLOT_PWRGD | 956 | // bit 5 - HPC_SLOT_PWRGD |
957 | if ((pslot->status & 0x20) != (poldslot->status & 0x20)) | 957 | if ((pslot->status & 0x20) != (poldslot->status & 0x20)) |
958 | // OFF -> ON: ignore, ON -> OFF: disable slot | 958 | // OFF -> ON: ignore, ON -> OFF: disable slot |
959 | if ((poldslot->status & 0x20) && (SLOT_CONNECT (poldslot->status) == HPC_SLOT_CONNECTED) && (SLOT_PRESENT (poldslot->status))) | 959 | if ((poldslot->status & 0x20) && (SLOT_CONNECT(poldslot->status) == HPC_SLOT_CONNECTED) && (SLOT_PRESENT(poldslot->status))) |
960 | disable = 1; | 960 | disable = 1; |
961 | 961 | ||
962 | // bit 6 - HPC_SLOT_BUS_SPEED | 962 | // bit 6 - HPC_SLOT_BUS_SPEED |
@@ -967,20 +967,20 @@ static int process_changeinstatus (struct slot *pslot, struct slot *poldslot) | |||
967 | update = 1; | 967 | update = 1; |
968 | // OPEN -> CLOSE | 968 | // OPEN -> CLOSE |
969 | if (pslot->status & 0x80) { | 969 | if (pslot->status & 0x80) { |
970 | if (SLOT_PWRGD (pslot->status)) { | 970 | if (SLOT_PWRGD(pslot->status)) { |
971 | // power goes on and off after closing latch | 971 | // power goes on and off after closing latch |
972 | // check again to make sure power is still ON | 972 | // check again to make sure power is still ON |
973 | msleep(1000); | 973 | msleep(1000); |
974 | rc = ibmphp_hpc_readslot (pslot, READ_SLOTSTATUS, &status); | 974 | rc = ibmphp_hpc_readslot(pslot, READ_SLOTSTATUS, &status); |
975 | if (SLOT_PWRGD (status)) | 975 | if (SLOT_PWRGD(status)) |
976 | update = 1; | 976 | update = 1; |
977 | else // overwrite power in pslot to OFF | 977 | else // overwrite power in pslot to OFF |
978 | pslot->status &= ~HPC_SLOT_POWER; | 978 | pslot->status &= ~HPC_SLOT_POWER; |
979 | } | 979 | } |
980 | } | 980 | } |
981 | // CLOSE -> OPEN | 981 | // CLOSE -> OPEN |
982 | else if ((SLOT_PWRGD (poldslot->status) == HPC_SLOT_PWRGD_GOOD) | 982 | else if ((SLOT_PWRGD(poldslot->status) == HPC_SLOT_PWRGD_GOOD) |
983 | && (SLOT_CONNECT (poldslot->status) == HPC_SLOT_CONNECTED) && (SLOT_PRESENT (poldslot->status))) { | 983 | && (SLOT_CONNECT(poldslot->status) == HPC_SLOT_CONNECTED) && (SLOT_PRESENT(poldslot->status))) { |
984 | disable = 1; | 984 | disable = 1; |
985 | } | 985 | } |
986 | // else - ignore | 986 | // else - ignore |
@@ -990,15 +990,15 @@ static int process_changeinstatus (struct slot *pslot, struct slot *poldslot) | |||
990 | update = 1; | 990 | update = 1; |
991 | 991 | ||
992 | if (disable) { | 992 | if (disable) { |
993 | debug ("process_changeinstatus - disable slot\n"); | 993 | debug("process_changeinstatus - disable slot\n"); |
994 | pslot->flag = 0; | 994 | pslot->flag = 0; |
995 | rc = ibmphp_do_disable_slot (pslot); | 995 | rc = ibmphp_do_disable_slot(pslot); |
996 | } | 996 | } |
997 | 997 | ||
998 | if (update || disable) | 998 | if (update || disable) |
999 | ibmphp_update_slot_info (pslot); | 999 | ibmphp_update_slot_info(pslot); |
1000 | 1000 | ||
1001 | debug ("%s - Exit rc[%d] disable[%x] update[%x]\n", __func__, rc, disable, update); | 1001 | debug("%s - Exit rc[%d] disable[%x] update[%x]\n", __func__, rc, disable, update); |
1002 | 1002 | ||
1003 | return rc; | 1003 | return rc; |
1004 | } | 1004 | } |
@@ -1013,32 +1013,32 @@ static int process_changeinstatus (struct slot *pslot, struct slot *poldslot) | |||
1013 | * Return 0 or error codes | 1013 | * Return 0 or error codes |
1014 | * Value: | 1014 | * Value: |
1015 | *---------------------------------------------------------------------*/ | 1015 | *---------------------------------------------------------------------*/ |
1016 | static int process_changeinlatch (u8 old, u8 new, struct controller *ctrl) | 1016 | static int process_changeinlatch(u8 old, u8 new, struct controller *ctrl) |
1017 | { | 1017 | { |
1018 | struct slot myslot, *pslot; | 1018 | struct slot myslot, *pslot; |
1019 | u8 i; | 1019 | u8 i; |
1020 | u8 mask; | 1020 | u8 mask; |
1021 | int rc = 0; | 1021 | int rc = 0; |
1022 | 1022 | ||
1023 | debug ("%s - Entry old[%x], new[%x]\n", __func__, old, new); | 1023 | debug("%s - Entry old[%x], new[%x]\n", __func__, old, new); |
1024 | // bit 0 reserved, 0 is LSB, check bit 1-6 for 6 slots | 1024 | // bit 0 reserved, 0 is LSB, check bit 1-6 for 6 slots |
1025 | 1025 | ||
1026 | for (i = ctrl->starting_slot_num; i <= ctrl->ending_slot_num; i++) { | 1026 | for (i = ctrl->starting_slot_num; i <= ctrl->ending_slot_num; i++) { |
1027 | mask = 0x01 << i; | 1027 | mask = 0x01 << i; |
1028 | if ((mask & old) != (mask & new)) { | 1028 | if ((mask & old) != (mask & new)) { |
1029 | pslot = ibmphp_get_slot_from_physical_num (i); | 1029 | pslot = ibmphp_get_slot_from_physical_num(i); |
1030 | if (pslot) { | 1030 | if (pslot) { |
1031 | memcpy ((void *) &myslot, (void *) pslot, sizeof (struct slot)); | 1031 | memcpy((void *) &myslot, (void *) pslot, sizeof(struct slot)); |
1032 | rc = ibmphp_hpc_readslot (pslot, READ_ALLSTAT, NULL); | 1032 | rc = ibmphp_hpc_readslot(pslot, READ_ALLSTAT, NULL); |
1033 | debug ("%s - call process_changeinstatus for slot[%d]\n", __func__, i); | 1033 | debug("%s - call process_changeinstatus for slot[%d]\n", __func__, i); |
1034 | process_changeinstatus (pslot, &myslot); | 1034 | process_changeinstatus(pslot, &myslot); |
1035 | } else { | 1035 | } else { |
1036 | rc = -EINVAL; | 1036 | rc = -EINVAL; |
1037 | err ("%s - Error bad pointer for slot[%d]\n", __func__, i); | 1037 | err("%s - Error bad pointer for slot[%d]\n", __func__, i); |
1038 | } | 1038 | } |
1039 | } | 1039 | } |
1040 | } | 1040 | } |
1041 | debug ("%s - Exit rc[%d]\n", __func__, rc); | 1041 | debug("%s - Exit rc[%d]\n", __func__, rc); |
1042 | return rc; | 1042 | return rc; |
1043 | } | 1043 | } |
1044 | 1044 | ||
@@ -1047,13 +1047,13 @@ static int process_changeinlatch (u8 old, u8 new, struct controller *ctrl) | |||
1047 | * | 1047 | * |
1048 | * Action: start polling thread | 1048 | * Action: start polling thread |
1049 | *---------------------------------------------------------------------*/ | 1049 | *---------------------------------------------------------------------*/ |
1050 | int __init ibmphp_hpc_start_poll_thread (void) | 1050 | int __init ibmphp_hpc_start_poll_thread(void) |
1051 | { | 1051 | { |
1052 | debug ("%s - Entry\n", __func__); | 1052 | debug("%s - Entry\n", __func__); |
1053 | 1053 | ||
1054 | ibmphp_poll_thread = kthread_run(poll_hpc, NULL, "hpc_poll"); | 1054 | ibmphp_poll_thread = kthread_run(poll_hpc, NULL, "hpc_poll"); |
1055 | if (IS_ERR(ibmphp_poll_thread)) { | 1055 | if (IS_ERR(ibmphp_poll_thread)) { |
1056 | err ("%s - Error, thread not started\n", __func__); | 1056 | err("%s - Error, thread not started\n", __func__); |
1057 | return PTR_ERR(ibmphp_poll_thread); | 1057 | return PTR_ERR(ibmphp_poll_thread); |
1058 | } | 1058 | } |
1059 | return 0; | 1059 | return 0; |
@@ -1064,30 +1064,30 @@ int __init ibmphp_hpc_start_poll_thread (void) | |||
1064 | * | 1064 | * |
1065 | * Action: stop polling thread and cleanup | 1065 | * Action: stop polling thread and cleanup |
1066 | *---------------------------------------------------------------------*/ | 1066 | *---------------------------------------------------------------------*/ |
1067 | void __exit ibmphp_hpc_stop_poll_thread (void) | 1067 | void __exit ibmphp_hpc_stop_poll_thread(void) |
1068 | { | 1068 | { |
1069 | debug ("%s - Entry\n", __func__); | 1069 | debug("%s - Entry\n", __func__); |
1070 | 1070 | ||
1071 | kthread_stop(ibmphp_poll_thread); | 1071 | kthread_stop(ibmphp_poll_thread); |
1072 | debug ("before locking operations \n"); | 1072 | debug("before locking operations\n"); |
1073 | ibmphp_lock_operations (); | 1073 | ibmphp_lock_operations(); |
1074 | debug ("after locking operations \n"); | 1074 | debug("after locking operations\n"); |
1075 | 1075 | ||
1076 | // wait for poll thread to exit | 1076 | // wait for poll thread to exit |
1077 | debug ("before sem_exit down \n"); | 1077 | debug("before sem_exit down\n"); |
1078 | down (&sem_exit); | 1078 | down(&sem_exit); |
1079 | debug ("after sem_exit down \n"); | 1079 | debug("after sem_exit down\n"); |
1080 | 1080 | ||
1081 | // cleanup | 1081 | // cleanup |
1082 | debug ("before free_hpc_access \n"); | 1082 | debug("before free_hpc_access\n"); |
1083 | free_hpc_access (); | 1083 | free_hpc_access(); |
1084 | debug ("after free_hpc_access \n"); | 1084 | debug("after free_hpc_access\n"); |
1085 | ibmphp_unlock_operations (); | 1085 | ibmphp_unlock_operations(); |
1086 | debug ("after unlock operations \n"); | 1086 | debug("after unlock operations\n"); |
1087 | up (&sem_exit); | 1087 | up(&sem_exit); |
1088 | debug ("after sem exit up\n"); | 1088 | debug("after sem exit up\n"); |
1089 | 1089 | ||
1090 | debug ("%s - Exit\n", __func__); | 1090 | debug("%s - Exit\n", __func__); |
1091 | } | 1091 | } |
1092 | 1092 | ||
1093 | /*---------------------------------------------------------------------- | 1093 | /*---------------------------------------------------------------------- |
@@ -1098,32 +1098,32 @@ void __exit ibmphp_hpc_stop_poll_thread (void) | |||
1098 | * Return 0, HPC_ERROR | 1098 | * Return 0, HPC_ERROR |
1099 | * Value: | 1099 | * Value: |
1100 | *---------------------------------------------------------------------*/ | 1100 | *---------------------------------------------------------------------*/ |
1101 | static int hpc_wait_ctlr_notworking (int timeout, struct controller *ctlr_ptr, void __iomem *wpg_bbar, | 1101 | static int hpc_wait_ctlr_notworking(int timeout, struct controller *ctlr_ptr, void __iomem *wpg_bbar, |
1102 | u8 *pstatus) | 1102 | u8 *pstatus) |
1103 | { | 1103 | { |
1104 | int rc = 0; | 1104 | int rc = 0; |
1105 | u8 done = 0; | 1105 | u8 done = 0; |
1106 | 1106 | ||
1107 | debug_polling ("hpc_wait_ctlr_notworking - Entry timeout[%d]\n", timeout); | 1107 | debug_polling("hpc_wait_ctlr_notworking - Entry timeout[%d]\n", timeout); |
1108 | 1108 | ||
1109 | while (!done) { | 1109 | while (!done) { |
1110 | *pstatus = ctrl_read (ctlr_ptr, wpg_bbar, WPG_CTLR_INDEX); | 1110 | *pstatus = ctrl_read(ctlr_ptr, wpg_bbar, WPG_CTLR_INDEX); |
1111 | if (*pstatus == HPC_ERROR) { | 1111 | if (*pstatus == HPC_ERROR) { |
1112 | rc = HPC_ERROR; | 1112 | rc = HPC_ERROR; |
1113 | done = 1; | 1113 | done = 1; |
1114 | } | 1114 | } |
1115 | if (CTLR_WORKING (*pstatus) == HPC_CTLR_WORKING_NO) | 1115 | if (CTLR_WORKING(*pstatus) == HPC_CTLR_WORKING_NO) |
1116 | done = 1; | 1116 | done = 1; |
1117 | if (!done) { | 1117 | if (!done) { |
1118 | msleep(1000); | 1118 | msleep(1000); |
1119 | if (timeout < 1) { | 1119 | if (timeout < 1) { |
1120 | done = 1; | 1120 | done = 1; |
1121 | err ("HPCreadslot - Error ctlr timeout\n"); | 1121 | err("HPCreadslot - Error ctlr timeout\n"); |
1122 | rc = HPC_ERROR; | 1122 | rc = HPC_ERROR; |
1123 | } else | 1123 | } else |
1124 | timeout--; | 1124 | timeout--; |
1125 | } | 1125 | } |
1126 | } | 1126 | } |
1127 | debug_polling ("hpc_wait_ctlr_notworking - Exit rc[%x] status[%x]\n", rc, *pstatus); | 1127 | debug_polling("hpc_wait_ctlr_notworking - Exit rc[%x] status[%x]\n", rc, *pstatus); |
1128 | return rc; | 1128 | return rc; |
1129 | } | 1129 | } |