diff options
author | Kishon Vijay Abraham I <kishon@ti.com> | 2018-10-17 03:41:07 -0400 |
---|---|---|
committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-10-17 04:47:54 -0400 |
commit | b4f1af8352fda6926831b52caff37709bc895d05 (patch) | |
tree | 0300d18f41f25bbb755a3053c87974e4653e61e3 /drivers/pci/controller/dwc | |
parent | 44c747af2be7065d5a6417beacbab8f8a52b5556 (diff) |
PCI: keystone: Get number of outbound windows from DT
Instead of having a fixed outbound window count, get the number of
outbound windows from the device tree.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r-- | drivers/pci/controller/dwc/pci-keystone.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 1f14de0ef27f..608e40c4b991 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c | |||
@@ -54,7 +54,6 @@ | |||
54 | 54 | ||
55 | #define OB_SIZE 0x030 | 55 | #define OB_SIZE 0x030 |
56 | #define CFG_PCIM_WIN_SZ_IDX 3 | 56 | #define CFG_PCIM_WIN_SZ_IDX 3 |
57 | #define CFG_PCIM_WIN_CNT 32 | ||
58 | #define SPACE0_REMOTE_CFG_OFFSET 0x1000 | 57 | #define SPACE0_REMOTE_CFG_OFFSET 0x1000 |
59 | #define OB_OFFSET_INDEX(n) (0x200 + (8 * (n))) | 58 | #define OB_OFFSET_INDEX(n) (0x200 + (8 * (n))) |
60 | #define OB_OFFSET_HI(n) (0x204 + (8 * (n))) | 59 | #define OB_OFFSET_HI(n) (0x204 + (8 * (n))) |
@@ -111,6 +110,7 @@ struct keystone_pcie { | |||
111 | int num_msi_host_irqs; | 110 | int num_msi_host_irqs; |
112 | int msi_host_irqs[MAX_MSI_HOST_IRQS]; | 111 | int msi_host_irqs[MAX_MSI_HOST_IRQS]; |
113 | int num_lanes; | 112 | int num_lanes; |
113 | u32 num_viewport; | ||
114 | struct phy **phy; | 114 | struct phy **phy; |
115 | struct device_link **link; | 115 | struct device_link **link; |
116 | struct device_node *msi_intc_np; | 116 | struct device_node *msi_intc_np; |
@@ -341,6 +341,7 @@ static void ks_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie) | |||
341 | 341 | ||
342 | static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) | 342 | static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) |
343 | { | 343 | { |
344 | u32 num_viewport = ks_pcie->num_viewport; | ||
344 | struct dw_pcie *pci = ks_pcie->pci; | 345 | struct dw_pcie *pci = ks_pcie->pci; |
345 | struct pcie_port *pp = &pci->pp; | 346 | struct pcie_port *pp = &pci->pp; |
346 | u32 start = pp->mem->start, end = pp->mem->end; | 347 | u32 start = pp->mem->start, end = pp->mem->end; |
@@ -359,7 +360,7 @@ static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) | |||
359 | tr_size = (1 << (CFG_PCIM_WIN_SZ_IDX & 0x7)) * SZ_1M; | 360 | tr_size = (1 << (CFG_PCIM_WIN_SZ_IDX & 0x7)) * SZ_1M; |
360 | 361 | ||
361 | /* Using Direct 1:1 mapping of RC <-> PCI memory space */ | 362 | /* Using Direct 1:1 mapping of RC <-> PCI memory space */ |
362 | for (i = 0; (i < CFG_PCIM_WIN_CNT) && (start < end); i++) { | 363 | for (i = 0; (i < num_viewport) && (start < end); i++) { |
363 | ks_pcie_app_writel(ks_pcie, OB_OFFSET_INDEX(i), start | 1); | 364 | ks_pcie_app_writel(ks_pcie, OB_OFFSET_INDEX(i), start | 1); |
364 | ks_pcie_app_writel(ks_pcie, OB_OFFSET_HI(i), 0); | 365 | ks_pcie_app_writel(ks_pcie, OB_OFFSET_HI(i), 0); |
365 | start += tr_size; | 366 | start += tr_size; |
@@ -898,6 +899,7 @@ static int __init ks_pcie_probe(struct platform_device *pdev) | |||
898 | struct dw_pcie *pci; | 899 | struct dw_pcie *pci; |
899 | struct keystone_pcie *ks_pcie; | 900 | struct keystone_pcie *ks_pcie; |
900 | struct device_link **link; | 901 | struct device_link **link; |
902 | u32 num_viewport; | ||
901 | struct phy **phy; | 903 | struct phy **phy; |
902 | u32 num_lanes; | 904 | u32 num_lanes; |
903 | char name[10]; | 905 | char name[10]; |
@@ -915,6 +917,12 @@ static int __init ks_pcie_probe(struct platform_device *pdev) | |||
915 | pci->dev = dev; | 917 | pci->dev = dev; |
916 | pci->ops = &ks_pcie_dw_pcie_ops; | 918 | pci->ops = &ks_pcie_dw_pcie_ops; |
917 | 919 | ||
920 | ret = of_property_read_u32(np, "num-viewport", &num_viewport); | ||
921 | if (ret < 0) { | ||
922 | dev_err(dev, "unable to read *num-viewport* property\n"); | ||
923 | return ret; | ||
924 | } | ||
925 | |||
918 | ret = of_property_read_u32(np, "num-lanes", &num_lanes); | 926 | ret = of_property_read_u32(np, "num-lanes", &num_lanes); |
919 | if (ret) | 927 | if (ret) |
920 | num_lanes = 1; | 928 | num_lanes = 1; |
@@ -949,6 +957,7 @@ static int __init ks_pcie_probe(struct platform_device *pdev) | |||
949 | ks_pcie->pci = pci; | 957 | ks_pcie->pci = pci; |
950 | ks_pcie->link = link; | 958 | ks_pcie->link = link; |
951 | ks_pcie->num_lanes = num_lanes; | 959 | ks_pcie->num_lanes = num_lanes; |
960 | ks_pcie->num_viewport = num_viewport; | ||
952 | ks_pcie->phy = phy; | 961 | ks_pcie->phy = phy; |
953 | 962 | ||
954 | ret = ks_pcie_enable_phy(ks_pcie); | 963 | ret = ks_pcie_enable_phy(ks_pcie); |