diff options
author | Gustavo Pimentel <gustavo.pimentel@synopsys.com> | 2018-07-19 04:32:11 -0400 |
---|---|---|
committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-07-19 06:33:58 -0400 |
commit | 4e965ede1856ed62c7ac8b7ad905a4a285e4a9f3 (patch) | |
tree | 38d418faf5edaac16c3991f8ce09f0d63193ac63 /drivers/pci/controller/dwc | |
parent | 53dd0c51f16be5f215d3ecad435062df99ee29ae (diff) |
PCI: dwc: Fix EP link notification implementation
Move specific features settings from EP shared code
(pcie-designware-ep.c) to the driver (pcie-designware-plat.c).
Previous implementation disables the EP link notification
by default for all SoCs that uses EP DesignWare IP, which affects
directly the dra7xx and artpec6 SoCs.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-ep.c | 14 | ||||
-rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-plat.c | 3 |
2 files changed, 9 insertions, 8 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 8650416f6f9e..04092a7aba89 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c | |||
@@ -386,15 +386,18 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) | |||
386 | return -ENOMEM; | 386 | return -ENOMEM; |
387 | ep->outbound_addr = addr; | 387 | ep->outbound_addr = addr; |
388 | 388 | ||
389 | if (ep->ops->ep_init) | ||
390 | ep->ops->ep_init(ep); | ||
391 | |||
392 | epc = devm_pci_epc_create(dev, &epc_ops); | 389 | epc = devm_pci_epc_create(dev, &epc_ops); |
393 | if (IS_ERR(epc)) { | 390 | if (IS_ERR(epc)) { |
394 | dev_err(dev, "Failed to create epc device\n"); | 391 | dev_err(dev, "Failed to create epc device\n"); |
395 | return PTR_ERR(epc); | 392 | return PTR_ERR(epc); |
396 | } | 393 | } |
397 | 394 | ||
395 | ep->epc = epc; | ||
396 | epc_set_drvdata(epc, ep); | ||
397 | |||
398 | if (ep->ops->ep_init) | ||
399 | ep->ops->ep_init(ep); | ||
400 | |||
398 | ret = of_property_read_u8(np, "max-functions", &epc->max_functions); | 401 | ret = of_property_read_u8(np, "max-functions", &epc->max_functions); |
399 | if (ret < 0) | 402 | if (ret < 0) |
400 | epc->max_functions = 1; | 403 | epc->max_functions = 1; |
@@ -413,11 +416,6 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) | |||
413 | return -ENOMEM; | 416 | return -ENOMEM; |
414 | } | 417 | } |
415 | 418 | ||
416 | epc->features = EPC_FEATURE_NO_LINKUP_NOTIFIER; | ||
417 | EPC_FEATURE_SET_BAR(epc->features, BAR_0); | ||
418 | |||
419 | ep->epc = epc; | ||
420 | epc_set_drvdata(epc, ep); | ||
421 | dw_pcie_setup(pci); | 419 | dw_pcie_setup(pci); |
422 | 420 | ||
423 | return 0; | 421 | return 0; |
diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c index 6e048c0b67f2..a37dc92a03c7 100644 --- a/drivers/pci/controller/dwc/pcie-designware-plat.c +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c | |||
@@ -70,10 +70,13 @@ static const struct dw_pcie_ops dw_pcie_ops = { | |||
70 | static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep) | 70 | static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep) |
71 | { | 71 | { |
72 | struct dw_pcie *pci = to_dw_pcie_from_ep(ep); | 72 | struct dw_pcie *pci = to_dw_pcie_from_ep(ep); |
73 | struct pci_epc *epc = ep->epc; | ||
73 | enum pci_barno bar; | 74 | enum pci_barno bar; |
74 | 75 | ||
75 | for (bar = BAR_0; bar <= BAR_5; bar++) | 76 | for (bar = BAR_0; bar <= BAR_5; bar++) |
76 | dw_pcie_ep_reset_bar(pci, bar); | 77 | dw_pcie_ep_reset_bar(pci, bar); |
78 | |||
79 | epc->features |= EPC_FEATURE_NO_LINKUP_NOTIFIER; | ||
77 | } | 80 | } |
78 | 81 | ||
79 | static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, | 82 | static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, |