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authorKishon Vijay Abraham I <kishon@ti.com>2018-10-17 03:41:14 -0400
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2018-10-17 04:59:02 -0400
commit261de72f0169fd9e5bf7113ad9b52e8678f2fdf0 (patch)
tree20780c6cb022c3a74ef7a2bb57fffb4fdd45c214 /drivers/pci/controller/dwc
parentc0b8558648c29a86c036de89fc3cc7909587aefd (diff)
PCI: keystone: Cleanup macros defined in pci-keystone.c
No functional change. Cleanup macros defined in pci-keystone.c by removing unused macros, grouping the macros and aligning it properly. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r--drivers/pci/controller/dwc/pci-keystone.c41
1 files changed, 16 insertions, 25 deletions
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 0cfeaad1d013..14f2b0b4ed5e 100644
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -28,21 +28,14 @@
28 28
29#include "pcie-designware.h" 29#include "pcie-designware.h"
30 30
31#define DRIVER_NAME "keystone-pcie"
32
33#define PCIE_VENDORID_MASK 0xffff 31#define PCIE_VENDORID_MASK 0xffff
34#define PCIE_DEVICEID_SHIFT 16 32#define PCIE_DEVICEID_SHIFT 16
35 33
36/* DEV_STAT_CTRL */
37#define PCIE_CAP_BASE 0x70
38
39/* Application register defines */
40#define LTSSM_EN_VAL BIT(0)
41#define DBI_CS2 BIT(5)
42#define OB_XLAT_EN_VAL BIT(1)
43
44/* Application registers */ 34/* Application registers */
45#define CMD_STATUS 0x004 35#define CMD_STATUS 0x004
36#define LTSSM_EN_VAL BIT(0)
37#define OB_XLAT_EN_VAL BIT(1)
38#define DBI_CS2 BIT(5)
46 39
47#define CFG_SETUP 0x008 40#define CFG_SETUP 0x008
48#define CFG_BUS(x) (((x) & 0xff) << 16) 41#define CFG_BUS(x) (((x) & 0xff) << 16)
@@ -70,27 +63,25 @@
70#define IRQ_STATUS 0x184 63#define IRQ_STATUS 0x184
71#define MSI_IRQ_OFFSET 4 64#define MSI_IRQ_OFFSET 4
72 65
73/* Error IRQ bits */
74#define ERR_AER BIT(5) /* ECRC error */
75#define ERR_AXI BIT(4) /* AXI tag lookup fatal error */
76#define ERR_CORR BIT(3) /* Correctable error */
77#define ERR_NONFATAL BIT(2) /* Non-fatal error */
78#define ERR_FATAL BIT(1) /* Fatal error */
79#define ERR_SYS BIT(0) /* System (fatal, non-fatal, or correctable) */
80#define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \
81 ERR_NONFATAL | ERR_FATAL | ERR_SYS)
82#define ERR_IRQ_STATUS 0x1c4 66#define ERR_IRQ_STATUS 0x1c4
83#define ERR_IRQ_ENABLE_SET 0x1c8 67#define ERR_IRQ_ENABLE_SET 0x1c8
84#define ERR_IRQ_ENABLE_CLR 0x1cc 68#define ERR_AER BIT(5) /* ECRC error */
69#define ERR_AXI BIT(4) /* AXI tag lookup fatal error */
70#define ERR_CORR BIT(3) /* Correctable error */
71#define ERR_NONFATAL BIT(2) /* Non-fatal error */
72#define ERR_FATAL BIT(1) /* Fatal error */
73#define ERR_SYS BIT(0) /* System error */
74#define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \
75 ERR_NONFATAL | ERR_FATAL | ERR_SYS)
85 76
86#define MAX_MSI_HOST_IRQS 8 77#define MAX_MSI_HOST_IRQS 8
87/* PCIE controller device IDs */ 78/* PCIE controller device IDs */
88#define PCIE_RC_K2HK 0xb008 79#define PCIE_RC_K2HK 0xb008
89#define PCIE_RC_K2E 0xb009 80#define PCIE_RC_K2E 0xb009
90#define PCIE_RC_K2L 0xb00a 81#define PCIE_RC_K2L 0xb00a
91#define PCIE_RC_K2G 0xb00b 82#define PCIE_RC_K2G 0xb00b
92 83
93#define to_keystone_pcie(x) dev_get_drvdata((x)->dev) 84#define to_keystone_pcie(x) dev_get_drvdata((x)->dev)
94 85
95struct keystone_pcie { 86struct keystone_pcie {
96 struct dw_pcie *pci; 87 struct dw_pcie *pci;