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author | Gustavo Pimentel <gustavo.pimentel@synopsys.com> | 2018-11-23 12:00:21 -0500 |
---|---|---|
committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-11-27 06:23:31 -0500 |
commit | 15cb127e3c8f6232096d5dba6a5b4046bc292d70 (patch) | |
tree | 6c48ae917e48b28cf43279c84ca9161998a9c4f1 /drivers/pci/controller/dwc | |
parent | c6fd6fe9dea44732cdcd970f1130b8cc50ad685a (diff) |
PCI: dwc: Fix MSI-X EP framework address calculation bug
Fix an error caused by 3-bit right rotation on offset address
calculation of MSI-X table in dw_pcie_ep_raise_msix_irq().
The initial testing code was setting by default the offset address of
MSI-X table to zero, so that even with a 3-bit right rotation the
computed result would still be zero and valid, therefore this bug went
unnoticed.
Fixes: beb4641a787d ("PCI: dwc: Add MSI-X callbacks handler")
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-ep.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 1e7b02221eac..de8635af4cde 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c | |||
@@ -440,7 +440,6 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, | |||
440 | tbl_offset = dw_pcie_readl_dbi(pci, reg); | 440 | tbl_offset = dw_pcie_readl_dbi(pci, reg); |
441 | bir = (tbl_offset & PCI_MSIX_TABLE_BIR); | 441 | bir = (tbl_offset & PCI_MSIX_TABLE_BIR); |
442 | tbl_offset &= PCI_MSIX_TABLE_OFFSET; | 442 | tbl_offset &= PCI_MSIX_TABLE_OFFSET; |
443 | tbl_offset >>= 3; | ||
444 | 443 | ||
445 | reg = PCI_BASE_ADDRESS_0 + (4 * bir); | 444 | reg = PCI_BASE_ADDRESS_0 + (4 * bir); |
446 | bar_addr_upper = 0; | 445 | bar_addr_upper = 0; |