diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-01-05 20:57:34 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-01-05 20:57:34 -0500 |
commit | 926b02d3eb547daa1d56cf9b586f31b270488b77 (patch) | |
tree | 839c5f5ac6ab4f3c50056360da1b8d1af181d6b1 /drivers/pci/controller/dwc/pcie-designware.c | |
parent | cf26057a9441173ad552e90cea3344607075c9ad (diff) | |
parent | 72199051af6205049e96ee7ed34f4fc5f44d1baf (diff) |
Merge tag 'pci-v4.21-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
- Remove unused lists from ASPM pcie_link_state (Frederick Lawler)
- Fix Broadcom CNB20LE host bridge unintended sign extension (Colin Ian
King)
- Expand Kconfig "PF" acronyms (Randy Dunlap)
- Update MAINTAINERS for arch/x86/kernel/early-quirks.c (Bjorn Helgaas)
- Add missing include to drivers/pci.h (Alexandru Gagniuc)
- Override Synopsys USB 3.x HAPS device class so dwc3-haps can claim it
instead of xhci (Thinh Nguyen)
- Clean up P2PDMA documentation (Randy Dunlap)
- Allow runtime PM even if driver doesn't supply callbacks (Jarkko
Nikula)
- Remove status check after submitting Switchtec MRPC Firmware Download
commands to avoid Completion Timeouts (Kelvin Cao)
- Set Switchtec coherent DMA mask to allow 64-bit DMA (Boris Glimcher)
- Fix Switchtec SWITCHTEC_IOCTL_EVENT_IDX_ALL flag overwrite issue
(Joey Zhang)
- Enable write combining for Switchtec MRPC Input buffers (Kelvin Cao)
- Add Switchtec MRPC DMA mode support (Wesley Sheng)
- Skip VF scanning on powerpc, which does this in firmware (Sebastian
Ott)
- Add Amlogic Meson PCIe controller driver and DT bindings (Yue Wang)
- Constify histb dw_pcie_host_ops structure (Julia Lawall)
- Support multiple power domains for imx6 (Leonard Crestez)
- Constify layerscape driver data (Stefan Agner)
- Update imx6 Kconfig to allow imx6 PCIe in imx7 kernel (Trent Piepho)
- Support armada8k GPIO reset (Baruch Siach)
- Support suspend/resume support on imx6 (Leonard Crestez)
- Don't hard-code DesignWare DBI/ATU offst (Stephen Warren)
- Skip i.MX6 PHY setup on i.MX7D (Andrey Smirnov)
- Remove Jianguo Sun from HiSilicon STB maintainers (Lorenzo Pieralisi)
- Mask DesignWare interrupts instead of disabling them to avoid lost
interrupts (Marc Zyngier)
- Add locking when acking DesignWare interrupts (Marc Zyngier)
- Ack DesignWare interrupts in the proper callbacks (Marc Zyngier)
- Use devm resource parser in mediatek (Honghui Zhang)
- Remove unused mediatek "num-lanes" DT property (Honghui Zhang)
- Add UniPhier PCIe controller driver and DT bindings (Kunihiko
Hayashi)
- Enable MSI for imx6 downstream components (Richard Zhu)
* tag 'pci-v4.21-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (40 commits)
PCI: imx: Enable MSI from downstream components
s390/pci: skip VF scanning
PCI/IOV: Add flag so platforms can skip VF scanning
PCI/IOV: Factor out sriov_add_vfs()
PCI: uniphier: Add UniPhier PCIe host controller support
dt-bindings: PCI: Add UniPhier PCIe host controller description
PCI: amlogic: Add the Amlogic Meson PCIe controller driver
dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller
arm64: dts: mt7622: Remove un-used property for PCIe
arm: dts: mt7623: Remove un-used property for PCIe
dt-bindings: PCI: MediaTek: Remove un-used property
PCI: mediatek: Remove un-used variant in struct mtk_pcie_port
MAINTAINERS: Remove Jianguo Sun from HiSilicon STB DWC entry
PCI: dwc: Don't hard-code DBI/ATU offset
PCI: imx: Add imx6sx suspend/resume support
PCI: armada8k: Add support for gpio controlled reset signal
PCI: dwc: Adjust Kconfig to allow IMX6 PCIe host on IMX7
PCI: dwc: layerscape: Constify driver data
PCI: imx: Add multi-pd support
PCI: Override Synopsys USB 3.x HAPS device class
...
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.c')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 2153956a0b20..93ef8c31fb39 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c | |||
@@ -93,7 +93,7 @@ static u32 dw_pcie_readl_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg) | |||
93 | { | 93 | { |
94 | u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); | 94 | u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); |
95 | 95 | ||
96 | return dw_pcie_readl_dbi(pci, offset + reg); | 96 | return dw_pcie_readl_atu(pci, offset + reg); |
97 | } | 97 | } |
98 | 98 | ||
99 | static void dw_pcie_writel_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg, | 99 | static void dw_pcie_writel_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg, |
@@ -101,7 +101,7 @@ static void dw_pcie_writel_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg, | |||
101 | { | 101 | { |
102 | u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); | 102 | u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); |
103 | 103 | ||
104 | dw_pcie_writel_dbi(pci, offset + reg, val); | 104 | dw_pcie_writel_atu(pci, offset + reg, val); |
105 | } | 105 | } |
106 | 106 | ||
107 | static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, | 107 | static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, |
@@ -187,7 +187,7 @@ static u32 dw_pcie_readl_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg) | |||
187 | { | 187 | { |
188 | u32 offset = PCIE_GET_ATU_INB_UNR_REG_OFFSET(index); | 188 | u32 offset = PCIE_GET_ATU_INB_UNR_REG_OFFSET(index); |
189 | 189 | ||
190 | return dw_pcie_readl_dbi(pci, offset + reg); | 190 | return dw_pcie_readl_atu(pci, offset + reg); |
191 | } | 191 | } |
192 | 192 | ||
193 | static void dw_pcie_writel_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg, | 193 | static void dw_pcie_writel_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg, |
@@ -195,7 +195,7 @@ static void dw_pcie_writel_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg, | |||
195 | { | 195 | { |
196 | u32 offset = PCIE_GET_ATU_INB_UNR_REG_OFFSET(index); | 196 | u32 offset = PCIE_GET_ATU_INB_UNR_REG_OFFSET(index); |
197 | 197 | ||
198 | dw_pcie_writel_dbi(pci, offset + reg, val); | 198 | dw_pcie_writel_atu(pci, offset + reg, val); |
199 | } | 199 | } |
200 | 200 | ||
201 | static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, | 201 | static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, |