diff options
author | Dave Jiang <dave.jiang@intel.com> | 2017-11-20 12:24:08 -0500 |
---|---|---|
committer | Jon Mason <jdmason@kudzu.us> | 2018-01-28 22:17:23 -0500 |
commit | 3f7756728ef4b0155e4f42d6b8a862dd7c38a9c2 (patch) | |
tree | c77f489a8dad0fa51575a143852789dde47eb4f1 /drivers/ntb/hw/intel/ntb_hw_intel.h | |
parent | 0ed08f829b10531c35887fd781d80ef3bfbb1cd9 (diff) |
ntb: remove Intel Atom NTB driver support
Removing dead code since this is not being used.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Diffstat (limited to 'drivers/ntb/hw/intel/ntb_hw_intel.h')
-rw-r--r-- | drivers/ntb/hw/intel/ntb_hw_intel.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.h b/drivers/ntb/hw/intel/ntb_hw_intel.h index 2d6c38afb128..4415aa7ea775 100644 --- a/drivers/ntb/hw/intel/ntb_hw_intel.h +++ b/drivers/ntb/hw/intel/ntb_hw_intel.h | |||
@@ -66,7 +66,6 @@ | |||
66 | #define PCI_DEVICE_ID_INTEL_NTB_B2B_HSX 0x2F0D | 66 | #define PCI_DEVICE_ID_INTEL_NTB_B2B_HSX 0x2F0D |
67 | #define PCI_DEVICE_ID_INTEL_NTB_PS_HSX 0x2F0E | 67 | #define PCI_DEVICE_ID_INTEL_NTB_PS_HSX 0x2F0E |
68 | #define PCI_DEVICE_ID_INTEL_NTB_SS_HSX 0x2F0F | 68 | #define PCI_DEVICE_ID_INTEL_NTB_SS_HSX 0x2F0F |
69 | #define PCI_DEVICE_ID_INTEL_NTB_B2B_BWD 0x0C4E | ||
70 | #define PCI_DEVICE_ID_INTEL_NTB_B2B_BDX 0x6F0D | 69 | #define PCI_DEVICE_ID_INTEL_NTB_B2B_BDX 0x6F0D |
71 | #define PCI_DEVICE_ID_INTEL_NTB_PS_BDX 0x6F0E | 70 | #define PCI_DEVICE_ID_INTEL_NTB_PS_BDX 0x6F0E |
72 | #define PCI_DEVICE_ID_INTEL_NTB_SS_BDX 0x6F0F | 71 | #define PCI_DEVICE_ID_INTEL_NTB_SS_BDX 0x6F0F |
@@ -196,63 +195,6 @@ | |||
196 | #define SKX_DB_TOTAL_SHIFT 33 | 195 | #define SKX_DB_TOTAL_SHIFT 33 |
197 | #define SKX_SPAD_COUNT 16 | 196 | #define SKX_SPAD_COUNT 16 |
198 | 197 | ||
199 | /* Intel Atom hardware */ | ||
200 | |||
201 | #define ATOM_SBAR2XLAT_OFFSET 0x0008 | ||
202 | #define ATOM_PDOORBELL_OFFSET 0x0020 | ||
203 | #define ATOM_PDBMSK_OFFSET 0x0028 | ||
204 | #define ATOM_NTBCNTL_OFFSET 0x0060 | ||
205 | #define ATOM_SPAD_OFFSET 0x0080 | ||
206 | #define ATOM_PPD_OFFSET 0x00d4 | ||
207 | #define ATOM_PBAR2XLAT_OFFSET 0x8008 | ||
208 | #define ATOM_B2B_DOORBELL_OFFSET 0x8020 | ||
209 | #define ATOM_B2B_SPAD_OFFSET 0x8080 | ||
210 | #define ATOM_SPCICMD_OFFSET 0xb004 | ||
211 | #define ATOM_LINK_STATUS_OFFSET 0xb052 | ||
212 | #define ATOM_ERRCORSTS_OFFSET 0xb110 | ||
213 | #define ATOM_IP_BASE 0xc000 | ||
214 | #define ATOM_DESKEWSTS_OFFSET (ATOM_IP_BASE + 0x3024) | ||
215 | #define ATOM_LTSSMERRSTS0_OFFSET (ATOM_IP_BASE + 0x3180) | ||
216 | #define ATOM_LTSSMSTATEJMP_OFFSET (ATOM_IP_BASE + 0x3040) | ||
217 | #define ATOM_IBSTERRRCRVSTS0_OFFSET (ATOM_IP_BASE + 0x3324) | ||
218 | #define ATOM_MODPHY_PCSREG4 0x1c004 | ||
219 | #define ATOM_MODPHY_PCSREG6 0x1c006 | ||
220 | |||
221 | #define ATOM_PPD_INIT_LINK 0x0008 | ||
222 | #define ATOM_PPD_CONN_MASK 0x0300 | ||
223 | #define ATOM_PPD_CONN_TRANSPARENT 0x0000 | ||
224 | #define ATOM_PPD_CONN_B2B 0x0100 | ||
225 | #define ATOM_PPD_CONN_RP 0x0200 | ||
226 | #define ATOM_PPD_DEV_MASK 0x1000 | ||
227 | #define ATOM_PPD_DEV_USD 0x0000 | ||
228 | #define ATOM_PPD_DEV_DSD 0x1000 | ||
229 | #define ATOM_PPD_TOPO_MASK (ATOM_PPD_CONN_MASK | ATOM_PPD_DEV_MASK) | ||
230 | #define ATOM_PPD_TOPO_PRI_USD (ATOM_PPD_CONN_TRANSPARENT | ATOM_PPD_DEV_USD) | ||
231 | #define ATOM_PPD_TOPO_PRI_DSD (ATOM_PPD_CONN_TRANSPARENT | ATOM_PPD_DEV_DSD) | ||
232 | #define ATOM_PPD_TOPO_SEC_USD (ATOM_PPD_CONN_RP | ATOM_PPD_DEV_USD) | ||
233 | #define ATOM_PPD_TOPO_SEC_DSD (ATOM_PPD_CONN_RP | ATOM_PPD_DEV_DSD) | ||
234 | #define ATOM_PPD_TOPO_B2B_USD (ATOM_PPD_CONN_B2B | ATOM_PPD_DEV_USD) | ||
235 | #define ATOM_PPD_TOPO_B2B_DSD (ATOM_PPD_CONN_B2B | ATOM_PPD_DEV_DSD) | ||
236 | |||
237 | #define ATOM_MW_COUNT 2 | ||
238 | #define ATOM_DB_COUNT 34 | ||
239 | #define ATOM_DB_VALID_MASK (BIT_ULL(ATOM_DB_COUNT) - 1) | ||
240 | #define ATOM_DB_MSIX_VECTOR_COUNT 34 | ||
241 | #define ATOM_DB_MSIX_VECTOR_SHIFT 1 | ||
242 | #define ATOM_DB_TOTAL_SHIFT 34 | ||
243 | #define ATOM_SPAD_COUNT 16 | ||
244 | |||
245 | #define ATOM_NTB_CTL_DOWN_BIT BIT(16) | ||
246 | #define ATOM_NTB_CTL_ACTIVE(x) !(x & ATOM_NTB_CTL_DOWN_BIT) | ||
247 | |||
248 | #define ATOM_DESKEWSTS_DBERR BIT(15) | ||
249 | #define ATOM_LTSSMERRSTS0_UNEXPECTEDEI BIT(20) | ||
250 | #define ATOM_LTSSMSTATEJMP_FORCEDETECT BIT(2) | ||
251 | #define ATOM_IBIST_ERR_OFLOW 0x7FFF7FFF | ||
252 | |||
253 | #define ATOM_LINK_HB_TIMEOUT msecs_to_jiffies(1000) | ||
254 | #define ATOM_LINK_RECOVERY_TIME msecs_to_jiffies(500) | ||
255 | |||
256 | /* Ntb control and link status */ | 198 | /* Ntb control and link status */ |
257 | 199 | ||
258 | #define NTB_CTL_CFG_LOCK BIT(0) | 200 | #define NTB_CTL_CFG_LOCK BIT(0) |