diff options
author | David S. Miller <davem@davemloft.net> | 2014-11-19 15:28:58 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-11-19 15:28:58 -0500 |
commit | ddecab1abc97b45168599a52c334a7f9910d5a5a (patch) | |
tree | aaacf93b2643afc07f7c62972723555791255c87 /drivers/net | |
parent | 9737c6ab7afbc950e997ef80cba2c40dbbd16ea4 (diff) | |
parent | 80646733f11c2e9de3b6339f7e635047e6087280 (diff) |
Merge tag 'linux-can-fixes-for-3.18-20141118' of git://gitorious.org/linux-can/linux-can
Marc Kleine-Budde says:
====================
pull-request: can 2014-11-18
this is a pull request of 17 patches for net/master for the v3.18 release
cycle.
The last patch of this pull request ("can: m_can: update to support CAN FD
features") adds, as the description says, a new feature to the m_can driver. As
the m_can driver has been added in v3.18 there is no risk of causing a
regression. Give me a note if this is not okay and I'll create a new pull
request without it.
There is a patch for the CAN infrastructure by Thomas Körper which fixes
calling kfree_skb() from interrupt context. Roman Fietze fixes a typo also in
the infrastructure. A patch by Dong Aisheng adds a generic helper function to
tell if a skb is normal CAN or CAN-FD frame. Alexey Khoroshilov of the Linux
Driver Verification project fixes a memory leak in the esd_usb2 driver. Two
patches by Sudip Mukherjee remove unused variables and fixe the signess of a
variable. Three patches by me add the missing .ndo_change_mtu callback to the
xilinx_can, rcar_can and gs_usb driver.
The remaining patches improve the m_can driver: David Cohen adds the missing
CONFIG_HAS_IOMEM dependency. Dong Aisheng provides 6 bugfix patches (most
important: missing RAM init, sleep in NAPI poll, dlc in RTR). While the last of
his patches adds CAN FD support to the driver.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/can/dev.c | 4 | ||||
-rw-r--r-- | drivers/net/can/m_can/Kconfig | 1 | ||||
-rw-r--r-- | drivers/net/can/m_can/m_can.c | 219 | ||||
-rw-r--r-- | drivers/net/can/rcar_can.c | 1 | ||||
-rw-r--r-- | drivers/net/can/sja1000/kvaser_pci.c | 5 | ||||
-rw-r--r-- | drivers/net/can/usb/ems_usb.c | 3 | ||||
-rw-r--r-- | drivers/net/can/usb/esd_usb2.c | 3 | ||||
-rw-r--r-- | drivers/net/can/usb/gs_usb.c | 1 | ||||
-rw-r--r-- | drivers/net/can/xilinx_can.c | 4 |
9 files changed, 177 insertions, 64 deletions
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c index 02492d241e4c..2cfe5012e4e5 100644 --- a/drivers/net/can/dev.c +++ b/drivers/net/can/dev.c | |||
@@ -110,7 +110,7 @@ static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt, | |||
110 | long rate; | 110 | long rate; |
111 | u64 v64; | 111 | u64 v64; |
112 | 112 | ||
113 | /* Use CIA recommended sample points */ | 113 | /* Use CiA recommended sample points */ |
114 | if (bt->sample_point) { | 114 | if (bt->sample_point) { |
115 | sampl_pt = bt->sample_point; | 115 | sampl_pt = bt->sample_point; |
116 | } else { | 116 | } else { |
@@ -382,7 +382,7 @@ void can_free_echo_skb(struct net_device *dev, unsigned int idx) | |||
382 | BUG_ON(idx >= priv->echo_skb_max); | 382 | BUG_ON(idx >= priv->echo_skb_max); |
383 | 383 | ||
384 | if (priv->echo_skb[idx]) { | 384 | if (priv->echo_skb[idx]) { |
385 | kfree_skb(priv->echo_skb[idx]); | 385 | dev_kfree_skb_any(priv->echo_skb[idx]); |
386 | priv->echo_skb[idx] = NULL; | 386 | priv->echo_skb[idx] = NULL; |
387 | } | 387 | } |
388 | } | 388 | } |
diff --git a/drivers/net/can/m_can/Kconfig b/drivers/net/can/m_can/Kconfig index fca5482c09ac..04f20dd39007 100644 --- a/drivers/net/can/m_can/Kconfig +++ b/drivers/net/can/m_can/Kconfig | |||
@@ -1,4 +1,5 @@ | |||
1 | config CAN_M_CAN | 1 | config CAN_M_CAN |
2 | depends on HAS_IOMEM | ||
2 | tristate "Bosch M_CAN devices" | 3 | tristate "Bosch M_CAN devices" |
3 | ---help--- | 4 | ---help--- |
4 | Say Y here if you want to support for Bosch M_CAN controller. | 5 | Say Y here if you want to support for Bosch M_CAN controller. |
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c index 10d571eaed85..d7bc462aafdc 100644 --- a/drivers/net/can/m_can/m_can.c +++ b/drivers/net/can/m_can/m_can.c | |||
@@ -105,14 +105,36 @@ enum m_can_mram_cfg { | |||
105 | MRAM_CFG_NUM, | 105 | MRAM_CFG_NUM, |
106 | }; | 106 | }; |
107 | 107 | ||
108 | /* Fast Bit Timing & Prescaler Register (FBTP) */ | ||
109 | #define FBTR_FBRP_MASK 0x1f | ||
110 | #define FBTR_FBRP_SHIFT 16 | ||
111 | #define FBTR_FTSEG1_SHIFT 8 | ||
112 | #define FBTR_FTSEG1_MASK (0xf << FBTR_FTSEG1_SHIFT) | ||
113 | #define FBTR_FTSEG2_SHIFT 4 | ||
114 | #define FBTR_FTSEG2_MASK (0x7 << FBTR_FTSEG2_SHIFT) | ||
115 | #define FBTR_FSJW_SHIFT 0 | ||
116 | #define FBTR_FSJW_MASK 0x3 | ||
117 | |||
108 | /* Test Register (TEST) */ | 118 | /* Test Register (TEST) */ |
109 | #define TEST_LBCK BIT(4) | 119 | #define TEST_LBCK BIT(4) |
110 | 120 | ||
111 | /* CC Control Register(CCCR) */ | 121 | /* CC Control Register(CCCR) */ |
112 | #define CCCR_TEST BIT(7) | 122 | #define CCCR_TEST BIT(7) |
113 | #define CCCR_MON BIT(5) | 123 | #define CCCR_CMR_MASK 0x3 |
114 | #define CCCR_CCE BIT(1) | 124 | #define CCCR_CMR_SHIFT 10 |
115 | #define CCCR_INIT BIT(0) | 125 | #define CCCR_CMR_CANFD 0x1 |
126 | #define CCCR_CMR_CANFD_BRS 0x2 | ||
127 | #define CCCR_CMR_CAN 0x3 | ||
128 | #define CCCR_CME_MASK 0x3 | ||
129 | #define CCCR_CME_SHIFT 8 | ||
130 | #define CCCR_CME_CAN 0 | ||
131 | #define CCCR_CME_CANFD 0x1 | ||
132 | #define CCCR_CME_CANFD_BRS 0x2 | ||
133 | #define CCCR_TEST BIT(7) | ||
134 | #define CCCR_MON BIT(5) | ||
135 | #define CCCR_CCE BIT(1) | ||
136 | #define CCCR_INIT BIT(0) | ||
137 | #define CCCR_CANFD 0x10 | ||
116 | 138 | ||
117 | /* Bit Timing & Prescaler Register (BTP) */ | 139 | /* Bit Timing & Prescaler Register (BTP) */ |
118 | #define BTR_BRP_MASK 0x3ff | 140 | #define BTR_BRP_MASK 0x3ff |
@@ -204,6 +226,7 @@ enum m_can_mram_cfg { | |||
204 | 226 | ||
205 | /* Rx Buffer / FIFO Element Size Configuration (RXESC) */ | 227 | /* Rx Buffer / FIFO Element Size Configuration (RXESC) */ |
206 | #define M_CAN_RXESC_8BYTES 0x0 | 228 | #define M_CAN_RXESC_8BYTES 0x0 |
229 | #define M_CAN_RXESC_64BYTES 0x777 | ||
207 | 230 | ||
208 | /* Tx Buffer Configuration(TXBC) */ | 231 | /* Tx Buffer Configuration(TXBC) */ |
209 | #define TXBC_NDTB_OFF 16 | 232 | #define TXBC_NDTB_OFF 16 |
@@ -211,6 +234,7 @@ enum m_can_mram_cfg { | |||
211 | 234 | ||
212 | /* Tx Buffer Element Size Configuration(TXESC) */ | 235 | /* Tx Buffer Element Size Configuration(TXESC) */ |
213 | #define TXESC_TBDS_8BYTES 0x0 | 236 | #define TXESC_TBDS_8BYTES 0x0 |
237 | #define TXESC_TBDS_64BYTES 0x7 | ||
214 | 238 | ||
215 | /* Tx Event FIFO Con.guration (TXEFC) */ | 239 | /* Tx Event FIFO Con.guration (TXEFC) */ |
216 | #define TXEFC_EFS_OFF 16 | 240 | #define TXEFC_EFS_OFF 16 |
@@ -219,11 +243,11 @@ enum m_can_mram_cfg { | |||
219 | /* Message RAM Configuration (in bytes) */ | 243 | /* Message RAM Configuration (in bytes) */ |
220 | #define SIDF_ELEMENT_SIZE 4 | 244 | #define SIDF_ELEMENT_SIZE 4 |
221 | #define XIDF_ELEMENT_SIZE 8 | 245 | #define XIDF_ELEMENT_SIZE 8 |
222 | #define RXF0_ELEMENT_SIZE 16 | 246 | #define RXF0_ELEMENT_SIZE 72 |
223 | #define RXF1_ELEMENT_SIZE 16 | 247 | #define RXF1_ELEMENT_SIZE 72 |
224 | #define RXB_ELEMENT_SIZE 16 | 248 | #define RXB_ELEMENT_SIZE 16 |
225 | #define TXE_ELEMENT_SIZE 8 | 249 | #define TXE_ELEMENT_SIZE 8 |
226 | #define TXB_ELEMENT_SIZE 16 | 250 | #define TXB_ELEMENT_SIZE 72 |
227 | 251 | ||
228 | /* Message RAM Elements */ | 252 | /* Message RAM Elements */ |
229 | #define M_CAN_FIFO_ID 0x0 | 253 | #define M_CAN_FIFO_ID 0x0 |
@@ -231,11 +255,17 @@ enum m_can_mram_cfg { | |||
231 | #define M_CAN_FIFO_DATA(n) (0x8 + ((n) << 2)) | 255 | #define M_CAN_FIFO_DATA(n) (0x8 + ((n) << 2)) |
232 | 256 | ||
233 | /* Rx Buffer Element */ | 257 | /* Rx Buffer Element */ |
258 | /* R0 */ | ||
234 | #define RX_BUF_ESI BIT(31) | 259 | #define RX_BUF_ESI BIT(31) |
235 | #define RX_BUF_XTD BIT(30) | 260 | #define RX_BUF_XTD BIT(30) |
236 | #define RX_BUF_RTR BIT(29) | 261 | #define RX_BUF_RTR BIT(29) |
262 | /* R1 */ | ||
263 | #define RX_BUF_ANMF BIT(31) | ||
264 | #define RX_BUF_EDL BIT(21) | ||
265 | #define RX_BUF_BRS BIT(20) | ||
237 | 266 | ||
238 | /* Tx Buffer Element */ | 267 | /* Tx Buffer Element */ |
268 | /* R0 */ | ||
239 | #define TX_BUF_XTD BIT(30) | 269 | #define TX_BUF_XTD BIT(30) |
240 | #define TX_BUF_RTR BIT(29) | 270 | #define TX_BUF_RTR BIT(29) |
241 | 271 | ||
@@ -296,6 +326,7 @@ static inline void m_can_config_endisable(const struct m_can_priv *priv, | |||
296 | if (enable) { | 326 | if (enable) { |
297 | /* enable m_can configuration */ | 327 | /* enable m_can configuration */ |
298 | m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT); | 328 | m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT); |
329 | udelay(5); | ||
299 | /* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */ | 330 | /* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */ |
300 | m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE); | 331 | m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE); |
301 | } else { | 332 | } else { |
@@ -326,41 +357,67 @@ static inline void m_can_disable_all_interrupts(const struct m_can_priv *priv) | |||
326 | m_can_write(priv, M_CAN_ILE, 0x0); | 357 | m_can_write(priv, M_CAN_ILE, 0x0); |
327 | } | 358 | } |
328 | 359 | ||
329 | static void m_can_read_fifo(const struct net_device *dev, struct can_frame *cf, | 360 | static void m_can_read_fifo(struct net_device *dev, u32 rxfs) |
330 | u32 rxfs) | ||
331 | { | 361 | { |
362 | struct net_device_stats *stats = &dev->stats; | ||
332 | struct m_can_priv *priv = netdev_priv(dev); | 363 | struct m_can_priv *priv = netdev_priv(dev); |
333 | u32 id, fgi; | 364 | struct canfd_frame *cf; |
365 | struct sk_buff *skb; | ||
366 | u32 id, fgi, dlc; | ||
367 | int i; | ||
334 | 368 | ||
335 | /* calculate the fifo get index for where to read data */ | 369 | /* calculate the fifo get index for where to read data */ |
336 | fgi = (rxfs & RXFS_FGI_MASK) >> RXFS_FGI_OFF; | 370 | fgi = (rxfs & RXFS_FGI_MASK) >> RXFS_FGI_OFF; |
371 | dlc = m_can_fifo_read(priv, fgi, M_CAN_FIFO_DLC); | ||
372 | if (dlc & RX_BUF_EDL) | ||
373 | skb = alloc_canfd_skb(dev, &cf); | ||
374 | else | ||
375 | skb = alloc_can_skb(dev, (struct can_frame **)&cf); | ||
376 | if (!skb) { | ||
377 | stats->rx_dropped++; | ||
378 | return; | ||
379 | } | ||
380 | |||
381 | if (dlc & RX_BUF_EDL) | ||
382 | cf->len = can_dlc2len((dlc >> 16) & 0x0F); | ||
383 | else | ||
384 | cf->len = get_can_dlc((dlc >> 16) & 0x0F); | ||
385 | |||
337 | id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_ID); | 386 | id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_ID); |
338 | if (id & RX_BUF_XTD) | 387 | if (id & RX_BUF_XTD) |
339 | cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG; | 388 | cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG; |
340 | else | 389 | else |
341 | cf->can_id = (id >> 18) & CAN_SFF_MASK; | 390 | cf->can_id = (id >> 18) & CAN_SFF_MASK; |
342 | 391 | ||
343 | if (id & RX_BUF_RTR) { | 392 | if (id & RX_BUF_ESI) { |
393 | cf->flags |= CANFD_ESI; | ||
394 | netdev_dbg(dev, "ESI Error\n"); | ||
395 | } | ||
396 | |||
397 | if (!(dlc & RX_BUF_EDL) && (id & RX_BUF_RTR)) { | ||
344 | cf->can_id |= CAN_RTR_FLAG; | 398 | cf->can_id |= CAN_RTR_FLAG; |
345 | } else { | 399 | } else { |
346 | id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_DLC); | 400 | if (dlc & RX_BUF_BRS) |
347 | cf->can_dlc = get_can_dlc((id >> 16) & 0x0F); | 401 | cf->flags |= CANFD_BRS; |
348 | *(u32 *)(cf->data + 0) = m_can_fifo_read(priv, fgi, | 402 | |
349 | M_CAN_FIFO_DATA(0)); | 403 | for (i = 0; i < cf->len; i += 4) |
350 | *(u32 *)(cf->data + 4) = m_can_fifo_read(priv, fgi, | 404 | *(u32 *)(cf->data + i) = |
351 | M_CAN_FIFO_DATA(1)); | 405 | m_can_fifo_read(priv, fgi, |
406 | M_CAN_FIFO_DATA(i / 4)); | ||
352 | } | 407 | } |
353 | 408 | ||
354 | /* acknowledge rx fifo 0 */ | 409 | /* acknowledge rx fifo 0 */ |
355 | m_can_write(priv, M_CAN_RXF0A, fgi); | 410 | m_can_write(priv, M_CAN_RXF0A, fgi); |
411 | |||
412 | stats->rx_packets++; | ||
413 | stats->rx_bytes += cf->len; | ||
414 | |||
415 | netif_receive_skb(skb); | ||
356 | } | 416 | } |
357 | 417 | ||
358 | static int m_can_do_rx_poll(struct net_device *dev, int quota) | 418 | static int m_can_do_rx_poll(struct net_device *dev, int quota) |
359 | { | 419 | { |
360 | struct m_can_priv *priv = netdev_priv(dev); | 420 | struct m_can_priv *priv = netdev_priv(dev); |
361 | struct net_device_stats *stats = &dev->stats; | ||
362 | struct sk_buff *skb; | ||
363 | struct can_frame *frame; | ||
364 | u32 pkts = 0; | 421 | u32 pkts = 0; |
365 | u32 rxfs; | 422 | u32 rxfs; |
366 | 423 | ||
@@ -374,18 +431,7 @@ static int m_can_do_rx_poll(struct net_device *dev, int quota) | |||
374 | if (rxfs & RXFS_RFL) | 431 | if (rxfs & RXFS_RFL) |
375 | netdev_warn(dev, "Rx FIFO 0 Message Lost\n"); | 432 | netdev_warn(dev, "Rx FIFO 0 Message Lost\n"); |
376 | 433 | ||
377 | skb = alloc_can_skb(dev, &frame); | 434 | m_can_read_fifo(dev, rxfs); |
378 | if (!skb) { | ||
379 | stats->rx_dropped++; | ||
380 | return pkts; | ||
381 | } | ||
382 | |||
383 | m_can_read_fifo(dev, frame, rxfs); | ||
384 | |||
385 | stats->rx_packets++; | ||
386 | stats->rx_bytes += frame->can_dlc; | ||
387 | |||
388 | netif_receive_skb(skb); | ||
389 | 435 | ||
390 | quota--; | 436 | quota--; |
391 | pkts++; | 437 | pkts++; |
@@ -481,11 +527,23 @@ static int m_can_handle_lec_err(struct net_device *dev, | |||
481 | return 1; | 527 | return 1; |
482 | } | 528 | } |
483 | 529 | ||
530 | static int __m_can_get_berr_counter(const struct net_device *dev, | ||
531 | struct can_berr_counter *bec) | ||
532 | { | ||
533 | struct m_can_priv *priv = netdev_priv(dev); | ||
534 | unsigned int ecr; | ||
535 | |||
536 | ecr = m_can_read(priv, M_CAN_ECR); | ||
537 | bec->rxerr = (ecr & ECR_REC_MASK) >> ECR_REC_SHIFT; | ||
538 | bec->txerr = ecr & ECR_TEC_MASK; | ||
539 | |||
540 | return 0; | ||
541 | } | ||
542 | |||
484 | static int m_can_get_berr_counter(const struct net_device *dev, | 543 | static int m_can_get_berr_counter(const struct net_device *dev, |
485 | struct can_berr_counter *bec) | 544 | struct can_berr_counter *bec) |
486 | { | 545 | { |
487 | struct m_can_priv *priv = netdev_priv(dev); | 546 | struct m_can_priv *priv = netdev_priv(dev); |
488 | unsigned int ecr; | ||
489 | int err; | 547 | int err; |
490 | 548 | ||
491 | err = clk_prepare_enable(priv->hclk); | 549 | err = clk_prepare_enable(priv->hclk); |
@@ -498,9 +556,7 @@ static int m_can_get_berr_counter(const struct net_device *dev, | |||
498 | return err; | 556 | return err; |
499 | } | 557 | } |
500 | 558 | ||
501 | ecr = m_can_read(priv, M_CAN_ECR); | 559 | __m_can_get_berr_counter(dev, bec); |
502 | bec->rxerr = (ecr & ECR_REC_MASK) >> ECR_REC_SHIFT; | ||
503 | bec->txerr = ecr & ECR_TEC_MASK; | ||
504 | 560 | ||
505 | clk_disable_unprepare(priv->cclk); | 561 | clk_disable_unprepare(priv->cclk); |
506 | clk_disable_unprepare(priv->hclk); | 562 | clk_disable_unprepare(priv->hclk); |
@@ -544,7 +600,7 @@ static int m_can_handle_state_change(struct net_device *dev, | |||
544 | if (unlikely(!skb)) | 600 | if (unlikely(!skb)) |
545 | return 0; | 601 | return 0; |
546 | 602 | ||
547 | m_can_get_berr_counter(dev, &bec); | 603 | __m_can_get_berr_counter(dev, &bec); |
548 | 604 | ||
549 | switch (new_state) { | 605 | switch (new_state) { |
550 | case CAN_STATE_ERROR_ACTIVE: | 606 | case CAN_STATE_ERROR_ACTIVE: |
@@ -596,14 +652,14 @@ static int m_can_handle_state_errors(struct net_device *dev, u32 psr) | |||
596 | 652 | ||
597 | if ((psr & PSR_EP) && | 653 | if ((psr & PSR_EP) && |
598 | (priv->can.state != CAN_STATE_ERROR_PASSIVE)) { | 654 | (priv->can.state != CAN_STATE_ERROR_PASSIVE)) { |
599 | netdev_dbg(dev, "entered error warning state\n"); | 655 | netdev_dbg(dev, "entered error passive state\n"); |
600 | work_done += m_can_handle_state_change(dev, | 656 | work_done += m_can_handle_state_change(dev, |
601 | CAN_STATE_ERROR_PASSIVE); | 657 | CAN_STATE_ERROR_PASSIVE); |
602 | } | 658 | } |
603 | 659 | ||
604 | if ((psr & PSR_BO) && | 660 | if ((psr & PSR_BO) && |
605 | (priv->can.state != CAN_STATE_BUS_OFF)) { | 661 | (priv->can.state != CAN_STATE_BUS_OFF)) { |
606 | netdev_dbg(dev, "entered error warning state\n"); | 662 | netdev_dbg(dev, "entered error bus off state\n"); |
607 | work_done += m_can_handle_state_change(dev, | 663 | work_done += m_can_handle_state_change(dev, |
608 | CAN_STATE_BUS_OFF); | 664 | CAN_STATE_BUS_OFF); |
609 | } | 665 | } |
@@ -615,7 +671,7 @@ static void m_can_handle_other_err(struct net_device *dev, u32 irqstatus) | |||
615 | { | 671 | { |
616 | if (irqstatus & IR_WDI) | 672 | if (irqstatus & IR_WDI) |
617 | netdev_err(dev, "Message RAM Watchdog event due to missing READY\n"); | 673 | netdev_err(dev, "Message RAM Watchdog event due to missing READY\n"); |
618 | if (irqstatus & IR_BEU) | 674 | if (irqstatus & IR_ELO) |
619 | netdev_err(dev, "Error Logging Overflow\n"); | 675 | netdev_err(dev, "Error Logging Overflow\n"); |
620 | if (irqstatus & IR_BEU) | 676 | if (irqstatus & IR_BEU) |
621 | netdev_err(dev, "Bit Error Uncorrected\n"); | 677 | netdev_err(dev, "Bit Error Uncorrected\n"); |
@@ -733,10 +789,23 @@ static const struct can_bittiming_const m_can_bittiming_const = { | |||
733 | .brp_inc = 1, | 789 | .brp_inc = 1, |
734 | }; | 790 | }; |
735 | 791 | ||
792 | static const struct can_bittiming_const m_can_data_bittiming_const = { | ||
793 | .name = KBUILD_MODNAME, | ||
794 | .tseg1_min = 2, /* Time segment 1 = prop_seg + phase_seg1 */ | ||
795 | .tseg1_max = 16, | ||
796 | .tseg2_min = 1, /* Time segment 2 = phase_seg2 */ | ||
797 | .tseg2_max = 8, | ||
798 | .sjw_max = 4, | ||
799 | .brp_min = 1, | ||
800 | .brp_max = 32, | ||
801 | .brp_inc = 1, | ||
802 | }; | ||
803 | |||
736 | static int m_can_set_bittiming(struct net_device *dev) | 804 | static int m_can_set_bittiming(struct net_device *dev) |
737 | { | 805 | { |
738 | struct m_can_priv *priv = netdev_priv(dev); | 806 | struct m_can_priv *priv = netdev_priv(dev); |
739 | const struct can_bittiming *bt = &priv->can.bittiming; | 807 | const struct can_bittiming *bt = &priv->can.bittiming; |
808 | const struct can_bittiming *dbt = &priv->can.data_bittiming; | ||
740 | u16 brp, sjw, tseg1, tseg2; | 809 | u16 brp, sjw, tseg1, tseg2; |
741 | u32 reg_btp; | 810 | u32 reg_btp; |
742 | 811 | ||
@@ -747,7 +816,17 @@ static int m_can_set_bittiming(struct net_device *dev) | |||
747 | reg_btp = (brp << BTR_BRP_SHIFT) | (sjw << BTR_SJW_SHIFT) | | 816 | reg_btp = (brp << BTR_BRP_SHIFT) | (sjw << BTR_SJW_SHIFT) | |
748 | (tseg1 << BTR_TSEG1_SHIFT) | (tseg2 << BTR_TSEG2_SHIFT); | 817 | (tseg1 << BTR_TSEG1_SHIFT) | (tseg2 << BTR_TSEG2_SHIFT); |
749 | m_can_write(priv, M_CAN_BTP, reg_btp); | 818 | m_can_write(priv, M_CAN_BTP, reg_btp); |
750 | netdev_dbg(dev, "setting BTP 0x%x\n", reg_btp); | 819 | |
820 | if (priv->can.ctrlmode & CAN_CTRLMODE_FD) { | ||
821 | brp = dbt->brp - 1; | ||
822 | sjw = dbt->sjw - 1; | ||
823 | tseg1 = dbt->prop_seg + dbt->phase_seg1 - 1; | ||
824 | tseg2 = dbt->phase_seg2 - 1; | ||
825 | reg_btp = (brp << FBTR_FBRP_SHIFT) | (sjw << FBTR_FSJW_SHIFT) | | ||
826 | (tseg1 << FBTR_FTSEG1_SHIFT) | | ||
827 | (tseg2 << FBTR_FTSEG2_SHIFT); | ||
828 | m_can_write(priv, M_CAN_FBTP, reg_btp); | ||
829 | } | ||
751 | 830 | ||
752 | return 0; | 831 | return 0; |
753 | } | 832 | } |
@@ -767,8 +846,8 @@ static void m_can_chip_config(struct net_device *dev) | |||
767 | 846 | ||
768 | m_can_config_endisable(priv, true); | 847 | m_can_config_endisable(priv, true); |
769 | 848 | ||
770 | /* RX Buffer/FIFO Element Size 8 bytes data field */ | 849 | /* RX Buffer/FIFO Element Size 64 bytes data field */ |
771 | m_can_write(priv, M_CAN_RXESC, M_CAN_RXESC_8BYTES); | 850 | m_can_write(priv, M_CAN_RXESC, M_CAN_RXESC_64BYTES); |
772 | 851 | ||
773 | /* Accept Non-matching Frames Into FIFO 0 */ | 852 | /* Accept Non-matching Frames Into FIFO 0 */ |
774 | m_can_write(priv, M_CAN_GFC, 0x0); | 853 | m_can_write(priv, M_CAN_GFC, 0x0); |
@@ -777,8 +856,8 @@ static void m_can_chip_config(struct net_device *dev) | |||
777 | m_can_write(priv, M_CAN_TXBC, (1 << TXBC_NDTB_OFF) | | 856 | m_can_write(priv, M_CAN_TXBC, (1 << TXBC_NDTB_OFF) | |
778 | priv->mcfg[MRAM_TXB].off); | 857 | priv->mcfg[MRAM_TXB].off); |
779 | 858 | ||
780 | /* only support 8 bytes firstly */ | 859 | /* support 64 bytes payload */ |
781 | m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_8BYTES); | 860 | m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_64BYTES); |
782 | 861 | ||
783 | m_can_write(priv, M_CAN_TXEFC, (1 << TXEFC_EFS_OFF) | | 862 | m_can_write(priv, M_CAN_TXEFC, (1 << TXEFC_EFS_OFF) | |
784 | priv->mcfg[MRAM_TXE].off); | 863 | priv->mcfg[MRAM_TXE].off); |
@@ -793,7 +872,8 @@ static void m_can_chip_config(struct net_device *dev) | |||
793 | RXFC_FWM_1 | priv->mcfg[MRAM_RXF1].off); | 872 | RXFC_FWM_1 | priv->mcfg[MRAM_RXF1].off); |
794 | 873 | ||
795 | cccr = m_can_read(priv, M_CAN_CCCR); | 874 | cccr = m_can_read(priv, M_CAN_CCCR); |
796 | cccr &= ~(CCCR_TEST | CCCR_MON); | 875 | cccr &= ~(CCCR_TEST | CCCR_MON | (CCCR_CMR_MASK << CCCR_CMR_SHIFT) | |
876 | (CCCR_CME_MASK << CCCR_CME_SHIFT)); | ||
797 | test = m_can_read(priv, M_CAN_TEST); | 877 | test = m_can_read(priv, M_CAN_TEST); |
798 | test &= ~TEST_LBCK; | 878 | test &= ~TEST_LBCK; |
799 | 879 | ||
@@ -805,6 +885,9 @@ static void m_can_chip_config(struct net_device *dev) | |||
805 | test |= TEST_LBCK; | 885 | test |= TEST_LBCK; |
806 | } | 886 | } |
807 | 887 | ||
888 | if (priv->can.ctrlmode & CAN_CTRLMODE_FD) | ||
889 | cccr |= CCCR_CME_CANFD_BRS << CCCR_CME_SHIFT; | ||
890 | |||
808 | m_can_write(priv, M_CAN_CCCR, cccr); | 891 | m_can_write(priv, M_CAN_CCCR, cccr); |
809 | m_can_write(priv, M_CAN_TEST, test); | 892 | m_can_write(priv, M_CAN_TEST, test); |
810 | 893 | ||
@@ -869,11 +952,13 @@ static struct net_device *alloc_m_can_dev(void) | |||
869 | 952 | ||
870 | priv->dev = dev; | 953 | priv->dev = dev; |
871 | priv->can.bittiming_const = &m_can_bittiming_const; | 954 | priv->can.bittiming_const = &m_can_bittiming_const; |
955 | priv->can.data_bittiming_const = &m_can_data_bittiming_const; | ||
872 | priv->can.do_set_mode = m_can_set_mode; | 956 | priv->can.do_set_mode = m_can_set_mode; |
873 | priv->can.do_get_berr_counter = m_can_get_berr_counter; | 957 | priv->can.do_get_berr_counter = m_can_get_berr_counter; |
874 | priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | | 958 | priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | |
875 | CAN_CTRLMODE_LISTENONLY | | 959 | CAN_CTRLMODE_LISTENONLY | |
876 | CAN_CTRLMODE_BERR_REPORTING; | 960 | CAN_CTRLMODE_BERR_REPORTING | |
961 | CAN_CTRLMODE_FD; | ||
877 | 962 | ||
878 | return dev; | 963 | return dev; |
879 | } | 964 | } |
@@ -956,8 +1041,9 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb, | |||
956 | struct net_device *dev) | 1041 | struct net_device *dev) |
957 | { | 1042 | { |
958 | struct m_can_priv *priv = netdev_priv(dev); | 1043 | struct m_can_priv *priv = netdev_priv(dev); |
959 | struct can_frame *cf = (struct can_frame *)skb->data; | 1044 | struct canfd_frame *cf = (struct canfd_frame *)skb->data; |
960 | u32 id; | 1045 | u32 id, cccr; |
1046 | int i; | ||
961 | 1047 | ||
962 | if (can_dropped_invalid_skb(dev, skb)) | 1048 | if (can_dropped_invalid_skb(dev, skb)) |
963 | return NETDEV_TX_OK; | 1049 | return NETDEV_TX_OK; |
@@ -976,11 +1062,28 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb, | |||
976 | 1062 | ||
977 | /* message ram configuration */ | 1063 | /* message ram configuration */ |
978 | m_can_fifo_write(priv, 0, M_CAN_FIFO_ID, id); | 1064 | m_can_fifo_write(priv, 0, M_CAN_FIFO_ID, id); |
979 | m_can_fifo_write(priv, 0, M_CAN_FIFO_DLC, cf->can_dlc << 16); | 1065 | m_can_fifo_write(priv, 0, M_CAN_FIFO_DLC, can_len2dlc(cf->len) << 16); |
980 | m_can_fifo_write(priv, 0, M_CAN_FIFO_DATA(0), *(u32 *)(cf->data + 0)); | 1066 | |
981 | m_can_fifo_write(priv, 0, M_CAN_FIFO_DATA(1), *(u32 *)(cf->data + 4)); | 1067 | for (i = 0; i < cf->len; i += 4) |
1068 | m_can_fifo_write(priv, 0, M_CAN_FIFO_DATA(i / 4), | ||
1069 | *(u32 *)(cf->data + i)); | ||
1070 | |||
982 | can_put_echo_skb(skb, dev, 0); | 1071 | can_put_echo_skb(skb, dev, 0); |
983 | 1072 | ||
1073 | if (priv->can.ctrlmode & CAN_CTRLMODE_FD) { | ||
1074 | cccr = m_can_read(priv, M_CAN_CCCR); | ||
1075 | cccr &= ~(CCCR_CMR_MASK << CCCR_CMR_SHIFT); | ||
1076 | if (can_is_canfd_skb(skb)) { | ||
1077 | if (cf->flags & CANFD_BRS) | ||
1078 | cccr |= CCCR_CMR_CANFD_BRS << CCCR_CMR_SHIFT; | ||
1079 | else | ||
1080 | cccr |= CCCR_CMR_CANFD << CCCR_CMR_SHIFT; | ||
1081 | } else { | ||
1082 | cccr |= CCCR_CMR_CAN << CCCR_CMR_SHIFT; | ||
1083 | } | ||
1084 | m_can_write(priv, M_CAN_CCCR, cccr); | ||
1085 | } | ||
1086 | |||
984 | /* enable first TX buffer to start transfer */ | 1087 | /* enable first TX buffer to start transfer */ |
985 | m_can_write(priv, M_CAN_TXBTIE, 0x1); | 1088 | m_can_write(priv, M_CAN_TXBTIE, 0x1); |
986 | m_can_write(priv, M_CAN_TXBAR, 0x1); | 1089 | m_can_write(priv, M_CAN_TXBAR, 0x1); |
@@ -992,6 +1095,7 @@ static const struct net_device_ops m_can_netdev_ops = { | |||
992 | .ndo_open = m_can_open, | 1095 | .ndo_open = m_can_open, |
993 | .ndo_stop = m_can_close, | 1096 | .ndo_stop = m_can_close, |
994 | .ndo_start_xmit = m_can_start_xmit, | 1097 | .ndo_start_xmit = m_can_start_xmit, |
1098 | .ndo_change_mtu = can_change_mtu, | ||
995 | }; | 1099 | }; |
996 | 1100 | ||
997 | static int register_m_can_dev(struct net_device *dev) | 1101 | static int register_m_can_dev(struct net_device *dev) |
@@ -1009,7 +1113,7 @@ static int m_can_of_parse_mram(struct platform_device *pdev, | |||
1009 | struct resource *res; | 1113 | struct resource *res; |
1010 | void __iomem *addr; | 1114 | void __iomem *addr; |
1011 | u32 out_val[MRAM_CFG_LEN]; | 1115 | u32 out_val[MRAM_CFG_LEN]; |
1012 | int ret; | 1116 | int i, start, end, ret; |
1013 | 1117 | ||
1014 | /* message ram could be shared */ | 1118 | /* message ram could be shared */ |
1015 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram"); | 1119 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram"); |
@@ -1060,6 +1164,15 @@ static int m_can_of_parse_mram(struct platform_device *pdev, | |||
1060 | priv->mcfg[MRAM_TXE].off, priv->mcfg[MRAM_TXE].num, | 1164 | priv->mcfg[MRAM_TXE].off, priv->mcfg[MRAM_TXE].num, |
1061 | priv->mcfg[MRAM_TXB].off, priv->mcfg[MRAM_TXB].num); | 1165 | priv->mcfg[MRAM_TXB].off, priv->mcfg[MRAM_TXB].num); |
1062 | 1166 | ||
1167 | /* initialize the entire Message RAM in use to avoid possible | ||
1168 | * ECC/parity checksum errors when reading an uninitialized buffer | ||
1169 | */ | ||
1170 | start = priv->mcfg[MRAM_SIDF].off; | ||
1171 | end = priv->mcfg[MRAM_TXB].off + | ||
1172 | priv->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE; | ||
1173 | for (i = start; i < end; i += 4) | ||
1174 | writel(0x0, priv->mram_base + i); | ||
1175 | |||
1063 | return 0; | 1176 | return 0; |
1064 | } | 1177 | } |
1065 | 1178 | ||
diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c index 1abe133d1594..9718248e55f1 100644 --- a/drivers/net/can/rcar_can.c +++ b/drivers/net/can/rcar_can.c | |||
@@ -628,6 +628,7 @@ static const struct net_device_ops rcar_can_netdev_ops = { | |||
628 | .ndo_open = rcar_can_open, | 628 | .ndo_open = rcar_can_open, |
629 | .ndo_stop = rcar_can_close, | 629 | .ndo_stop = rcar_can_close, |
630 | .ndo_start_xmit = rcar_can_start_xmit, | 630 | .ndo_start_xmit = rcar_can_start_xmit, |
631 | .ndo_change_mtu = can_change_mtu, | ||
631 | }; | 632 | }; |
632 | 633 | ||
633 | static void rcar_can_rx_pkt(struct rcar_can_priv *priv) | 634 | static void rcar_can_rx_pkt(struct rcar_can_priv *priv) |
diff --git a/drivers/net/can/sja1000/kvaser_pci.c b/drivers/net/can/sja1000/kvaser_pci.c index 8ff3424d5147..15c00faeec61 100644 --- a/drivers/net/can/sja1000/kvaser_pci.c +++ b/drivers/net/can/sja1000/kvaser_pci.c | |||
@@ -214,7 +214,7 @@ static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel, | |||
214 | struct net_device *dev; | 214 | struct net_device *dev; |
215 | struct sja1000_priv *priv; | 215 | struct sja1000_priv *priv; |
216 | struct kvaser_pci *board; | 216 | struct kvaser_pci *board; |
217 | int err, init_step; | 217 | int err; |
218 | 218 | ||
219 | dev = alloc_sja1000dev(sizeof(struct kvaser_pci)); | 219 | dev = alloc_sja1000dev(sizeof(struct kvaser_pci)); |
220 | if (dev == NULL) | 220 | if (dev == NULL) |
@@ -235,7 +235,6 @@ static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel, | |||
235 | if (channel == 0) { | 235 | if (channel == 0) { |
236 | board->xilinx_ver = | 236 | board->xilinx_ver = |
237 | ioread8(board->res_addr + XILINX_VERINT) >> 4; | 237 | ioread8(board->res_addr + XILINX_VERINT) >> 4; |
238 | init_step = 2; | ||
239 | 238 | ||
240 | /* Assert PTADR# - we're in passive mode so the other bits are | 239 | /* Assert PTADR# - we're in passive mode so the other bits are |
241 | not important */ | 240 | not important */ |
@@ -264,8 +263,6 @@ static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel, | |||
264 | priv->irq_flags = IRQF_SHARED; | 263 | priv->irq_flags = IRQF_SHARED; |
265 | dev->irq = pdev->irq; | 264 | dev->irq = pdev->irq; |
266 | 265 | ||
267 | init_step = 4; | ||
268 | |||
269 | dev_info(&pdev->dev, "reg_base=%p conf_addr=%p irq=%d\n", | 266 | dev_info(&pdev->dev, "reg_base=%p conf_addr=%p irq=%d\n", |
270 | priv->reg_base, board->conf_addr, dev->irq); | 267 | priv->reg_base, board->conf_addr, dev->irq); |
271 | 268 | ||
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c index 00f2534dde73..29d3f0938eb8 100644 --- a/drivers/net/can/usb/ems_usb.c +++ b/drivers/net/can/usb/ems_usb.c | |||
@@ -434,10 +434,9 @@ static void ems_usb_read_bulk_callback(struct urb *urb) | |||
434 | if (urb->actual_length > CPC_HEADER_SIZE) { | 434 | if (urb->actual_length > CPC_HEADER_SIZE) { |
435 | struct ems_cpc_msg *msg; | 435 | struct ems_cpc_msg *msg; |
436 | u8 *ibuf = urb->transfer_buffer; | 436 | u8 *ibuf = urb->transfer_buffer; |
437 | u8 msg_count, again, start; | 437 | u8 msg_count, start; |
438 | 438 | ||
439 | msg_count = ibuf[0] & ~0x80; | 439 | msg_count = ibuf[0] & ~0x80; |
440 | again = ibuf[0] & 0x80; | ||
441 | 440 | ||
442 | start = CPC_HEADER_SIZE; | 441 | start = CPC_HEADER_SIZE; |
443 | 442 | ||
diff --git a/drivers/net/can/usb/esd_usb2.c b/drivers/net/can/usb/esd_usb2.c index b7c9e8b11460..c063a54ab8dd 100644 --- a/drivers/net/can/usb/esd_usb2.c +++ b/drivers/net/can/usb/esd_usb2.c | |||
@@ -464,7 +464,6 @@ static void esd_usb2_write_bulk_callback(struct urb *urb) | |||
464 | { | 464 | { |
465 | struct esd_tx_urb_context *context = urb->context; | 465 | struct esd_tx_urb_context *context = urb->context; |
466 | struct esd_usb2_net_priv *priv; | 466 | struct esd_usb2_net_priv *priv; |
467 | struct esd_usb2 *dev; | ||
468 | struct net_device *netdev; | 467 | struct net_device *netdev; |
469 | size_t size = sizeof(struct esd_usb2_msg); | 468 | size_t size = sizeof(struct esd_usb2_msg); |
470 | 469 | ||
@@ -472,7 +471,6 @@ static void esd_usb2_write_bulk_callback(struct urb *urb) | |||
472 | 471 | ||
473 | priv = context->priv; | 472 | priv = context->priv; |
474 | netdev = priv->netdev; | 473 | netdev = priv->netdev; |
475 | dev = priv->usb2; | ||
476 | 474 | ||
477 | /* free up our allocated buffer */ | 475 | /* free up our allocated buffer */ |
478 | usb_free_coherent(urb->dev, size, | 476 | usb_free_coherent(urb->dev, size, |
@@ -1143,6 +1141,7 @@ static void esd_usb2_disconnect(struct usb_interface *intf) | |||
1143 | } | 1141 | } |
1144 | } | 1142 | } |
1145 | unlink_all_urbs(dev); | 1143 | unlink_all_urbs(dev); |
1144 | kfree(dev); | ||
1146 | } | 1145 | } |
1147 | } | 1146 | } |
1148 | 1147 | ||
diff --git a/drivers/net/can/usb/gs_usb.c b/drivers/net/can/usb/gs_usb.c index 04b0f84612f0..009acc8641fc 100644 --- a/drivers/net/can/usb/gs_usb.c +++ b/drivers/net/can/usb/gs_usb.c | |||
@@ -718,6 +718,7 @@ static const struct net_device_ops gs_usb_netdev_ops = { | |||
718 | .ndo_open = gs_can_open, | 718 | .ndo_open = gs_can_open, |
719 | .ndo_stop = gs_can_close, | 719 | .ndo_stop = gs_can_close, |
720 | .ndo_start_xmit = gs_can_start_xmit, | 720 | .ndo_start_xmit = gs_can_start_xmit, |
721 | .ndo_change_mtu = can_change_mtu, | ||
721 | }; | 722 | }; |
722 | 723 | ||
723 | static struct gs_can *gs_make_candev(unsigned int channel, struct usb_interface *intf) | 724 | static struct gs_can *gs_make_candev(unsigned int channel, struct usb_interface *intf) |
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index 5e8b5609c067..8a998e3884ce 100644 --- a/drivers/net/can/xilinx_can.c +++ b/drivers/net/can/xilinx_can.c | |||
@@ -300,7 +300,8 @@ static int xcan_set_bittiming(struct net_device *ndev) | |||
300 | static int xcan_chip_start(struct net_device *ndev) | 300 | static int xcan_chip_start(struct net_device *ndev) |
301 | { | 301 | { |
302 | struct xcan_priv *priv = netdev_priv(ndev); | 302 | struct xcan_priv *priv = netdev_priv(ndev); |
303 | u32 err, reg_msr, reg_sr_mask; | 303 | u32 reg_msr, reg_sr_mask; |
304 | int err; | ||
304 | unsigned long timeout; | 305 | unsigned long timeout; |
305 | 306 | ||
306 | /* Check if it is in reset mode */ | 307 | /* Check if it is in reset mode */ |
@@ -961,6 +962,7 @@ static const struct net_device_ops xcan_netdev_ops = { | |||
961 | .ndo_open = xcan_open, | 962 | .ndo_open = xcan_open, |
962 | .ndo_stop = xcan_close, | 963 | .ndo_stop = xcan_close, |
963 | .ndo_start_xmit = xcan_start_xmit, | 964 | .ndo_start_xmit = xcan_start_xmit, |
965 | .ndo_change_mtu = can_change_mtu, | ||
964 | }; | 966 | }; |
965 | 967 | ||
966 | /** | 968 | /** |