diff options
author | Vladimir Kondratiev <QCA_vkondrat@QCA.qualcomm.com> | 2015-10-25 09:59:23 -0400 |
---|---|---|
committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2015-10-29 07:06:47 -0400 |
commit | 817f18534412532198bf3da8dfd2663a1d75a7de (patch) | |
tree | c5494977758687413da556aae8aae53783cc6724 /drivers/net/wireless/ath/wil6210/interrupt.c | |
parent | e3d2ed9434331dedb9eeece586d38aec9e29f60b (diff) |
wil6210: fix device ready detection
Adjust driver behavior during FW boot. Proper sequence of
events after reset and FW download, is as following:
- FW prepares mailbox structure and reports IRQ "FW_READY"
- driver caches mailbox registers, marks mailbox readiness
- FW sends WMI_FW_READY event, ignore it
- FW sends WMI_READY event with some data
- driver stores relevant data marks FW is operational
Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/wil6210/interrupt.c')
-rw-r--r-- | drivers/net/wireless/ath/wil6210/interrupt.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/wil6210/interrupt.c b/drivers/net/wireless/ath/wil6210/interrupt.c index 06fc46f85c85..50c136e843c4 100644 --- a/drivers/net/wireless/ath/wil6210/interrupt.c +++ b/drivers/net/wireless/ath/wil6210/interrupt.c | |||
@@ -236,7 +236,7 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie) | |||
236 | 236 | ||
237 | isr &= ~(BIT_DMA_EP_RX_ICR_RX_DONE | | 237 | isr &= ~(BIT_DMA_EP_RX_ICR_RX_DONE | |
238 | BIT_DMA_EP_RX_ICR_RX_HTRSH); | 238 | BIT_DMA_EP_RX_ICR_RX_HTRSH); |
239 | if (likely(test_bit(wil_status_reset_done, wil->status))) { | 239 | if (likely(test_bit(wil_status_fwready, wil->status))) { |
240 | if (likely(test_bit(wil_status_napi_en, wil->status))) { | 240 | if (likely(test_bit(wil_status_napi_en, wil->status))) { |
241 | wil_dbg_txrx(wil, "NAPI(Rx) schedule\n"); | 241 | wil_dbg_txrx(wil, "NAPI(Rx) schedule\n"); |
242 | need_unmask = false; | 242 | need_unmask = false; |
@@ -286,7 +286,7 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie) | |||
286 | isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE; | 286 | isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE; |
287 | /* clear also all VRING interrupts */ | 287 | /* clear also all VRING interrupts */ |
288 | isr &= ~(BIT(25) - 1UL); | 288 | isr &= ~(BIT(25) - 1UL); |
289 | if (likely(test_bit(wil_status_reset_done, wil->status))) { | 289 | if (likely(test_bit(wil_status_fwready, wil->status))) { |
290 | wil_dbg_txrx(wil, "NAPI(Tx) schedule\n"); | 290 | wil_dbg_txrx(wil, "NAPI(Tx) schedule\n"); |
291 | need_unmask = false; | 291 | need_unmask = false; |
292 | napi_schedule(&wil->napi_tx); | 292 | napi_schedule(&wil->napi_tx); |
@@ -364,7 +364,7 @@ static irqreturn_t wil6210_irq_misc(int irq, void *cookie) | |||
364 | if (isr & ISR_MISC_FW_READY) { | 364 | if (isr & ISR_MISC_FW_READY) { |
365 | wil_dbg_irq(wil, "IRQ: FW ready\n"); | 365 | wil_dbg_irq(wil, "IRQ: FW ready\n"); |
366 | wil_cache_mbox_regs(wil); | 366 | wil_cache_mbox_regs(wil); |
367 | set_bit(wil_status_reset_done, wil->status); | 367 | set_bit(wil_status_mbox_ready, wil->status); |
368 | /** | 368 | /** |
369 | * Actual FW ready indicated by the | 369 | * Actual FW ready indicated by the |
370 | * WMI_FW_READY_EVENTID | 370 | * WMI_FW_READY_EVENTID |