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authorFelix Fietkau <nbd@openwrt.org>2011-03-22 16:54:17 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-03-30 14:15:17 -0400
commitdd347f2fb2ddb20a80e9a8285252bf208ab91398 (patch)
tree9e1a33ea4f50dd9b116e80da2fd6250d570eb001 /drivers/net/wireless/ath/ath9k/hw.c
parentf39de992540cf68cc865498242f963f70f7e97b3 (diff)
ath9k: fix beacon timer handling issues
AP mode beacon timers in ath9k are configured in milliseconds, which breaks when increasing ATH_BCBUF to 8 instead of 4 (due to rounding errors). Since the hardware timers are actually configured in microseconds, it's better to let the driver use that unit directly. To be able to do that, the beacon interval parameter abuse for passing certain flags needs to be removed. This is easy to do, because those flags are completely unnecessary anyway. ATH9K_BEACON_ENA is ignored, ATH9K_BEACON_RESET_TSF can be replaced with calling ath9k_hw_reset_tsf from the driver directly. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c36
1 files changed, 13 insertions, 23 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 8b8656898dfe..9513ec745b93 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1697,21 +1697,15 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
1697 case NL80211_IFTYPE_MESH_POINT: 1697 case NL80211_IFTYPE_MESH_POINT:
1698 REG_SET_BIT(ah, AR_TXCFG, 1698 REG_SET_BIT(ah, AR_TXCFG,
1699 AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY); 1699 AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY);
1700 REG_WRITE(ah, AR_NEXT_NDP_TIMER, 1700 REG_WRITE(ah, AR_NEXT_NDP_TIMER, next_beacon +
1701 TU_TO_USEC(next_beacon + 1701 TU_TO_USEC(ah->atim_window ? ah->atim_window : 1));
1702 (ah->atim_window ? ah->
1703 atim_window : 1)));
1704 flags |= AR_NDP_TIMER_EN; 1702 flags |= AR_NDP_TIMER_EN;
1705 case NL80211_IFTYPE_AP: 1703 case NL80211_IFTYPE_AP:
1706 REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon)); 1704 REG_WRITE(ah, AR_NEXT_TBTT_TIMER, next_beacon);
1707 REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 1705 REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, next_beacon -
1708 TU_TO_USEC(next_beacon - 1706 TU_TO_USEC(ah->config.dma_beacon_response_time));
1709 ah->config. 1707 REG_WRITE(ah, AR_NEXT_SWBA, next_beacon -
1710 dma_beacon_response_time)); 1708 TU_TO_USEC(ah->config.sw_beacon_response_time));
1711 REG_WRITE(ah, AR_NEXT_SWBA,
1712 TU_TO_USEC(next_beacon -
1713 ah->config.
1714 sw_beacon_response_time));
1715 flags |= 1709 flags |=
1716 AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN; 1710 AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
1717 break; 1711 break;
@@ -1723,18 +1717,13 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
1723 break; 1717 break;
1724 } 1718 }
1725 1719
1726 REG_WRITE(ah, AR_BEACON_PERIOD, TU_TO_USEC(beacon_period)); 1720 REG_WRITE(ah, AR_BEACON_PERIOD, beacon_period);
1727 REG_WRITE(ah, AR_DMA_BEACON_PERIOD, TU_TO_USEC(beacon_period)); 1721 REG_WRITE(ah, AR_DMA_BEACON_PERIOD, beacon_period);
1728 REG_WRITE(ah, AR_SWBA_PERIOD, TU_TO_USEC(beacon_period)); 1722 REG_WRITE(ah, AR_SWBA_PERIOD, beacon_period);
1729 REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period)); 1723 REG_WRITE(ah, AR_NDP_PERIOD, beacon_period);
1730 1724
1731 REGWRITE_BUFFER_FLUSH(ah); 1725 REGWRITE_BUFFER_FLUSH(ah);
1732 1726
1733 beacon_period &= ~ATH9K_BEACON_ENA;
1734 if (beacon_period & ATH9K_BEACON_RESET_TSF) {
1735 ath9k_hw_reset_tsf(ah);
1736 }
1737
1738 REG_SET_BIT(ah, AR_TIMER_MODE, flags); 1727 REG_SET_BIT(ah, AR_TIMER_MODE, flags);
1739} 1728}
1740EXPORT_SYMBOL(ath9k_hw_beaconinit); 1729EXPORT_SYMBOL(ath9k_hw_beaconinit);
@@ -2395,10 +2384,11 @@ static u32 rightmost_index(struct ath_gen_timer_table *timer_table, u32 *mask)
2395 return timer_table->gen_timer_index[b]; 2384 return timer_table->gen_timer_index[b];
2396} 2385}
2397 2386
2398static u32 ath9k_hw_gettsf32(struct ath_hw *ah) 2387u32 ath9k_hw_gettsf32(struct ath_hw *ah)
2399{ 2388{
2400 return REG_READ(ah, AR_TSF_L32); 2389 return REG_READ(ah, AR_TSF_L32);
2401} 2390}
2391EXPORT_SYMBOL(ath9k_hw_gettsf32);
2402 2392
2403struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah, 2393struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
2404 void (*trigger)(void *), 2394 void (*trigger)(void *),