diff options
author | Michal Kazior <michal.kazior@tieto.com> | 2013-11-08 02:01:34 -0500 |
---|---|---|
committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2013-11-12 13:06:46 -0500 |
commit | 1d2b48d6174efb216012ec7cae7ddc653871543f (patch) | |
tree | 85901e354516cc9c2ce7cf05e587871bfdb21847 /drivers/net/wireless/ath/ath10k/pci.c | |
parent | 98563d5aafa45498f8c2f6885b2bd03eab648f19 (diff) |
ath10k: add and fix some PCI prints
Add missing error reporting and adjust other
prints to make everything more consistent.
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/pci.c')
-rw-r--r-- | drivers/net/wireless/ath/ath10k/pci.c | 69 |
1 files changed, 39 insertions, 30 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c index e552770a9e6d..eaa99561dab3 100644 --- a/drivers/net/wireless/ath/ath10k/pci.c +++ b/drivers/net/wireless/ath/ath10k/pci.c | |||
@@ -712,7 +712,7 @@ static int ath10k_pci_hif_send_head(struct ath10k *ar, u8 pipe_id, | |||
712 | ret = ath10k_ce_send(ce_hdl, nbuf, skb_cb->paddr, len, transfer_id, | 712 | ret = ath10k_ce_send(ce_hdl, nbuf, skb_cb->paddr, len, transfer_id, |
713 | flags); | 713 | flags); |
714 | if (ret) | 714 | if (ret) |
715 | ath10k_warn("CE send failed: %p\n", nbuf); | 715 | ath10k_warn("failed to send sk_buff to CE: %p\n", nbuf); |
716 | 716 | ||
717 | return ret; | 717 | return ret; |
718 | } | 718 | } |
@@ -739,9 +739,10 @@ static void ath10k_pci_hif_dump_area(struct ath10k *ar) | |||
739 | ar->fw_version_build); | 739 | ar->fw_version_build); |
740 | 740 | ||
741 | host_addr = host_interest_item_address(HI_ITEM(hi_failure_state)); | 741 | host_addr = host_interest_item_address(HI_ITEM(hi_failure_state)); |
742 | if (ath10k_pci_diag_read_mem(ar, host_addr, | 742 | ret = ath10k_pci_diag_read_mem(ar, host_addr, |
743 | ®_dump_area, sizeof(u32)) != 0) { | 743 | ®_dump_area, sizeof(u32)); |
744 | ath10k_warn("could not read hi_failure_state\n"); | 744 | if (ret) { |
745 | ath10k_err("failed to read FW dump area address: %d\n", ret); | ||
745 | return; | 746 | return; |
746 | } | 747 | } |
747 | 748 | ||
@@ -751,7 +752,7 @@ static void ath10k_pci_hif_dump_area(struct ath10k *ar) | |||
751 | ®_dump_values[0], | 752 | ®_dump_values[0], |
752 | REG_DUMP_COUNT_QCA988X * sizeof(u32)); | 753 | REG_DUMP_COUNT_QCA988X * sizeof(u32)); |
753 | if (ret != 0) { | 754 | if (ret != 0) { |
754 | ath10k_err("could not dump FW Dump Area\n"); | 755 | ath10k_err("failed to read FW dump area: %d\n", ret); |
755 | return; | 756 | return; |
756 | } | 757 | } |
757 | 758 | ||
@@ -973,8 +974,8 @@ static void ath10k_pci_process_ce(struct ath10k *ar) | |||
973 | case ATH10K_PCI_COMPL_RECV: | 974 | case ATH10K_PCI_COMPL_RECV: |
974 | ret = ath10k_pci_post_rx_pipe(compl->pipe_info, 1); | 975 | ret = ath10k_pci_post_rx_pipe(compl->pipe_info, 1); |
975 | if (ret) { | 976 | if (ret) { |
976 | ath10k_warn("Unable to post recv buffer for pipe: %d\n", | 977 | ath10k_warn("failed to post RX buffer for pipe %d: %d\n", |
977 | compl->pipe_info->pipe_num); | 978 | compl->pipe_info->pipe_num, ret); |
978 | break; | 979 | break; |
979 | } | 980 | } |
980 | 981 | ||
@@ -1113,7 +1114,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info, | |||
1113 | for (i = 0; i < num; i++) { | 1114 | for (i = 0; i < num; i++) { |
1114 | skb = dev_alloc_skb(pipe_info->buf_sz); | 1115 | skb = dev_alloc_skb(pipe_info->buf_sz); |
1115 | if (!skb) { | 1116 | if (!skb) { |
1116 | ath10k_warn("could not allocate skbuff for pipe %d\n", | 1117 | ath10k_warn("failed to allocate skbuff for pipe %d\n", |
1117 | num); | 1118 | num); |
1118 | ret = -ENOMEM; | 1119 | ret = -ENOMEM; |
1119 | goto err; | 1120 | goto err; |
@@ -1126,7 +1127,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info, | |||
1126 | DMA_FROM_DEVICE); | 1127 | DMA_FROM_DEVICE); |
1127 | 1128 | ||
1128 | if (unlikely(dma_mapping_error(ar->dev, ce_data))) { | 1129 | if (unlikely(dma_mapping_error(ar->dev, ce_data))) { |
1129 | ath10k_warn("could not dma map skbuff\n"); | 1130 | ath10k_warn("failed to DMA map sk_buff\n"); |
1130 | dev_kfree_skb_any(skb); | 1131 | dev_kfree_skb_any(skb); |
1131 | ret = -EIO; | 1132 | ret = -EIO; |
1132 | goto err; | 1133 | goto err; |
@@ -1141,7 +1142,7 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info, | |||
1141 | ret = ath10k_ce_recv_buf_enqueue(ce_state, (void *)skb, | 1142 | ret = ath10k_ce_recv_buf_enqueue(ce_state, (void *)skb, |
1142 | ce_data); | 1143 | ce_data); |
1143 | if (ret) { | 1144 | if (ret) { |
1144 | ath10k_warn("could not enqueue to pipe %d (%d)\n", | 1145 | ath10k_warn("failed to enqueue to pipe %d: %d\n", |
1145 | num, ret); | 1146 | num, ret); |
1146 | goto err; | 1147 | goto err; |
1147 | } | 1148 | } |
@@ -1171,8 +1172,8 @@ static int ath10k_pci_post_rx(struct ath10k *ar) | |||
1171 | ret = ath10k_pci_post_rx_pipe(pipe_info, | 1172 | ret = ath10k_pci_post_rx_pipe(pipe_info, |
1172 | attr->dest_nentries - 1); | 1173 | attr->dest_nentries - 1); |
1173 | if (ret) { | 1174 | if (ret) { |
1174 | ath10k_warn("Unable to replenish recv buffers for pipe: %d\n", | 1175 | ath10k_warn("failed to post RX buffer for pipe %d: %d\n", |
1175 | pipe_num); | 1176 | pipe_num, ret); |
1176 | 1177 | ||
1177 | for (; pipe_num >= 0; pipe_num--) { | 1178 | for (; pipe_num >= 0; pipe_num--) { |
1178 | pipe_info = &ar_pci->pipe_info[pipe_num]; | 1179 | pipe_info = &ar_pci->pipe_info[pipe_num]; |
@@ -1192,14 +1193,15 @@ static int ath10k_pci_hif_start(struct ath10k *ar) | |||
1192 | 1193 | ||
1193 | ret = ath10k_pci_start_ce(ar); | 1194 | ret = ath10k_pci_start_ce(ar); |
1194 | if (ret) { | 1195 | if (ret) { |
1195 | ath10k_warn("could not start CE (%d)\n", ret); | 1196 | ath10k_warn("failed to start CE: %d\n", ret); |
1196 | return ret; | 1197 | return ret; |
1197 | } | 1198 | } |
1198 | 1199 | ||
1199 | /* Post buffers once to start things off. */ | 1200 | /* Post buffers once to start things off. */ |
1200 | ret = ath10k_pci_post_rx(ar); | 1201 | ret = ath10k_pci_post_rx(ar); |
1201 | if (ret) { | 1202 | if (ret) { |
1202 | ath10k_warn("could not post rx pipes (%d)\n", ret); | 1203 | ath10k_warn("failed to post RX buffers for all pipes: %d\n", |
1204 | ret); | ||
1203 | return ret; | 1205 | return ret; |
1204 | } | 1206 | } |
1205 | 1207 | ||
@@ -1593,7 +1595,7 @@ static int ath10k_pci_wake_target_cpu(struct ath10k *ar) | |||
1593 | CORE_CTRL_ADDRESS, | 1595 | CORE_CTRL_ADDRESS, |
1594 | &core_ctrl); | 1596 | &core_ctrl); |
1595 | if (ret) { | 1597 | if (ret) { |
1596 | ath10k_warn("Unable to read core ctrl\n"); | 1598 | ath10k_warn("failed to read core_ctrl: %d\n", ret); |
1597 | return ret; | 1599 | return ret; |
1598 | } | 1600 | } |
1599 | 1601 | ||
@@ -1603,10 +1605,13 @@ static int ath10k_pci_wake_target_cpu(struct ath10k *ar) | |||
1603 | ret = ath10k_pci_diag_write_access(ar, SOC_CORE_BASE_ADDRESS | | 1605 | ret = ath10k_pci_diag_write_access(ar, SOC_CORE_BASE_ADDRESS | |
1604 | CORE_CTRL_ADDRESS, | 1606 | CORE_CTRL_ADDRESS, |
1605 | core_ctrl); | 1607 | core_ctrl); |
1606 | if (ret) | 1608 | if (ret) { |
1607 | ath10k_warn("Unable to set interrupt mask\n"); | 1609 | ath10k_warn("failed to set target CPU interrupt mask: %d\n", |
1610 | ret); | ||
1611 | return ret; | ||
1612 | } | ||
1608 | 1613 | ||
1609 | return ret; | 1614 | return 0; |
1610 | } | 1615 | } |
1611 | 1616 | ||
1612 | static int ath10k_pci_init_config(struct ath10k *ar) | 1617 | static int ath10k_pci_init_config(struct ath10k *ar) |
@@ -1765,7 +1770,7 @@ static int ath10k_pci_ce_init(struct ath10k *ar) | |||
1765 | 1770 | ||
1766 | pipe_info->ce_hdl = ath10k_ce_init(ar, pipe_num, attr); | 1771 | pipe_info->ce_hdl = ath10k_ce_init(ar, pipe_num, attr); |
1767 | if (pipe_info->ce_hdl == NULL) { | 1772 | if (pipe_info->ce_hdl == NULL) { |
1768 | ath10k_err("Unable to initialize CE for pipe: %d\n", | 1773 | ath10k_err("failed to initialize CE for pipe: %d\n", |
1769 | pipe_num); | 1774 | pipe_num); |
1770 | 1775 | ||
1771 | /* It is safe to call it here. It checks if ce_hdl is | 1776 | /* It is safe to call it here. It checks if ce_hdl is |
@@ -1832,6 +1837,8 @@ static void ath10k_pci_start_bmi(struct ath10k *ar) | |||
1832 | 1837 | ||
1833 | pipe = &ar_pci->pipe_info[BMI_CE_NUM_TO_HOST]; | 1838 | pipe = &ar_pci->pipe_info[BMI_CE_NUM_TO_HOST]; |
1834 | ath10k_ce_recv_cb_register(pipe->ce_hdl, ath10k_pci_bmi_recv_data); | 1839 | ath10k_ce_recv_cb_register(pipe->ce_hdl, ath10k_pci_bmi_recv_data); |
1840 | |||
1841 | ath10k_dbg(ATH10K_DBG_BOOT, "boot start bmi\n"); | ||
1835 | } | 1842 | } |
1836 | 1843 | ||
1837 | static int ath10k_pci_hif_power_up(struct ath10k *ar) | 1844 | static int ath10k_pci_hif_power_up(struct ath10k *ar) |
@@ -1860,8 +1867,10 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar) | |||
1860 | ath10k_do_pci_wake(ar); | 1867 | ath10k_do_pci_wake(ar); |
1861 | 1868 | ||
1862 | ret = ath10k_pci_ce_init(ar); | 1869 | ret = ath10k_pci_ce_init(ar); |
1863 | if (ret) | 1870 | if (ret) { |
1871 | ath10k_err("failed to initialize CE: %d\n", ret); | ||
1864 | goto err_ps; | 1872 | goto err_ps; |
1873 | } | ||
1865 | 1874 | ||
1866 | ret = ath10k_ce_disable_interrupts(ar); | 1875 | ret = ath10k_ce_disable_interrupts(ar); |
1867 | if (ret) { | 1876 | if (ret) { |
@@ -1895,7 +1904,7 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar) | |||
1895 | 1904 | ||
1896 | ret = ath10k_pci_wake_target_cpu(ar); | 1905 | ret = ath10k_pci_wake_target_cpu(ar); |
1897 | if (ret) { | 1906 | if (ret) { |
1898 | ath10k_err("could not wake up target CPU (%d)\n", ret); | 1907 | ath10k_err("could not wake up target CPU: %d\n", ret); |
1899 | goto err_irq; | 1908 | goto err_irq; |
1900 | } | 1909 | } |
1901 | 1910 | ||
@@ -2397,7 +2406,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev, | |||
2397 | 2406 | ||
2398 | ar = ath10k_core_create(ar_pci, ar_pci->dev, &ath10k_pci_hif_ops); | 2407 | ar = ath10k_core_create(ar_pci, ar_pci->dev, &ath10k_pci_hif_ops); |
2399 | if (!ar) { | 2408 | if (!ar) { |
2400 | ath10k_err("ath10k_core_create failed!\n"); | 2409 | ath10k_err("failed to create driver core\n"); |
2401 | ret = -EINVAL; | 2410 | ret = -EINVAL; |
2402 | goto err_ar_pci; | 2411 | goto err_ar_pci; |
2403 | } | 2412 | } |
@@ -2416,20 +2425,20 @@ static int ath10k_pci_probe(struct pci_dev *pdev, | |||
2416 | */ | 2425 | */ |
2417 | ret = pci_assign_resource(pdev, BAR_NUM); | 2426 | ret = pci_assign_resource(pdev, BAR_NUM); |
2418 | if (ret) { | 2427 | if (ret) { |
2419 | ath10k_err("cannot assign PCI space: %d\n", ret); | 2428 | ath10k_err("failed to assign PCI space: %d\n", ret); |
2420 | goto err_ar; | 2429 | goto err_ar; |
2421 | } | 2430 | } |
2422 | 2431 | ||
2423 | ret = pci_enable_device(pdev); | 2432 | ret = pci_enable_device(pdev); |
2424 | if (ret) { | 2433 | if (ret) { |
2425 | ath10k_err("cannot enable PCI device: %d\n", ret); | 2434 | ath10k_err("failed to enable PCI device: %d\n", ret); |
2426 | goto err_ar; | 2435 | goto err_ar; |
2427 | } | 2436 | } |
2428 | 2437 | ||
2429 | /* Request MMIO resources */ | 2438 | /* Request MMIO resources */ |
2430 | ret = pci_request_region(pdev, BAR_NUM, "ath"); | 2439 | ret = pci_request_region(pdev, BAR_NUM, "ath"); |
2431 | if (ret) { | 2440 | if (ret) { |
2432 | ath10k_err("PCI MMIO reservation error: %d\n", ret); | 2441 | ath10k_err("failed to request MMIO region: %d\n", ret); |
2433 | goto err_device; | 2442 | goto err_device; |
2434 | } | 2443 | } |
2435 | 2444 | ||
@@ -2439,13 +2448,13 @@ static int ath10k_pci_probe(struct pci_dev *pdev, | |||
2439 | */ | 2448 | */ |
2440 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | 2449 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
2441 | if (ret) { | 2450 | if (ret) { |
2442 | ath10k_err("32-bit DMA not available: %d\n", ret); | 2451 | ath10k_err("failed to set DMA mask to 32-bit: %d\n", ret); |
2443 | goto err_region; | 2452 | goto err_region; |
2444 | } | 2453 | } |
2445 | 2454 | ||
2446 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | 2455 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
2447 | if (ret) { | 2456 | if (ret) { |
2448 | ath10k_err("cannot enable 32-bit consistent DMA\n"); | 2457 | ath10k_err("failed to set consistent DMA mask to 32-bit\n"); |
2449 | goto err_region; | 2458 | goto err_region; |
2450 | } | 2459 | } |
2451 | 2460 | ||
@@ -2462,7 +2471,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev, | |||
2462 | /* Arrange for access to Target SoC registers. */ | 2471 | /* Arrange for access to Target SoC registers. */ |
2463 | mem = pci_iomap(pdev, BAR_NUM, 0); | 2472 | mem = pci_iomap(pdev, BAR_NUM, 0); |
2464 | if (!mem) { | 2473 | if (!mem) { |
2465 | ath10k_err("PCI iomap error\n"); | 2474 | ath10k_err("failed to perform IOMAP for BAR%d\n", BAR_NUM); |
2466 | ret = -EIO; | 2475 | ret = -EIO; |
2467 | goto err_master; | 2476 | goto err_master; |
2468 | } | 2477 | } |
@@ -2485,7 +2494,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev, | |||
2485 | 2494 | ||
2486 | ret = ath10k_core_register(ar, chip_id); | 2495 | ret = ath10k_core_register(ar, chip_id); |
2487 | if (ret) { | 2496 | if (ret) { |
2488 | ath10k_err("could not register driver core (%d)\n", ret); | 2497 | ath10k_err("failed to register driver core: %d\n", ret); |
2489 | goto err_iomap; | 2498 | goto err_iomap; |
2490 | } | 2499 | } |
2491 | 2500 | ||
@@ -2551,7 +2560,7 @@ static int __init ath10k_pci_init(void) | |||
2551 | 2560 | ||
2552 | ret = pci_register_driver(&ath10k_pci_driver); | 2561 | ret = pci_register_driver(&ath10k_pci_driver); |
2553 | if (ret) | 2562 | if (ret) |
2554 | ath10k_err("pci_register_driver failed [%d]\n", ret); | 2563 | ath10k_err("failed to register PCI driver: %d\n", ret); |
2555 | 2564 | ||
2556 | return ret; | 2565 | return ret; |
2557 | } | 2566 | } |