diff options
author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-06-11 05:29:36 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-08-12 03:22:12 -0400 |
commit | ec21e2ec367697b4803e82662bdff6c8567745fc (patch) | |
tree | cdb42f597ff5e60516bdab59d306006fd1fafd1c /drivers/net/fs_enet/fs_enet.h | |
parent | 5346ebf6db077d963e9d81af9df290d7f5532492 (diff) |
freescale: Move the Freescale drivers
Move the Freescale drivers into drivers/net/ethernet/freescale/ and
make the necessary Kconfig and Makefile changes.
CC: Sandeep Gopalpet <sandeep.kumar@freescale.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Shlomi Gridish <gridish@freescale.com>
CC: Li Yang <leoli@freescale.com>
CC: Pantelis Antoniou <pantelis.antoniou@gmail.com>
CC: Vitaly Bordug <vbordug@ru.mvista.com>
CC: Dan Malek <dmalek@jlc.net>
CC: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/fs_enet/fs_enet.h')
-rw-r--r-- | drivers/net/fs_enet/fs_enet.h | 244 |
1 files changed, 0 insertions, 244 deletions
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h deleted file mode 100644 index 1ece4b1a689e..000000000000 --- a/drivers/net/fs_enet/fs_enet.h +++ /dev/null | |||
@@ -1,244 +0,0 @@ | |||
1 | #ifndef FS_ENET_H | ||
2 | #define FS_ENET_H | ||
3 | |||
4 | #include <linux/mii.h> | ||
5 | #include <linux/netdevice.h> | ||
6 | #include <linux/types.h> | ||
7 | #include <linux/list.h> | ||
8 | #include <linux/phy.h> | ||
9 | #include <linux/dma-mapping.h> | ||
10 | |||
11 | #include <linux/fs_enet_pd.h> | ||
12 | #include <asm/fs_pd.h> | ||
13 | |||
14 | #ifdef CONFIG_CPM1 | ||
15 | #include <asm/cpm1.h> | ||
16 | #endif | ||
17 | |||
18 | #if defined(CONFIG_FS_ENET_HAS_FEC) | ||
19 | #include <asm/cpm.h> | ||
20 | |||
21 | #if defined(CONFIG_FS_ENET_MPC5121_FEC) | ||
22 | /* MPC5121 FEC has different register layout */ | ||
23 | struct fec { | ||
24 | u32 fec_reserved0; | ||
25 | u32 fec_ievent; /* Interrupt event reg */ | ||
26 | u32 fec_imask; /* Interrupt mask reg */ | ||
27 | u32 fec_reserved1; | ||
28 | u32 fec_r_des_active; /* Receive descriptor reg */ | ||
29 | u32 fec_x_des_active; /* Transmit descriptor reg */ | ||
30 | u32 fec_reserved2[3]; | ||
31 | u32 fec_ecntrl; /* Ethernet control reg */ | ||
32 | u32 fec_reserved3[6]; | ||
33 | u32 fec_mii_data; /* MII manage frame reg */ | ||
34 | u32 fec_mii_speed; /* MII speed control reg */ | ||
35 | u32 fec_reserved4[7]; | ||
36 | u32 fec_mib_ctrlstat; /* MIB control/status reg */ | ||
37 | u32 fec_reserved5[7]; | ||
38 | u32 fec_r_cntrl; /* Receive control reg */ | ||
39 | u32 fec_reserved6[15]; | ||
40 | u32 fec_x_cntrl; /* Transmit Control reg */ | ||
41 | u32 fec_reserved7[7]; | ||
42 | u32 fec_addr_low; /* Low 32bits MAC address */ | ||
43 | u32 fec_addr_high; /* High 16bits MAC address */ | ||
44 | u32 fec_opd; /* Opcode + Pause duration */ | ||
45 | u32 fec_reserved8[10]; | ||
46 | u32 fec_hash_table_high; /* High 32bits hash table */ | ||
47 | u32 fec_hash_table_low; /* Low 32bits hash table */ | ||
48 | u32 fec_grp_hash_table_high; /* High 32bits hash table */ | ||
49 | u32 fec_grp_hash_table_low; /* Low 32bits hash table */ | ||
50 | u32 fec_reserved9[7]; | ||
51 | u32 fec_x_wmrk; /* FIFO transmit water mark */ | ||
52 | u32 fec_reserved10; | ||
53 | u32 fec_r_bound; /* FIFO receive bound reg */ | ||
54 | u32 fec_r_fstart; /* FIFO receive start reg */ | ||
55 | u32 fec_reserved11[11]; | ||
56 | u32 fec_r_des_start; /* Receive descriptor ring */ | ||
57 | u32 fec_x_des_start; /* Transmit descriptor ring */ | ||
58 | u32 fec_r_buff_size; /* Maximum receive buff size */ | ||
59 | u32 fec_reserved12[26]; | ||
60 | u32 fec_dma_control; /* DMA Endian and other ctrl */ | ||
61 | }; | ||
62 | #endif | ||
63 | |||
64 | struct fec_info { | ||
65 | struct fec __iomem *fecp; | ||
66 | u32 mii_speed; | ||
67 | }; | ||
68 | #endif | ||
69 | |||
70 | #ifdef CONFIG_CPM2 | ||
71 | #include <asm/cpm2.h> | ||
72 | #endif | ||
73 | |||
74 | /* hw driver ops */ | ||
75 | struct fs_ops { | ||
76 | int (*setup_data)(struct net_device *dev); | ||
77 | int (*allocate_bd)(struct net_device *dev); | ||
78 | void (*free_bd)(struct net_device *dev); | ||
79 | void (*cleanup_data)(struct net_device *dev); | ||
80 | void (*set_multicast_list)(struct net_device *dev); | ||
81 | void (*adjust_link)(struct net_device *dev); | ||
82 | void (*restart)(struct net_device *dev); | ||
83 | void (*stop)(struct net_device *dev); | ||
84 | void (*napi_clear_rx_event)(struct net_device *dev); | ||
85 | void (*napi_enable_rx)(struct net_device *dev); | ||
86 | void (*napi_disable_rx)(struct net_device *dev); | ||
87 | void (*rx_bd_done)(struct net_device *dev); | ||
88 | void (*tx_kickstart)(struct net_device *dev); | ||
89 | u32 (*get_int_events)(struct net_device *dev); | ||
90 | void (*clear_int_events)(struct net_device *dev, u32 int_events); | ||
91 | void (*ev_error)(struct net_device *dev, u32 int_events); | ||
92 | int (*get_regs)(struct net_device *dev, void *p, int *sizep); | ||
93 | int (*get_regs_len)(struct net_device *dev); | ||
94 | void (*tx_restart)(struct net_device *dev); | ||
95 | }; | ||
96 | |||
97 | struct phy_info { | ||
98 | unsigned int id; | ||
99 | const char *name; | ||
100 | void (*startup) (struct net_device * dev); | ||
101 | void (*shutdown) (struct net_device * dev); | ||
102 | void (*ack_int) (struct net_device * dev); | ||
103 | }; | ||
104 | |||
105 | /* The FEC stores dest/src/type, data, and checksum for receive packets. | ||
106 | */ | ||
107 | #define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */ | ||
108 | #define MIN_MTU 46 /* this is data size */ | ||
109 | #define CRC_LEN 4 | ||
110 | |||
111 | #define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN) | ||
112 | #define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN) | ||
113 | |||
114 | /* Must be a multiple of 32 (to cover both FEC & FCC) */ | ||
115 | #define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31) | ||
116 | /* This is needed so that invalidate_xxx wont invalidate too much */ | ||
117 | #define ENET_RX_ALIGN 16 | ||
118 | #define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1) | ||
119 | |||
120 | struct fs_enet_private { | ||
121 | struct napi_struct napi; | ||
122 | struct device *dev; /* pointer back to the device (must be initialized first) */ | ||
123 | struct net_device *ndev; | ||
124 | spinlock_t lock; /* during all ops except TX pckt processing */ | ||
125 | spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */ | ||
126 | struct fs_platform_info *fpi; | ||
127 | const struct fs_ops *ops; | ||
128 | int rx_ring, tx_ring; | ||
129 | dma_addr_t ring_mem_addr; | ||
130 | void __iomem *ring_base; | ||
131 | struct sk_buff **rx_skbuff; | ||
132 | struct sk_buff **tx_skbuff; | ||
133 | cbd_t __iomem *rx_bd_base; /* Address of Rx and Tx buffers. */ | ||
134 | cbd_t __iomem *tx_bd_base; | ||
135 | cbd_t __iomem *dirty_tx; /* ring entries to be free()ed. */ | ||
136 | cbd_t __iomem *cur_rx; | ||
137 | cbd_t __iomem *cur_tx; | ||
138 | int tx_free; | ||
139 | struct net_device_stats stats; | ||
140 | struct timer_list phy_timer_list; | ||
141 | const struct phy_info *phy; | ||
142 | u32 msg_enable; | ||
143 | struct mii_if_info mii_if; | ||
144 | unsigned int last_mii_status; | ||
145 | int interrupt; | ||
146 | |||
147 | struct phy_device *phydev; | ||
148 | int oldduplex, oldspeed, oldlink; /* current settings */ | ||
149 | |||
150 | /* event masks */ | ||
151 | u32 ev_napi_rx; /* mask of NAPI rx events */ | ||
152 | u32 ev_rx; /* rx event mask */ | ||
153 | u32 ev_tx; /* tx event mask */ | ||
154 | u32 ev_err; /* error event mask */ | ||
155 | |||
156 | u16 bd_rx_empty; /* mask of BD rx empty */ | ||
157 | u16 bd_rx_err; /* mask of BD rx errors */ | ||
158 | |||
159 | union { | ||
160 | struct { | ||
161 | int idx; /* FEC1 = 0, FEC2 = 1 */ | ||
162 | void __iomem *fecp; /* hw registers */ | ||
163 | u32 hthi, htlo; /* state for multicast */ | ||
164 | } fec; | ||
165 | |||
166 | struct { | ||
167 | int idx; /* FCC1-3 = 0-2 */ | ||
168 | void __iomem *fccp; /* hw registers */ | ||
169 | void __iomem *ep; /* parameter ram */ | ||
170 | void __iomem *fcccp; /* hw registers cont. */ | ||
171 | void __iomem *mem; /* FCC DPRAM */ | ||
172 | u32 gaddrh, gaddrl; /* group address */ | ||
173 | } fcc; | ||
174 | |||
175 | struct { | ||
176 | int idx; /* FEC1 = 0, FEC2 = 1 */ | ||
177 | void __iomem *sccp; /* hw registers */ | ||
178 | void __iomem *ep; /* parameter ram */ | ||
179 | u32 hthi, htlo; /* state for multicast */ | ||
180 | } scc; | ||
181 | |||
182 | }; | ||
183 | }; | ||
184 | |||
185 | /***************************************************************************/ | ||
186 | |||
187 | void fs_init_bds(struct net_device *dev); | ||
188 | void fs_cleanup_bds(struct net_device *dev); | ||
189 | |||
190 | /***************************************************************************/ | ||
191 | |||
192 | #define DRV_MODULE_NAME "fs_enet" | ||
193 | #define PFX DRV_MODULE_NAME ": " | ||
194 | #define DRV_MODULE_VERSION "1.0" | ||
195 | #define DRV_MODULE_RELDATE "Aug 8, 2005" | ||
196 | |||
197 | /***************************************************************************/ | ||
198 | |||
199 | int fs_enet_platform_init(void); | ||
200 | void fs_enet_platform_cleanup(void); | ||
201 | |||
202 | /***************************************************************************/ | ||
203 | /* buffer descriptor access macros */ | ||
204 | |||
205 | /* access macros */ | ||
206 | #if defined(CONFIG_CPM1) | ||
207 | /* for a a CPM1 __raw_xxx's are sufficient */ | ||
208 | #define __cbd_out32(addr, x) __raw_writel(x, addr) | ||
209 | #define __cbd_out16(addr, x) __raw_writew(x, addr) | ||
210 | #define __cbd_in32(addr) __raw_readl(addr) | ||
211 | #define __cbd_in16(addr) __raw_readw(addr) | ||
212 | #else | ||
213 | /* for others play it safe */ | ||
214 | #define __cbd_out32(addr, x) out_be32(addr, x) | ||
215 | #define __cbd_out16(addr, x) out_be16(addr, x) | ||
216 | #define __cbd_in32(addr) in_be32(addr) | ||
217 | #define __cbd_in16(addr) in_be16(addr) | ||
218 | #endif | ||
219 | |||
220 | /* write */ | ||
221 | #define CBDW_SC(_cbd, _sc) __cbd_out16(&(_cbd)->cbd_sc, (_sc)) | ||
222 | #define CBDW_DATLEN(_cbd, _datlen) __cbd_out16(&(_cbd)->cbd_datlen, (_datlen)) | ||
223 | #define CBDW_BUFADDR(_cbd, _bufaddr) __cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr)) | ||
224 | |||
225 | /* read */ | ||
226 | #define CBDR_SC(_cbd) __cbd_in16(&(_cbd)->cbd_sc) | ||
227 | #define CBDR_DATLEN(_cbd) __cbd_in16(&(_cbd)->cbd_datlen) | ||
228 | #define CBDR_BUFADDR(_cbd) __cbd_in32(&(_cbd)->cbd_bufaddr) | ||
229 | |||
230 | /* set bits */ | ||
231 | #define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc)) | ||
232 | |||
233 | /* clear bits */ | ||
234 | #define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc)) | ||
235 | |||
236 | /*******************************************************************/ | ||
237 | |||
238 | extern const struct fs_ops fs_fec_ops; | ||
239 | extern const struct fs_ops fs_fcc_ops; | ||
240 | extern const struct fs_ops fs_scc_ops; | ||
241 | |||
242 | /*******************************************************************/ | ||
243 | |||
244 | #endif | ||