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authorAlexey Charkov <alchark@gmail.com>2014-05-03 08:40:53 -0400
committerDavid S. Miller <davem@davemloft.net>2014-05-05 15:36:41 -0400
commit5b579e212fc77b6731e2767a0658ae7b64a67a10 (patch)
tree3d2bbe24b1c6ffce7faa2fd0b8f5f262ed0326ca /drivers/net/ethernet/via
parent07c8e35a380430e1ec0ec1543dddb53a275081c1 (diff)
net: via-rhine: Convert #ifdef USE_MMIO to a runtime flag
This introduces another flag in 'quirks' to replace the preprocessor define (USE_MMIO) used to indicate whether the device needs a separate enable routine to operate in MMIO mode. All of the currently known platform Rhine cores operate in MMIO mode by default, and on PCI it is preferred over PIO for performance reasons. However, a comment in code suggests that some (?) early Rhine cores only work in PIO mode, so they should not be switched to MMIO. Enabling MMIO on PCI is still triggered by the same Kconfig option to avoid breaking user configs needlessly, but this can be changed going forward towards automatic runtime detection in case a list of PIO-only Rhine revisions can be compiled. This also fixes a couple of compiler warnings detected by Fengguang Wu's test bot (!USE_MMIO case): drivers/net/ethernet/via/via-rhine.c: In function 'rhine_init_one_pci': drivers/net/ethernet/via/via-rhine.c:1108:1: warning: label 'err_out_unmap' defined but not used [-Wunused-label] err_out_unmap: ^ drivers/net/ethernet/via/via-rhine.c:1022:6: warning: unused variable 'i' [-Wunused-variable] int i, rc; ^ drivers/net/ethernet/via/via-rhine.c:916:22: warning: 'quirks' may be used uninitialized in this function [-Wmaybe-uninitialized] phy_id = rp->quirks & rqIntPHY ? 1 : 0; ^ drivers/net/ethernet/via/via-rhine.c:1026:6: note: 'quirks' was declared here u32 quirks; ^ Signed-off-by: Alexey Charkov <alchark@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/via')
-rw-r--r--drivers/net/ethernet/via/via-rhine.c102
1 files changed, 55 insertions, 47 deletions
diff --git a/drivers/net/ethernet/via/via-rhine.c b/drivers/net/ethernet/via/via-rhine.c
index 13cfcced212e..981be0154be3 100644
--- a/drivers/net/ethernet/via/via-rhine.c
+++ b/drivers/net/ethernet/via/via-rhine.c
@@ -120,13 +120,6 @@ static const int multicast_filter_limit = 32;
120static const char version[] = 120static const char version[] =
121 "v1.10-LK" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker"; 121 "v1.10-LK" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker";
122 122
123/* This driver was written to use PCI memory space. Some early versions
124 of the Rhine may only work correctly with I/O space accesses. */
125#ifdef CONFIG_VIA_RHINE_MMIO
126#define USE_MMIO
127#else
128#endif
129
130MODULE_AUTHOR("Donald Becker <becker@scyld.com>"); 123MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
131MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver"); 124MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver");
132MODULE_LICENSE("GPL"); 125MODULE_LICENSE("GPL");
@@ -266,6 +259,10 @@ enum rhine_quirks {
266 rqRhineI = 0x0100, /* See comment below */ 259 rqRhineI = 0x0100, /* See comment below */
267 rqIntPHY = 0x0200, /* Integrated PHY */ 260 rqIntPHY = 0x0200, /* Integrated PHY */
268 rqMgmt = 0x0400, /* Management adapter */ 261 rqMgmt = 0x0400, /* Management adapter */
262 rqNeedEnMMIO = 0x0800, /* Whether the core needs to be
263 * switched from PIO mode to MMIO
264 * (only applies to PCI)
265 */
269}; 266};
270/* 267/*
271 * rqRhineI: VT86C100A (aka Rhine-I) uses different bits to enable 268 * rqRhineI: VT86C100A (aka Rhine-I) uses different bits to enable
@@ -353,13 +350,11 @@ enum bcr1_bits {
353 BCR1_MED1=0x80, /* for VT6102 */ 350 BCR1_MED1=0x80, /* for VT6102 */
354}; 351};
355 352
356#ifdef USE_MMIO
357/* Registers we check that mmio and reg are the same. */ 353/* Registers we check that mmio and reg are the same. */
358static const int mmio_verify_registers[] = { 354static const int mmio_verify_registers[] = {
359 RxConfig, TxConfig, IntrEnable, ConfigA, ConfigB, ConfigC, ConfigD, 355 RxConfig, TxConfig, IntrEnable, ConfigA, ConfigB, ConfigC, ConfigD,
360 0 356 0
361}; 357};
362#endif
363 358
364/* Bits in the interrupt status/mask registers. */ 359/* Bits in the interrupt status/mask registers. */
365enum intr_status_bits { 360enum intr_status_bits {
@@ -664,20 +659,46 @@ static void rhine_chip_reset(struct net_device *dev)
664 "failed" : "succeeded"); 659 "failed" : "succeeded");
665} 660}
666 661
667#ifdef USE_MMIO
668static void enable_mmio(long pioaddr, u32 quirks) 662static void enable_mmio(long pioaddr, u32 quirks)
669{ 663{
670 int n; 664 int n;
671 if (quirks & rqRhineI) { 665
672 /* More recent docs say that this bit is reserved ... */ 666 if (quirks & rqNeedEnMMIO) {
673 n = inb(pioaddr + ConfigA) | 0x20; 667 if (quirks & rqRhineI) {
674 outb(n, pioaddr + ConfigA); 668 /* More recent docs say that this bit is reserved */
675 } else { 669 n = inb(pioaddr + ConfigA) | 0x20;
676 n = inb(pioaddr + ConfigD) | 0x80; 670 outb(n, pioaddr + ConfigA);
677 outb(n, pioaddr + ConfigD); 671 } else {
672 n = inb(pioaddr + ConfigD) | 0x80;
673 outb(n, pioaddr + ConfigD);
674 }
678 } 675 }
679} 676}
680#endif 677
678static inline int verify_mmio(struct device *hwdev,
679 long pioaddr,
680 void __iomem *ioaddr,
681 u32 quirks)
682{
683 if (quirks & rqNeedEnMMIO) {
684 int i = 0;
685
686 /* Check that selected MMIO registers match the PIO ones */
687 while (mmio_verify_registers[i]) {
688 int reg = mmio_verify_registers[i++];
689 unsigned char a = inb(pioaddr+reg);
690 unsigned char b = readb(ioaddr+reg);
691
692 if (a != b) {
693 dev_err(hwdev,
694 "MMIO do not match PIO [%02x] (%02x != %02x)\n",
695 reg, a, b);
696 return -EIO;
697 }
698 }
699 }
700 return 0;
701}
681 702
682/* 703/*
683 * Loads bytes 0x00-0x05, 0x6E-0x6F, 0x78-0x7B from EEPROM 704 * Loads bytes 0x00-0x05, 0x6E-0x6F, 0x78-0x7B from EEPROM
@@ -697,14 +718,12 @@ static void rhine_reload_eeprom(long pioaddr, struct net_device *dev)
697 if (i > 512) 718 if (i > 512)
698 pr_info("%4d cycles used @ %s:%d\n", i, __func__, __LINE__); 719 pr_info("%4d cycles used @ %s:%d\n", i, __func__, __LINE__);
699 720
700#ifdef USE_MMIO
701 /* 721 /*
702 * Reloading from EEPROM overwrites ConfigA-D, so we must re-enable 722 * Reloading from EEPROM overwrites ConfigA-D, so we must re-enable
703 * MMIO. If reloading EEPROM was done first this could be avoided, but 723 * MMIO. If reloading EEPROM was done first this could be avoided, but
704 * it is not known if that still works with the "win98-reboot" problem. 724 * it is not known if that still works with the "win98-reboot" problem.
705 */ 725 */
706 enable_mmio(pioaddr, rp->quirks); 726 enable_mmio(pioaddr, rp->quirks);
707#endif
708 727
709 /* Turn off EEPROM-controlled wake-up (magic packet) */ 728 /* Turn off EEPROM-controlled wake-up (magic packet) */
710 if (rp->quirks & rqWOL) 729 if (rp->quirks & rqWOL)
@@ -1019,15 +1038,20 @@ static int rhine_init_one_pci(struct pci_dev *pdev,
1019 const struct pci_device_id *ent) 1038 const struct pci_device_id *ent)
1020{ 1039{
1021 struct device *hwdev = &pdev->dev; 1040 struct device *hwdev = &pdev->dev;
1022 int i, rc; 1041 int rc;
1023 long pioaddr, memaddr; 1042 long pioaddr, memaddr;
1024 void __iomem *ioaddr; 1043 void __iomem *ioaddr;
1025 int io_size = pdev->revision < VTunknown0 ? 128 : 256; 1044 int io_size = pdev->revision < VTunknown0 ? 128 : 256;
1026 u32 quirks; 1045
1027#ifdef USE_MMIO 1046/* This driver was written to use PCI memory space. Some early versions
1028 int bar = 1; 1047 * of the Rhine may only work correctly with I/O space accesses.
1048 * TODO: determine for which revisions this is true and assign the flag
1049 * in code as opposed to this Kconfig option (???)
1050 */
1051#ifdef CONFIG_VIA_RHINE_MMIO
1052 u32 quirks = rqNeedEnMMIO;
1029#else 1053#else
1030 int bar = 0; 1054 u32 quirks = 0;
1031#endif 1055#endif
1032 1056
1033/* when built into the kernel, we only print version if device is found */ 1057/* when built into the kernel, we only print version if device is found */
@@ -1040,9 +1064,9 @@ static int rhine_init_one_pci(struct pci_dev *pdev,
1040 goto err_out; 1064 goto err_out;
1041 1065
1042 if (pdev->revision < VTunknown0) { 1066 if (pdev->revision < VTunknown0) {
1043 quirks = rqRhineI; 1067 quirks |= rqRhineI;
1044 } else if (pdev->revision >= VT6102) { 1068 } else if (pdev->revision >= VT6102) {
1045 quirks = rqWOL | rqForceReset; 1069 quirks |= rqWOL | rqForceReset;
1046 if (pdev->revision < VT6105) { 1070 if (pdev->revision < VT6105) {
1047 quirks |= rqStatusWBRace; 1071 quirks |= rqStatusWBRace;
1048 } else { 1072 } else {
@@ -1071,7 +1095,7 @@ static int rhine_init_one_pci(struct pci_dev *pdev,
1071 if (rc) 1095 if (rc)
1072 goto err_out_pci_disable; 1096 goto err_out_pci_disable;
1073 1097
1074 ioaddr = pci_iomap(pdev, bar, io_size); 1098 ioaddr = pci_iomap(pdev, (quirks & rqNeedEnMMIO ? 1 : 0), io_size);
1075 if (!ioaddr) { 1099 if (!ioaddr) {
1076 rc = -EIO; 1100 rc = -EIO;
1077 dev_err(hwdev, 1101 dev_err(hwdev,
@@ -1080,25 +1104,11 @@ static int rhine_init_one_pci(struct pci_dev *pdev,
1080 goto err_out_free_res; 1104 goto err_out_free_res;
1081 } 1105 }
1082 1106
1083#ifdef USE_MMIO
1084 enable_mmio(pioaddr, quirks); 1107 enable_mmio(pioaddr, quirks);
1085 1108
1086 /* Check that selected MMIO registers match the PIO ones */ 1109 rc = verify_mmio(hwdev, pioaddr, ioaddr, quirks);
1087 i = 0; 1110 if (rc)
1088 while (mmio_verify_registers[i]) { 1111 goto err_out_unmap;
1089 int reg = mmio_verify_registers[i++];
1090 unsigned char a = inb(pioaddr+reg);
1091 unsigned char b = readb(ioaddr+reg);
1092
1093 if (a != b) {
1094 rc = -EIO;
1095 dev_err(hwdev,
1096 "MMIO do not match PIO [%02x] (%02x != %02x)\n",
1097 reg, a, b);
1098 goto err_out_unmap;
1099 }
1100 }
1101#endif /* USE_MMIO */
1102 1112
1103 rc = rhine_init_one_common(&pdev->dev, quirks, 1113 rc = rhine_init_one_common(&pdev->dev, quirks,
1104 pioaddr, ioaddr, pdev->irq); 1114 pioaddr, ioaddr, pdev->irq);
@@ -2458,9 +2468,7 @@ static int rhine_resume(struct device *device)
2458 if (!netif_running(dev)) 2468 if (!netif_running(dev))
2459 return 0; 2469 return 0;
2460 2470
2461#ifdef USE_MMIO
2462 enable_mmio(rp->pioaddr, rp->quirks); 2471 enable_mmio(rp->pioaddr, rp->quirks);
2463#endif
2464 rhine_power_init(dev); 2472 rhine_power_init(dev);
2465 free_tbufs(dev); 2473 free_tbufs(dev);
2466 free_rbufs(dev); 2474 free_rbufs(dev);