diff options
author | Raanan Avargil <raanan.avargil@intel.com> | 2015-07-06 09:58:54 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2015-08-05 19:53:47 -0400 |
commit | d582891594104adeea89307ddd31b31bcf2d95fa (patch) | |
tree | e731d1b369a0433165eb35546fdff4d1d49a69e5 /drivers/net/ethernet/intel | |
parent | f5ac7445ebdbfa8cd2d90ef2a58b8f4455bcb664 (diff) |
e1000e: Cosmetic changes
1) Replace spaces with tab.
2) Move ich8lan related define to the proper context.
Signed-off-by: Raanan Avargil <raanan.avargil@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ich8lan.h | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/regs.h | 5 |
2 files changed, 4 insertions, 5 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.h b/drivers/net/ethernet/intel/e1000e/ich8lan.h index 26459853c6be..34c551e322eb 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.h +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.h | |||
@@ -106,14 +106,14 @@ | |||
106 | #define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000 | 106 | #define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000 |
107 | 107 | ||
108 | /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */ | 108 | /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */ |
109 | #define E1000_RXDCTL_THRESH_UNIT_DESC 0x01000000 | 109 | #define E1000_RXDCTL_THRESH_UNIT_DESC 0x01000000 |
110 | 110 | ||
111 | #define K1_ENTRY_LATENCY 0 | 111 | #define K1_ENTRY_LATENCY 0 |
112 | #define K1_MIN_TIME 1 | 112 | #define K1_MIN_TIME 1 |
113 | #define NVM_SIZE_MULTIPLIER 4096 /*multiplier for NVMS field */ | 113 | #define NVM_SIZE_MULTIPLIER 4096 /*multiplier for NVMS field */ |
114 | #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs */ | 114 | #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs */ |
115 | #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ | 115 | #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ |
116 | 116 | #define E1000_TARC0_CB_MULTIQ_3_REQ (1 << 28 | 1 << 29) | |
117 | #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL | 117 | #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL |
118 | 118 | ||
119 | #define E1000_ICH_RAR_ENTRIES 7 | 119 | #define E1000_ICH_RAR_ENTRIES 7 |
diff --git a/drivers/net/ethernet/intel/e1000e/regs.h b/drivers/net/ethernet/intel/e1000e/regs.h index b24e5fee17f2..1d5e0b77062a 100644 --- a/drivers/net/ethernet/intel/e1000e/regs.h +++ b/drivers/net/ethernet/intel/e1000e/regs.h | |||
@@ -38,8 +38,8 @@ | |||
38 | #define E1000_FEXTNVM4 0x00024 /* Future Extended NVM 4 - RW */ | 38 | #define E1000_FEXTNVM4 0x00024 /* Future Extended NVM 4 - RW */ |
39 | #define E1000_FEXTNVM6 0x00010 /* Future Extended NVM 6 - RW */ | 39 | #define E1000_FEXTNVM6 0x00010 /* Future Extended NVM 6 - RW */ |
40 | #define E1000_FEXTNVM7 0x000E4 /* Future Extended NVM 7 - RW */ | 40 | #define E1000_FEXTNVM7 0x000E4 /* Future Extended NVM 7 - RW */ |
41 | #define E1000_FEXTNVM9 0x5BB4 /* Future Extended NVM 9 - RW */ | 41 | #define E1000_FEXTNVM9 0x5BB4 /* Future Extended NVM 9 - RW */ |
42 | #define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */ | 42 | #define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */ |
43 | #define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */ | 43 | #define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */ |
44 | #define E1000_FCT 0x00030 /* Flow Control Type - RW */ | 44 | #define E1000_FCT 0x00030 /* Flow Control Type - RW */ |
45 | #define E1000_VET 0x00038 /* VLAN Ether Type - RW */ | 45 | #define E1000_VET 0x00038 /* VLAN Ether Type - RW */ |
@@ -125,7 +125,6 @@ | |||
125 | (0x054E4 + ((_i - 16) * 8))) | 125 | (0x054E4 + ((_i - 16) * 8))) |
126 | #define E1000_SHRAL(_i) (0x05438 + ((_i) * 8)) | 126 | #define E1000_SHRAL(_i) (0x05438 + ((_i) * 8)) |
127 | #define E1000_SHRAH(_i) (0x0543C + ((_i) * 8)) | 127 | #define E1000_SHRAH(_i) (0x0543C + ((_i) * 8)) |
128 | #define E1000_TARC0_CB_MULTIQ_3_REQ (1 << 28 | 1 << 29) | ||
129 | #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ | 128 | #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ |
130 | #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ | 129 | #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ |
131 | #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ | 130 | #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ |