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authorDon Skidmore <donald.c.skidmore@intel.com>2014-11-06 22:53:35 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2014-11-11 09:18:56 -0500
commit9a75a1ac77fac4f63d7013c66c550fbf8e213715 (patch)
treef53a0f42ac9fb6b0861e6b2f8cb0af7490bfc0e4 /drivers/net/ethernet/intel
parent8d697e7e54eed5528c3cd720607af6c1d6032d42 (diff)
ixgbe: Add new support for X550 MAC's
This patch will add in the new MAC defines and fit it into the switch cases throughout the driver. New functionality and enablement support will be added in following patches. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.c30
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c8
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c1
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c37
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c2
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_main.c90
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c4
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c64
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c6
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_type.h45
10 files changed, 223 insertions, 64 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 040670876183..0e754b4c4220 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -2799,6 +2799,8 @@ u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
2799 break; 2799 break;
2800 case ixgbe_mac_82599EB: 2800 case ixgbe_mac_82599EB:
2801 case ixgbe_mac_X540: 2801 case ixgbe_mac_X540:
2802 case ixgbe_mac_X550:
2803 case ixgbe_mac_X550EM_x:
2802 pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS; 2804 pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;
2803 max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599; 2805 max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;
2804 break; 2806 break;
@@ -3192,17 +3194,27 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
3192 *link_up = false; 3194 *link_up = false;
3193 } 3195 }
3194 3196
3195 if ((links_reg & IXGBE_LINKS_SPEED_82599) == 3197 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
3196 IXGBE_LINKS_SPEED_10G_82599) 3198 case IXGBE_LINKS_SPEED_10G_82599:
3197 *speed = IXGBE_LINK_SPEED_10GB_FULL; 3199 if ((hw->mac.type >= ixgbe_mac_X550) &&
3198 else if ((links_reg & IXGBE_LINKS_SPEED_82599) == 3200 (links_reg & IXGBE_LINKS_SPEED_NON_STD))
3199 IXGBE_LINKS_SPEED_1G_82599) 3201 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
3202 else
3203 *speed = IXGBE_LINK_SPEED_10GB_FULL;
3204 break;
3205 case IXGBE_LINKS_SPEED_1G_82599:
3200 *speed = IXGBE_LINK_SPEED_1GB_FULL; 3206 *speed = IXGBE_LINK_SPEED_1GB_FULL;
3201 else if ((links_reg & IXGBE_LINKS_SPEED_82599) == 3207 break;
3202 IXGBE_LINKS_SPEED_100_82599) 3208 case IXGBE_LINKS_SPEED_100_82599:
3203 *speed = IXGBE_LINK_SPEED_100_FULL; 3209 if ((hw->mac.type >= ixgbe_mac_X550) &&
3204 else 3210 (links_reg & IXGBE_LINKS_SPEED_NON_STD))
3211 *speed = IXGBE_LINK_SPEED_5GB_FULL;
3212 else
3213 *speed = IXGBE_LINK_SPEED_100_FULL;
3214 break;
3215 default:
3205 *speed = IXGBE_LINK_SPEED_UNKNOWN; 3216 *speed = IXGBE_LINK_SPEED_UNKNOWN;
3217 }
3206 3218
3207 return 0; 3219 return 0;
3208} 3220}
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
index 48f35fc963f8..a507a6fe3624 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
@@ -286,6 +286,8 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw,
286 bwgid, ptype); 286 bwgid, ptype);
287 case ixgbe_mac_82599EB: 287 case ixgbe_mac_82599EB:
288 case ixgbe_mac_X540: 288 case ixgbe_mac_X540:
289 case ixgbe_mac_X550:
290 case ixgbe_mac_X550EM_x:
289 return ixgbe_dcb_hw_config_82599(hw, pfc_en, refill, max, 291 return ixgbe_dcb_hw_config_82599(hw, pfc_en, refill, max,
290 bwgid, ptype, prio_tc); 292 bwgid, ptype, prio_tc);
291 default: 293 default:
@@ -302,6 +304,8 @@ s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)
302 return ixgbe_dcb_config_pfc_82598(hw, pfc_en); 304 return ixgbe_dcb_config_pfc_82598(hw, pfc_en);
303 case ixgbe_mac_82599EB: 305 case ixgbe_mac_82599EB:
304 case ixgbe_mac_X540: 306 case ixgbe_mac_X540:
307 case ixgbe_mac_X550:
308 case ixgbe_mac_X550EM_x:
305 return ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc); 309 return ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc);
306 default: 310 default:
307 break; 311 break;
@@ -357,6 +361,8 @@ s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw,
357 break; 361 break;
358 case ixgbe_mac_82599EB: 362 case ixgbe_mac_82599EB:
359 case ixgbe_mac_X540: 363 case ixgbe_mac_X540:
364 case ixgbe_mac_X550:
365 case ixgbe_mac_X550EM_x:
360 ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, 366 ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max,
361 bwg_id, prio_type, prio_tc); 367 bwg_id, prio_type, prio_tc);
362 ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, 368 ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
@@ -385,6 +391,8 @@ void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
385 switch (hw->mac.type) { 391 switch (hw->mac.type) {
386 case ixgbe_mac_82599EB: 392 case ixgbe_mac_82599EB:
387 case ixgbe_mac_X540: 393 case ixgbe_mac_X540:
394 case ixgbe_mac_X550:
395 case ixgbe_mac_X550EM_x:
388 ixgbe_dcb_read_rtrup2tc_82599(hw, map); 396 ixgbe_dcb_read_rtrup2tc_82599(hw, map);
389 break; 397 break;
390 default: 398 default:
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
index 58a7f5312a96..2707bda37418 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
@@ -180,6 +180,7 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
180 switch (adapter->hw.mac.type) { 180 switch (adapter->hw.mac.type) {
181 case ixgbe_mac_82599EB: 181 case ixgbe_mac_82599EB:
182 case ixgbe_mac_X540: 182 case ixgbe_mac_X540:
183 case ixgbe_mac_X550:
183 for (j = 0; j < netdev->addr_len; j++, i++) 184 for (j = 0; j < netdev->addr_len; j++, i++)
184 perm_addr[i] = adapter->hw.mac.san_addr[j]; 185 perm_addr[i] = adapter->hw.mac.san_addr[j];
185 break; 186 break;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
index 0ae038b9af90..26fd85e2bca5 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
@@ -511,6 +511,8 @@ static void ixgbe_get_regs(struct net_device *netdev,
511 break; 511 break;
512 case ixgbe_mac_82599EB: 512 case ixgbe_mac_82599EB:
513 case ixgbe_mac_X540: 513 case ixgbe_mac_X540:
514 case ixgbe_mac_X550:
515 case ixgbe_mac_X550EM_x:
514 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); 516 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
515 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); 517 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
516 break; 518 break;
@@ -622,6 +624,8 @@ static void ixgbe_get_regs(struct net_device *netdev,
622 break; 624 break;
623 case ixgbe_mac_82599EB: 625 case ixgbe_mac_82599EB:
624 case ixgbe_mac_X540: 626 case ixgbe_mac_X540:
627 case ixgbe_mac_X550:
628 case ixgbe_mac_X550EM_x:
625 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 629 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
626 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS); 630 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
627 for (i = 0; i < 8; i++) 631 for (i = 0; i < 8; i++)
@@ -1406,6 +1410,8 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1406 break; 1410 break;
1407 case ixgbe_mac_82599EB: 1411 case ixgbe_mac_82599EB:
1408 case ixgbe_mac_X540: 1412 case ixgbe_mac_X540:
1413 case ixgbe_mac_X550:
1414 case ixgbe_mac_X550EM_x:
1409 toggle = 0x7FFFF30F; 1415 toggle = 0x7FFFF30F;
1410 test = reg_test_82599; 1416 test = reg_test_82599;
1411 break; 1417 break;
@@ -1644,6 +1650,8 @@ static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1644 switch (hw->mac.type) { 1650 switch (hw->mac.type) {
1645 case ixgbe_mac_82599EB: 1651 case ixgbe_mac_82599EB:
1646 case ixgbe_mac_X540: 1652 case ixgbe_mac_X540:
1653 case ixgbe_mac_X550:
1654 case ixgbe_mac_X550EM_x:
1647 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); 1655 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1648 reg_ctl &= ~IXGBE_DMATXCTL_TE; 1656 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1649 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl); 1657 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
@@ -1680,6 +1688,8 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1680 switch (adapter->hw.mac.type) { 1688 switch (adapter->hw.mac.type) {
1681 case ixgbe_mac_82599EB: 1689 case ixgbe_mac_82599EB:
1682 case ixgbe_mac_X540: 1690 case ixgbe_mac_X540:
1691 case ixgbe_mac_X550:
1692 case ixgbe_mac_X550EM_x:
1683 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); 1693 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1684 reg_data |= IXGBE_DMATXCTL_TE; 1694 reg_data |= IXGBE_DMATXCTL_TE;
1685 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); 1695 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
@@ -1733,12 +1743,16 @@ static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1733 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; 1743 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1734 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); 1744 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1735 1745
1736 /* X540 needs to set the MACC.FLU bit to force link up */ 1746 /* X540 and X550 needs to set the MACC.FLU bit to force link up */
1737 if (adapter->hw.mac.type == ixgbe_mac_X540) { 1747 switch (adapter->hw.mac.type) {
1748 case ixgbe_mac_X540:
1749 case ixgbe_mac_X550:
1750 case ixgbe_mac_X550EM_x:
1738 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); 1751 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1739 reg_data |= IXGBE_MACC_FLU; 1752 reg_data |= IXGBE_MACC_FLU;
1740 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); 1753 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1741 } else { 1754 break;
1755 default:
1742 if (hw->mac.orig_autoc) { 1756 if (hw->mac.orig_autoc) {
1743 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; 1757 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
1744 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); 1758 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
@@ -2776,7 +2790,14 @@ static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2776 /* if we changed something we need to update flags */ 2790 /* if we changed something we need to update flags */
2777 if (flags2 != adapter->flags2) { 2791 if (flags2 != adapter->flags2) {
2778 struct ixgbe_hw *hw = &adapter->hw; 2792 struct ixgbe_hw *hw = &adapter->hw;
2779 u32 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 2793 u32 mrqc;
2794 unsigned int pf_pool = adapter->num_vfs;
2795
2796 if ((hw->mac.type >= ixgbe_mac_X550) &&
2797 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2798 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
2799 else
2800 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2780 2801
2781 if ((flags2 & UDP_RSS_FLAGS) && 2802 if ((flags2 & UDP_RSS_FLAGS) &&
2782 !(adapter->flags2 & UDP_RSS_FLAGS)) 2803 !(adapter->flags2 & UDP_RSS_FLAGS))
@@ -2799,7 +2820,11 @@ static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2799 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2820 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2800 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 2821 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2801 2822
2802 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 2823 if ((hw->mac.type >= ixgbe_mac_X550) &&
2824 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2825 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
2826 else
2827 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2803 } 2828 }
2804 2829
2805 return 0; 2830 return 0;
@@ -2833,6 +2858,8 @@ static int ixgbe_get_ts_info(struct net_device *dev,
2833 struct ixgbe_adapter *adapter = netdev_priv(dev); 2858 struct ixgbe_adapter *adapter = netdev_priv(dev);
2834 2859
2835 switch (adapter->hw.mac.type) { 2860 switch (adapter->hw.mac.type) {
2861 case ixgbe_mac_X550:
2862 case ixgbe_mac_X550EM_x:
2836 case ixgbe_mac_X540: 2863 case ixgbe_mac_X540:
2837 case ixgbe_mac_82599EB: 2864 case ixgbe_mac_82599EB:
2838 info->so_timestamping = 2865 info->so_timestamping =
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
index ce40c77381e9..68e1e757ecef 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
@@ -126,6 +126,8 @@ static void ixgbe_get_first_reg_idx(struct ixgbe_adapter *adapter, u8 tc,
126 break; 126 break;
127 case ixgbe_mac_82599EB: 127 case ixgbe_mac_82599EB:
128 case ixgbe_mac_X540: 128 case ixgbe_mac_X540:
129 case ixgbe_mac_X550:
130 case ixgbe_mac_X550EM_x:
129 if (num_tcs > 4) { 131 if (num_tcs > 4) {
130 /* 132 /*
131 * TCs : TC0/1 TC2/3 TC4-7 133 * TCs : TC0/1 TC2/3 TC4-7
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index d2df4e3d1032..355d1f79d274 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -835,6 +835,8 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
835 break; 835 break;
836 case ixgbe_mac_82599EB: 836 case ixgbe_mac_82599EB:
837 case ixgbe_mac_X540: 837 case ixgbe_mac_X540:
838 case ixgbe_mac_X550:
839 case ixgbe_mac_X550EM_x:
838 if (direction == -1) { 840 if (direction == -1) {
839 /* other causes */ 841 /* other causes */
840 msix_vector |= IXGBE_IVAR_ALLOC_VAL; 842 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
@@ -871,6 +873,8 @@ static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
871 break; 873 break;
872 case ixgbe_mac_82599EB: 874 case ixgbe_mac_82599EB:
873 case ixgbe_mac_X540: 875 case ixgbe_mac_X540:
876 case ixgbe_mac_X550:
877 case ixgbe_mac_X550EM_x:
874 mask = (qmask & 0xFFFFFFFF); 878 mask = (qmask & 0xFFFFFFFF);
875 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); 879 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
876 mask = (qmask >> 32); 880 mask = (qmask >> 32);
@@ -2155,6 +2159,8 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2155 break; 2159 break;
2156 case ixgbe_mac_82599EB: 2160 case ixgbe_mac_82599EB:
2157 case ixgbe_mac_X540: 2161 case ixgbe_mac_X540:
2162 case ixgbe_mac_X550:
2163 case ixgbe_mac_X550EM_x:
2158 ixgbe_set_ivar(adapter, -1, 1, v_idx); 2164 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2159 break; 2165 break;
2160 default: 2166 default:
@@ -2264,6 +2270,8 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2264 break; 2270 break;
2265 case ixgbe_mac_82599EB: 2271 case ixgbe_mac_82599EB:
2266 case ixgbe_mac_X540: 2272 case ixgbe_mac_X540:
2273 case ixgbe_mac_X550:
2274 case ixgbe_mac_X550EM_x:
2267 /* 2275 /*
2268 * set the WDIS bit to not clear the timer bits and cause an 2276 * set the WDIS bit to not clear the timer bits and cause an
2269 * immediate assertion of the interrupt 2277 * immediate assertion of the interrupt
@@ -2467,6 +2475,8 @@ static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2467 break; 2475 break;
2468 case ixgbe_mac_82599EB: 2476 case ixgbe_mac_82599EB:
2469 case ixgbe_mac_X540: 2477 case ixgbe_mac_X540:
2478 case ixgbe_mac_X550:
2479 case ixgbe_mac_X550EM_x:
2470 mask = (qmask & 0xFFFFFFFF); 2480 mask = (qmask & 0xFFFFFFFF);
2471 if (mask) 2481 if (mask)
2472 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); 2482 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
@@ -2493,6 +2503,8 @@ static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2493 break; 2503 break;
2494 case ixgbe_mac_82599EB: 2504 case ixgbe_mac_82599EB:
2495 case ixgbe_mac_X540: 2505 case ixgbe_mac_X540:
2506 case ixgbe_mac_X550:
2507 case ixgbe_mac_X550EM_x:
2496 mask = (qmask & 0xFFFFFFFF); 2508 mask = (qmask & 0xFFFFFFFF);
2497 if (mask) 2509 if (mask)
2498 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); 2510 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
@@ -2525,6 +2537,8 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2525 mask |= IXGBE_EIMS_GPI_SDP0; 2537 mask |= IXGBE_EIMS_GPI_SDP0;
2526 break; 2538 break;
2527 case ixgbe_mac_X540: 2539 case ixgbe_mac_X540:
2540 case ixgbe_mac_X550:
2541 case ixgbe_mac_X550EM_x:
2528 mask |= IXGBE_EIMS_TS; 2542 mask |= IXGBE_EIMS_TS;
2529 break; 2543 break;
2530 default: 2544 default:
@@ -2536,7 +2550,10 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2536 case ixgbe_mac_82599EB: 2550 case ixgbe_mac_82599EB:
2537 mask |= IXGBE_EIMS_GPI_SDP1; 2551 mask |= IXGBE_EIMS_GPI_SDP1;
2538 mask |= IXGBE_EIMS_GPI_SDP2; 2552 mask |= IXGBE_EIMS_GPI_SDP2;
2553 /* fall through */
2539 case ixgbe_mac_X540: 2554 case ixgbe_mac_X540:
2555 case ixgbe_mac_X550:
2556 case ixgbe_mac_X550EM_x:
2540 mask |= IXGBE_EIMS_ECC; 2557 mask |= IXGBE_EIMS_ECC;
2541 mask |= IXGBE_EIMS_MAILBOX; 2558 mask |= IXGBE_EIMS_MAILBOX;
2542 break; 2559 break;
@@ -2544,9 +2561,6 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2544 break; 2561 break;
2545 } 2562 }
2546 2563
2547 if (adapter->hw.mac.type == ixgbe_mac_X540)
2548 mask |= IXGBE_EIMS_TIMESYNC;
2549
2550 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) && 2564 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2551 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) 2565 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2552 mask |= IXGBE_EIMS_FLOW_DIR; 2566 mask |= IXGBE_EIMS_FLOW_DIR;
@@ -2592,6 +2606,8 @@ static irqreturn_t ixgbe_msix_other(int irq, void *data)
2592 switch (hw->mac.type) { 2606 switch (hw->mac.type) {
2593 case ixgbe_mac_82599EB: 2607 case ixgbe_mac_82599EB:
2594 case ixgbe_mac_X540: 2608 case ixgbe_mac_X540:
2609 case ixgbe_mac_X550:
2610 case ixgbe_mac_X550EM_x:
2595 if (eicr & IXGBE_EICR_ECC) { 2611 if (eicr & IXGBE_EICR_ECC) {
2596 e_info(link, "Received ECC Err, initiating reset\n"); 2612 e_info(link, "Received ECC Err, initiating reset\n");
2597 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED; 2613 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
@@ -2811,6 +2827,8 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
2811 ixgbe_check_sfp_event(adapter, eicr); 2827 ixgbe_check_sfp_event(adapter, eicr);
2812 /* Fall through */ 2828 /* Fall through */
2813 case ixgbe_mac_X540: 2829 case ixgbe_mac_X540:
2830 case ixgbe_mac_X550:
2831 case ixgbe_mac_X550EM_x:
2814 if (eicr & IXGBE_EICR_ECC) { 2832 if (eicr & IXGBE_EICR_ECC) {
2815 e_info(link, "Received ECC Err, initiating reset\n"); 2833 e_info(link, "Received ECC Err, initiating reset\n");
2816 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED; 2834 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
@@ -2905,6 +2923,8 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2905 break; 2923 break;
2906 case ixgbe_mac_82599EB: 2924 case ixgbe_mac_82599EB:
2907 case ixgbe_mac_X540: 2925 case ixgbe_mac_X540:
2926 case ixgbe_mac_X550:
2927 case ixgbe_mac_X550EM_x:
2908 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); 2928 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2909 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); 2929 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2910 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); 2930 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
@@ -3534,6 +3554,8 @@ static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3534 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 3554 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3535 3555
3536 switch (hw->mac.type) { 3556 switch (hw->mac.type) {
3557 case ixgbe_mac_X550:
3558 case ixgbe_mac_X550EM_x:
3537 case ixgbe_mac_82598EB: 3559 case ixgbe_mac_82598EB:
3538 /* 3560 /*
3539 * For VMDq support of different descriptor types or 3561 * For VMDq support of different descriptor types or
@@ -3657,6 +3679,8 @@ static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3657 break; 3679 break;
3658 case ixgbe_mac_82599EB: 3680 case ixgbe_mac_82599EB:
3659 case ixgbe_mac_X540: 3681 case ixgbe_mac_X540:
3682 case ixgbe_mac_X550:
3683 case ixgbe_mac_X550EM_x:
3660 for (i = 0; i < adapter->num_rx_queues; i++) { 3684 for (i = 0; i < adapter->num_rx_queues; i++) {
3661 struct ixgbe_ring *ring = adapter->rx_ring[i]; 3685 struct ixgbe_ring *ring = adapter->rx_ring[i];
3662 3686
@@ -3691,6 +3715,8 @@ static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3691 break; 3715 break;
3692 case ixgbe_mac_82599EB: 3716 case ixgbe_mac_82599EB:
3693 case ixgbe_mac_X540: 3717 case ixgbe_mac_X540:
3718 case ixgbe_mac_X550:
3719 case ixgbe_mac_X550EM_x:
3694 for (i = 0; i < adapter->num_rx_queues; i++) { 3720 for (i = 0; i < adapter->num_rx_queues; i++) {
3695 struct ixgbe_ring *ring = adapter->rx_ring[i]; 3721 struct ixgbe_ring *ring = adapter->rx_ring[i];
3696 3722
@@ -4112,6 +4138,8 @@ static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4112 /* Calculate delay value for device */ 4138 /* Calculate delay value for device */
4113 switch (hw->mac.type) { 4139 switch (hw->mac.type) {
4114 case ixgbe_mac_X540: 4140 case ixgbe_mac_X540:
4141 case ixgbe_mac_X550:
4142 case ixgbe_mac_X550EM_x:
4115 dv_id = IXGBE_DV_X540(link, tc); 4143 dv_id = IXGBE_DV_X540(link, tc);
4116 break; 4144 break;
4117 default: 4145 default:
@@ -4170,6 +4198,8 @@ static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4170 /* Calculate delay value for device */ 4198 /* Calculate delay value for device */
4171 switch (hw->mac.type) { 4199 switch (hw->mac.type) {
4172 case ixgbe_mac_X540: 4200 case ixgbe_mac_X540:
4201 case ixgbe_mac_X550:
4202 case ixgbe_mac_X550EM_x:
4173 dv_id = IXGBE_LOW_DV_X540(tc); 4203 dv_id = IXGBE_LOW_DV_X540(tc);
4174 break; 4204 break;
4175 default: 4205 default:
@@ -4606,6 +4636,8 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4606 break; 4636 break;
4607 case ixgbe_mac_82599EB: 4637 case ixgbe_mac_82599EB:
4608 case ixgbe_mac_X540: 4638 case ixgbe_mac_X540:
4639 case ixgbe_mac_X550:
4640 case ixgbe_mac_X550EM_x:
4609 default: 4641 default:
4610 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); 4642 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4611 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); 4643 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
@@ -4948,10 +4980,12 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
4948 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); 4980 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4949 } 4981 }
4950 4982
4951 /* Disable the Tx DMA engine on 82599 and X540 */ 4983 /* Disable the Tx DMA engine on 82599 and later MAC */
4952 switch (hw->mac.type) { 4984 switch (hw->mac.type) {
4953 case ixgbe_mac_82599EB: 4985 case ixgbe_mac_82599EB:
4954 case ixgbe_mac_X540: 4986 case ixgbe_mac_X540:
4987 case ixgbe_mac_X550:
4988 case ixgbe_mac_X550EM_x:
4955 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, 4989 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4956 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & 4990 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4957 ~IXGBE_DMATXCTL_TE)); 4991 ~IXGBE_DMATXCTL_TE));
@@ -5071,6 +5105,12 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5071 if (fwsm & IXGBE_FWSM_TS_ENABLED) 5105 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5072 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; 5106 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5073 break; 5107 break;
5108 case ixgbe_mac_X550EM_x:
5109 case ixgbe_mac_X550:
5110#ifdef CONFIG_IXGBE_DCA
5111 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5112#endif
5113 break;
5074 default: 5114 default:
5075 break; 5115 break;
5076 } 5116 }
@@ -5086,6 +5126,8 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5086#ifdef CONFIG_IXGBE_DCB 5126#ifdef CONFIG_IXGBE_DCB
5087 switch (hw->mac.type) { 5127 switch (hw->mac.type) {
5088 case ixgbe_mac_X540: 5128 case ixgbe_mac_X540:
5129 case ixgbe_mac_X550:
5130 case ixgbe_mac_X550EM_x:
5089 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS; 5131 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5090 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS; 5132 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5091 break; 5133 break;
@@ -5675,6 +5717,8 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5675 break; 5717 break;
5676 case ixgbe_mac_82599EB: 5718 case ixgbe_mac_82599EB:
5677 case ixgbe_mac_X540: 5719 case ixgbe_mac_X540:
5720 case ixgbe_mac_X550:
5721 case ixgbe_mac_X550EM_x:
5678 pci_wake_from_d3(pdev, !!wufc); 5722 pci_wake_from_d3(pdev, !!wufc);
5679 break; 5723 break;
5680 default: 5724 default:
@@ -5806,6 +5850,8 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5806 break; 5850 break;
5807 case ixgbe_mac_82599EB: 5851 case ixgbe_mac_82599EB:
5808 case ixgbe_mac_X540: 5852 case ixgbe_mac_X540:
5853 case ixgbe_mac_X550:
5854 case ixgbe_mac_X550EM_x:
5809 hwstats->pxonrxc[i] += 5855 hwstats->pxonrxc[i] +=
5810 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); 5856 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5811 break; 5857 break;
@@ -5819,7 +5865,9 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5819 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); 5865 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5820 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); 5866 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5821 if ((hw->mac.type == ixgbe_mac_82599EB) || 5867 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5822 (hw->mac.type == ixgbe_mac_X540)) { 5868 (hw->mac.type == ixgbe_mac_X540) ||
5869 (hw->mac.type == ixgbe_mac_X550) ||
5870 (hw->mac.type == ixgbe_mac_X550EM_x)) {
5823 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); 5871 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5824 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */ 5872 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5825 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)); 5873 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
@@ -5842,7 +5890,9 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5842 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); 5890 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5843 break; 5891 break;
5844 case ixgbe_mac_X540: 5892 case ixgbe_mac_X540:
5845 /* OS2BMC stats are X540 only*/ 5893 case ixgbe_mac_X550:
5894 case ixgbe_mac_X550EM_x:
5895 /* OS2BMC stats are X540 and later */
5846 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC); 5896 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5847 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC); 5897 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5848 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC); 5898 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
@@ -6110,6 +6160,8 @@ static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6110 } 6160 }
6111 break; 6161 break;
6112 case ixgbe_mac_X540: 6162 case ixgbe_mac_X540:
6163 case ixgbe_mac_X550:
6164 case ixgbe_mac_X550EM_x:
6113 case ixgbe_mac_82599EB: { 6165 case ixgbe_mac_82599EB: {
6114 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); 6166 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6115 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); 6167 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
@@ -6221,6 +6273,10 @@ static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6221 if (!adapter->num_vfs) 6273 if (!adapter->num_vfs)
6222 return false; 6274 return false;
6223 6275
6276 /* resetting the PF is only needed for MAC before X550 */
6277 if (hw->mac.type >= ixgbe_mac_X550)
6278 return false;
6279
6224 for (i = 0; i < adapter->num_vfs; i++) { 6280 for (i = 0; i < adapter->num_vfs; i++) {
6225 for (j = 0; j < q_per_pool; j++) { 6281 for (j = 0; j < q_per_pool; j++) {
6226 u32 h, t; 6282 u32 h, t;
@@ -6430,11 +6486,11 @@ static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6430 ciaa = (vf << 16) | 0x80000000; 6486 ciaa = (vf << 16) | 0x80000000;
6431 /* 32 bit read so align, we really want status at offset 6 */ 6487 /* 32 bit read so align, we really want status at offset 6 */
6432 ciaa |= PCI_COMMAND; 6488 ciaa |= PCI_COMMAND;
6433 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa); 6489 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6434 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599); 6490 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_BY_MAC(hw));
6435 ciaa &= 0x7FFFFFFF; 6491 ciaa &= 0x7FFFFFFF;
6436 /* disable debug mode asap after reading data */ 6492 /* disable debug mode asap after reading data */
6437 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa); 6493 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6438 /* Get the upper 16 bits which will be the PCI status reg */ 6494 /* Get the upper 16 bits which will be the PCI status reg */
6439 ciad >>= 16; 6495 ciad >>= 16;
6440 if (ciad & PCI_STATUS_REC_MASTER_ABORT) { 6496 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
@@ -6442,11 +6498,11 @@ static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6442 /* Issue VFLR */ 6498 /* Issue VFLR */
6443 ciaa = (vf << 16) | 0x80000000; 6499 ciaa = (vf << 16) | 0x80000000;
6444 ciaa |= 0xA8; 6500 ciaa |= 0xA8;
6445 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa); 6501 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6446 ciad = 0x00008000; /* VFLR */ 6502 ciad = 0x00008000; /* VFLR */
6447 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad); 6503 IXGBE_WRITE_REG(hw, IXGBE_CIAD_BY_MAC(hw), ciad);
6448 ciaa &= 0x7FFFFFFF; 6504 ciaa &= 0x7FFFFFFF;
6449 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa); 6505 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6450 } 6506 }
6451 } 6507 }
6452} 6508}
@@ -8098,6 +8154,8 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8098 switch (adapter->hw.mac.type) { 8154 switch (adapter->hw.mac.type) {
8099 case ixgbe_mac_82599EB: 8155 case ixgbe_mac_82599EB:
8100 case ixgbe_mac_X540: 8156 case ixgbe_mac_X540:
8157 case ixgbe_mac_X550:
8158 case ixgbe_mac_X550EM_x:
8101 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); 8159 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8102 break; 8160 break;
8103 default: 8161 default:
@@ -8161,6 +8219,8 @@ skip_sriov:
8161 switch (adapter->hw.mac.type) { 8219 switch (adapter->hw.mac.type) {
8162 case ixgbe_mac_82599EB: 8220 case ixgbe_mac_82599EB:
8163 case ixgbe_mac_X540: 8221 case ixgbe_mac_X540:
8222 case ixgbe_mac_X550:
8223 case ixgbe_mac_X550EM_x:
8164 netdev->features |= NETIF_F_SCTP_CSUM; 8224 netdev->features |= NETIF_F_SCTP_CSUM;
8165 netdev->hw_features |= NETIF_F_SCTP_CSUM | 8225 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8166 NETIF_F_NTUPLE; 8226 NETIF_F_NTUPLE;
@@ -8514,6 +8574,12 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8514 case ixgbe_mac_X540: 8574 case ixgbe_mac_X540:
8515 device_id = IXGBE_X540_VF_DEVICE_ID; 8575 device_id = IXGBE_X540_VF_DEVICE_ID;
8516 break; 8576 break;
8577 case ixgbe_mac_X550:
8578 device_id = IXGBE_DEV_ID_X550_VF;
8579 break;
8580 case ixgbe_mac_X550EM_x:
8581 device_id = IXGBE_DEV_ID_X550EM_X_VF;
8582 break;
8517 default: 8583 default:
8518 device_id = 0; 8584 device_id = 0;
8519 break; 8585 break;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c
index cc8f0128286c..9993a471d668 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c
@@ -305,6 +305,8 @@ static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
305 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); 305 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
306 break; 306 break;
307 case ixgbe_mac_X540: 307 case ixgbe_mac_X540:
308 case ixgbe_mac_X550:
309 case ixgbe_mac_X550EM_x:
308 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset)); 310 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
309 break; 311 break;
310 default: 312 default:
@@ -426,6 +428,8 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
426 struct ixgbe_mbx_info *mbx = &hw->mbx; 428 struct ixgbe_mbx_info *mbx = &hw->mbx;
427 429
428 if (hw->mac.type != ixgbe_mac_82599EB && 430 if (hw->mac.type != ixgbe_mac_82599EB &&
431 hw->mac.type != ixgbe_mac_X550 &&
432 hw->mac.type != ixgbe_mac_X550EM_x &&
429 hw->mac.type != ixgbe_mac_X540) 433 hw->mac.type != ixgbe_mac_X540)
430 return; 434 return;
431 435
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
index d47b19f27c35..dc97c03134ec 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
@@ -43,7 +43,7 @@ static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
43static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl); 43static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
44static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl); 44static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
45static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data); 45static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
46static bool ixgbe_get_i2c_data(u32 *i2cctl); 46static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
47static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); 47static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
48static enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id); 48static enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);
49static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw); 49static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
@@ -576,6 +576,10 @@ s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
576 *speed |= IXGBE_LINK_SPEED_100_FULL; 576 *speed |= IXGBE_LINK_SPEED_100_FULL;
577 } 577 }
578 578
579 /* Internal PHY does not support 100 Mbps */
580 if (hw->mac.type == ixgbe_mac_X550EM_x)
581 *speed &= ~IXGBE_LINK_SPEED_100_FULL;
582
579 return status; 583 return status;
580} 584}
581 585
@@ -632,10 +636,12 @@ s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
632 * @hw: pointer to hardware structure 636 * @hw: pointer to hardware structure
633 * 637 *
634 * Restart autonegotiation and PHY and waits for completion. 638 * Restart autonegotiation and PHY and waits for completion.
639 * This function always returns success, this is nessary since
640 * it is called via a function pointer that could call other
641 * functions that could return an error.
635 **/ 642 **/
636s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) 643s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw)
637{ 644{
638 s32 status;
639 u16 autoneg_reg = IXGBE_MII_AUTONEG_REG; 645 u16 autoneg_reg = IXGBE_MII_AUTONEG_REG;
640 bool autoneg = false; 646 bool autoneg = false;
641 ixgbe_link_speed speed; 647 ixgbe_link_speed speed;
@@ -701,7 +707,7 @@ s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw)
701 hw->phy.ops.write_reg(hw, MDIO_CTRL1, 707 hw->phy.ops.write_reg(hw, MDIO_CTRL1,
702 MDIO_MMD_AN, autoneg_reg); 708 MDIO_MMD_AN, autoneg_reg);
703 709
704 return status; 710 return 0;
705} 711}
706 712
707/** 713/**
@@ -1612,7 +1618,7 @@ fail:
1612 **/ 1618 **/
1613static void ixgbe_i2c_start(struct ixgbe_hw *hw) 1619static void ixgbe_i2c_start(struct ixgbe_hw *hw)
1614{ 1620{
1615 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1621 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1616 1622
1617 /* Start condition must begin with data and clock high */ 1623 /* Start condition must begin with data and clock high */
1618 ixgbe_set_i2c_data(hw, &i2cctl, 1); 1624 ixgbe_set_i2c_data(hw, &i2cctl, 1);
@@ -1641,7 +1647,7 @@ static void ixgbe_i2c_start(struct ixgbe_hw *hw)
1641 **/ 1647 **/
1642static void ixgbe_i2c_stop(struct ixgbe_hw *hw) 1648static void ixgbe_i2c_stop(struct ixgbe_hw *hw)
1643{ 1649{
1644 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1650 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1645 1651
1646 /* Stop condition must begin with data low and clock high */ 1652 /* Stop condition must begin with data low and clock high */
1647 ixgbe_set_i2c_data(hw, &i2cctl, 0); 1653 ixgbe_set_i2c_data(hw, &i2cctl, 0);
@@ -1699,9 +1705,9 @@ static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data)
1699 } 1705 }
1700 1706
1701 /* Release SDA line (set high) */ 1707 /* Release SDA line (set high) */
1702 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1708 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1703 i2cctl |= IXGBE_I2C_DATA_OUT; 1709 i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
1704 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, i2cctl); 1710 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
1705 IXGBE_WRITE_FLUSH(hw); 1711 IXGBE_WRITE_FLUSH(hw);
1706 1712
1707 return status; 1713 return status;
@@ -1717,7 +1723,7 @@ static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
1717{ 1723{
1718 s32 status = 0; 1724 s32 status = 0;
1719 u32 i = 0; 1725 u32 i = 0;
1720 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1726 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1721 u32 timeout = 10; 1727 u32 timeout = 10;
1722 bool ack = true; 1728 bool ack = true;
1723 1729
@@ -1730,8 +1736,8 @@ static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
1730 /* Poll for ACK. Note that ACK in I2C spec is 1736 /* Poll for ACK. Note that ACK in I2C spec is
1731 * transition from 1 to 0 */ 1737 * transition from 1 to 0 */
1732 for (i = 0; i < timeout; i++) { 1738 for (i = 0; i < timeout; i++) {
1733 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1739 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1734 ack = ixgbe_get_i2c_data(&i2cctl); 1740 ack = ixgbe_get_i2c_data(hw, &i2cctl);
1735 1741
1736 udelay(1); 1742 udelay(1);
1737 if (ack == 0) 1743 if (ack == 0)
@@ -1760,15 +1766,15 @@ static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
1760 **/ 1766 **/
1761static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) 1767static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
1762{ 1768{
1763 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1769 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1764 1770
1765 ixgbe_raise_i2c_clk(hw, &i2cctl); 1771 ixgbe_raise_i2c_clk(hw, &i2cctl);
1766 1772
1767 /* Minimum high period of clock is 4us */ 1773 /* Minimum high period of clock is 4us */
1768 udelay(IXGBE_I2C_T_HIGH); 1774 udelay(IXGBE_I2C_T_HIGH);
1769 1775
1770 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1776 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1771 *data = ixgbe_get_i2c_data(&i2cctl); 1777 *data = ixgbe_get_i2c_data(hw, &i2cctl);
1772 1778
1773 ixgbe_lower_i2c_clk(hw, &i2cctl); 1779 ixgbe_lower_i2c_clk(hw, &i2cctl);
1774 1780
@@ -1788,7 +1794,7 @@ static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
1788static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) 1794static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)
1789{ 1795{
1790 s32 status; 1796 s32 status;
1791 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1797 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1792 1798
1793 status = ixgbe_set_i2c_data(hw, &i2cctl, data); 1799 status = ixgbe_set_i2c_data(hw, &i2cctl, data);
1794 if (status == 0) { 1800 if (status == 0) {
@@ -1824,14 +1830,14 @@ static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1824 u32 i2cctl_r = 0; 1830 u32 i2cctl_r = 0;
1825 1831
1826 for (i = 0; i < timeout; i++) { 1832 for (i = 0; i < timeout; i++) {
1827 *i2cctl |= IXGBE_I2C_CLK_OUT; 1833 *i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw);
1828 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); 1834 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
1829 IXGBE_WRITE_FLUSH(hw); 1835 IXGBE_WRITE_FLUSH(hw);
1830 /* SCL rise time (1000ns) */ 1836 /* SCL rise time (1000ns) */
1831 udelay(IXGBE_I2C_T_RISE); 1837 udelay(IXGBE_I2C_T_RISE);
1832 1838
1833 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1839 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1834 if (i2cctl_r & IXGBE_I2C_CLK_IN) 1840 if (i2cctl_r & IXGBE_I2C_CLK_IN_BY_MAC(hw))
1835 break; 1841 break;
1836 } 1842 }
1837} 1843}
@@ -1846,9 +1852,9 @@ static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1846static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) 1852static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1847{ 1853{
1848 1854
1849 *i2cctl &= ~IXGBE_I2C_CLK_OUT; 1855 *i2cctl &= ~IXGBE_I2C_CLK_OUT_BY_MAC(hw);
1850 1856
1851 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); 1857 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
1852 IXGBE_WRITE_FLUSH(hw); 1858 IXGBE_WRITE_FLUSH(hw);
1853 1859
1854 /* SCL fall time (300ns) */ 1860 /* SCL fall time (300ns) */
@@ -1866,19 +1872,19 @@ static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1866static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) 1872static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
1867{ 1873{
1868 if (data) 1874 if (data)
1869 *i2cctl |= IXGBE_I2C_DATA_OUT; 1875 *i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
1870 else 1876 else
1871 *i2cctl &= ~IXGBE_I2C_DATA_OUT; 1877 *i2cctl &= ~IXGBE_I2C_DATA_OUT_BY_MAC(hw);
1872 1878
1873 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); 1879 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
1874 IXGBE_WRITE_FLUSH(hw); 1880 IXGBE_WRITE_FLUSH(hw);
1875 1881
1876 /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ 1882 /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */
1877 udelay(IXGBE_I2C_T_RISE + IXGBE_I2C_T_FALL + IXGBE_I2C_T_SU_DATA); 1883 udelay(IXGBE_I2C_T_RISE + IXGBE_I2C_T_FALL + IXGBE_I2C_T_SU_DATA);
1878 1884
1879 /* Verify data was set correctly */ 1885 /* Verify data was set correctly */
1880 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1886 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1881 if (data != ixgbe_get_i2c_data(i2cctl)) { 1887 if (data != ixgbe_get_i2c_data(hw, i2cctl)) {
1882 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); 1888 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data);
1883 return IXGBE_ERR_I2C; 1889 return IXGBE_ERR_I2C;
1884 } 1890 }
@@ -1893,9 +1899,9 @@ static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
1893 * 1899 *
1894 * Returns the I2C data bit value 1900 * Returns the I2C data bit value
1895 **/ 1901 **/
1896static bool ixgbe_get_i2c_data(u32 *i2cctl) 1902static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
1897{ 1903{
1898 if (*i2cctl & IXGBE_I2C_DATA_IN) 1904 if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw))
1899 return true; 1905 return true;
1900 return false; 1906 return false;
1901} 1907}
@@ -1909,7 +1915,7 @@ static bool ixgbe_get_i2c_data(u32 *i2cctl)
1909 **/ 1915 **/
1910static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) 1916static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw)
1911{ 1917{
1912 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1918 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
1913 u32 i; 1919 u32 i;
1914 1920
1915 ixgbe_i2c_start(hw); 1921 ixgbe_i2c_start(hw);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
index 0c25df506247..04eee7c7b653 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
@@ -1109,6 +1109,12 @@ static int ixgbe_enable_port_vlan(struct ixgbe_adapter *adapter, int vf,
1109 if (adapter->vfinfo[vf].spoofchk_enabled) 1109 if (adapter->vfinfo[vf].spoofchk_enabled)
1110 hw->mac.ops.set_vlan_anti_spoofing(hw, true, vf); 1110 hw->mac.ops.set_vlan_anti_spoofing(hw, true, vf);
1111 adapter->vfinfo[vf].vlan_count++; 1111 adapter->vfinfo[vf].vlan_count++;
1112
1113 /* enable hide vlan on X550 */
1114 if (hw->mac.type >= ixgbe_mac_X550)
1115 ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE |
1116 IXGBE_QDE_HIDE_VLAN);
1117
1112 adapter->vfinfo[vf].pf_vlan = vlan; 1118 adapter->vfinfo[vf].pf_vlan = vlan;
1113 adapter->vfinfo[vf].pf_qos = qos; 1119 adapter->vfinfo[vf].pf_qos = qos;
1114 dev_info(&adapter->pdev->dev, 1120 dev_info(&adapter->pdev->dev,
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index dfd55d83bc03..64de20d1de56 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -77,6 +77,8 @@
77/* VF Device IDs */ 77/* VF Device IDs */
78#define IXGBE_DEV_ID_82599_VF 0x10ED 78#define IXGBE_DEV_ID_82599_VF 0x10ED
79#define IXGBE_DEV_ID_X540_VF 0x1515 79#define IXGBE_DEV_ID_X540_VF 0x1515
80#define IXGBE_DEV_ID_X550_VF 0x1565
81#define IXGBE_DEV_ID_X550EM_X_VF 0x15A8
80 82
81/* General Registers */ 83/* General Registers */
82#define IXGBE_CTRL 0x00000 84#define IXGBE_CTRL 0x00000
@@ -84,7 +86,8 @@
84#define IXGBE_CTRL_EXT 0x00018 86#define IXGBE_CTRL_EXT 0x00018
85#define IXGBE_ESDP 0x00020 87#define IXGBE_ESDP 0x00020
86#define IXGBE_EODSDP 0x00028 88#define IXGBE_EODSDP 0x00028
87#define IXGBE_I2CCTL 0x00028 89#define IXGBE_I2CCTL_BY_MAC(_hw)((((_hw)->mac.type >= ixgbe_mac_X550) ? \
90 0x15F5C : 0x00028))
88#define IXGBE_LEDCTL 0x00200 91#define IXGBE_LEDCTL 0x00200
89#define IXGBE_FRTIMER 0x00048 92#define IXGBE_FRTIMER 0x00048
90#define IXGBE_TCPTIMER 0x0004C 93#define IXGBE_TCPTIMER 0x0004C
@@ -112,10 +115,14 @@
112#define IXGBE_VPDDIAG1 0x10208 115#define IXGBE_VPDDIAG1 0x10208
113 116
114/* I2CCTL Bit Masks */ 117/* I2CCTL Bit Masks */
115#define IXGBE_I2C_CLK_IN 0x00000001 118#define IXGBE_I2C_CLK_IN_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
116#define IXGBE_I2C_CLK_OUT 0x00000002 119 0x00004000 : 0x00000001)
117#define IXGBE_I2C_DATA_IN 0x00000004 120#define IXGBE_I2C_CLK_OUT_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
118#define IXGBE_I2C_DATA_OUT 0x00000008 121 0x00000200 : 0x00000002)
122#define IXGBE_I2C_DATA_IN_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
123 0x00001000 : 0x00000004)
124#define IXGBE_I2C_DATA_OUT_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
125 0x00000400 : 0x00000008)
119#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500 126#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500
120 127
121#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 128#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
@@ -292,6 +299,14 @@ struct ixgbe_thermal_sensor_data {
292#define IXGBE_RETA(_i) (0x05C00 + ((_i) * 4)) /* 32 of these (0-31) */ 299#define IXGBE_RETA(_i) (0x05C00 + ((_i) * 4)) /* 32 of these (0-31) */
293#define IXGBE_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* 10 of these (0-9) */ 300#define IXGBE_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* 10 of these (0-9) */
294 301
302/* Registers for setting up RSS on X550 with SRIOV
303 * _p - pool number (0..63)
304 * _i - index (0..10 for PFVFRSSRK, 0..15 for PFVFRETA)
305 */
306#define IXGBE_PFVFMRQC(_p) (0x03400 + ((_p) * 4))
307#define IXGBE_PFVFRSSRK(_i, _p) (0x018000 + ((_i) * 4) + ((_p) * 0x40))
308#define IXGBE_PFVFRETA(_i, _p) (0x019000 + ((_i) * 4) + ((_p) * 0x40))
309
295/* Flow Director registers */ 310/* Flow Director registers */
296#define IXGBE_FDIRCTRL 0x0EE00 311#define IXGBE_FDIRCTRL 0x0EE00
297#define IXGBE_FDIRHKEY 0x0EE68 312#define IXGBE_FDIRHKEY 0x0EE68
@@ -798,6 +813,12 @@ struct ixgbe_thermal_sensor_data {
798#define IXGBE_PBACLR_82599 0x11068 813#define IXGBE_PBACLR_82599 0x11068
799#define IXGBE_CIAA_82599 0x11088 814#define IXGBE_CIAA_82599 0x11088
800#define IXGBE_CIAD_82599 0x1108C 815#define IXGBE_CIAD_82599 0x1108C
816#define IXGBE_CIAA_X550 0x11508
817#define IXGBE_CIAD_X550 0x11510
818#define IXGBE_CIAA_BY_MAC(_hw) ((((_hw)->mac.type >= ixgbe_mac_X550) ? \
819 IXGBE_CIAA_X550 : IXGBE_CIAA_82599))
820#define IXGBE_CIAD_BY_MAC(_hw) ((((_hw)->mac.type >= ixgbe_mac_X550) ? \
821 IXGBE_CIAD_X550 : IXGBE_CIAD_82599))
801#define IXGBE_PICAUSE 0x110B0 822#define IXGBE_PICAUSE 0x110B0
802#define IXGBE_PIENA 0x110B8 823#define IXGBE_PIENA 0x110B8
803#define IXGBE_CDQ_MBR_82599 0x110B4 824#define IXGBE_CDQ_MBR_82599 0x110B4
@@ -1632,6 +1653,7 @@ enum {
1632#define IXGBE_LINKS_TL_FAULT 0x00001000 1653#define IXGBE_LINKS_TL_FAULT 0x00001000
1633#define IXGBE_LINKS_SIGNAL 0x00000F00 1654#define IXGBE_LINKS_SIGNAL 0x00000F00
1634 1655
1656#define IXGBE_LINKS_SPEED_NON_STD 0x08000000
1635#define IXGBE_LINKS_SPEED_82599 0x30000000 1657#define IXGBE_LINKS_SPEED_82599 0x30000000
1636#define IXGBE_LINKS_SPEED_10G_82599 0x30000000 1658#define IXGBE_LINKS_SPEED_10G_82599 0x30000000
1637#define IXGBE_LINKS_SPEED_1G_82599 0x20000000 1659#define IXGBE_LINKS_SPEED_1G_82599 0x20000000
@@ -2000,6 +2022,7 @@ enum {
2000 2022
2001/* Queue Drop Enable */ 2023/* Queue Drop Enable */
2002#define IXGBE_QDE_ENABLE 0x00000001 2024#define IXGBE_QDE_ENABLE 0x00000001
2025#define IXGBE_QDE_HIDE_VLAN 0x00000002
2003#define IXGBE_QDE_IDX_MASK 0x00007F00 2026#define IXGBE_QDE_IDX_MASK 0x00007F00
2004#define IXGBE_QDE_IDX_SHIFT 8 2027#define IXGBE_QDE_IDX_SHIFT 8
2005#define IXGBE_QDE_WRITE 0x00010000 2028#define IXGBE_QDE_WRITE 0x00010000
@@ -2437,10 +2460,12 @@ struct ixgbe_adv_tx_context_desc {
2437typedef u32 ixgbe_autoneg_advertised; 2460typedef u32 ixgbe_autoneg_advertised;
2438/* Link speed */ 2461/* Link speed */
2439typedef u32 ixgbe_link_speed; 2462typedef u32 ixgbe_link_speed;
2440#define IXGBE_LINK_SPEED_UNKNOWN 0 2463#define IXGBE_LINK_SPEED_UNKNOWN 0
2441#define IXGBE_LINK_SPEED_100_FULL 0x0008 2464#define IXGBE_LINK_SPEED_100_FULL 0x0008
2442#define IXGBE_LINK_SPEED_1GB_FULL 0x0020 2465#define IXGBE_LINK_SPEED_1GB_FULL 0x0020
2443#define IXGBE_LINK_SPEED_10GB_FULL 0x0080 2466#define IXGBE_LINK_SPEED_2_5GB_FULL 0x0400
2467#define IXGBE_LINK_SPEED_5GB_FULL 0x0800
2468#define IXGBE_LINK_SPEED_10GB_FULL 0x0080
2444#define IXGBE_LINK_SPEED_82598_AUTONEG (IXGBE_LINK_SPEED_1GB_FULL | \ 2469#define IXGBE_LINK_SPEED_82598_AUTONEG (IXGBE_LINK_SPEED_1GB_FULL | \
2445 IXGBE_LINK_SPEED_10GB_FULL) 2470 IXGBE_LINK_SPEED_10GB_FULL)
2446#define IXGBE_LINK_SPEED_82599_AUTONEG (IXGBE_LINK_SPEED_100_FULL | \ 2471#define IXGBE_LINK_SPEED_82599_AUTONEG (IXGBE_LINK_SPEED_100_FULL | \
@@ -2588,6 +2613,8 @@ enum ixgbe_mac_type {
2588 ixgbe_mac_82598EB, 2613 ixgbe_mac_82598EB,
2589 ixgbe_mac_82599EB, 2614 ixgbe_mac_82599EB,
2590 ixgbe_mac_X540, 2615 ixgbe_mac_X540,
2616 ixgbe_mac_X550,
2617 ixgbe_mac_X550EM_x,
2591 ixgbe_num_macs 2618 ixgbe_num_macs
2592}; 2619};
2593 2620