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authorAlexander Duyck <alexander.h.duyck@intel.com>2017-02-06 21:25:41 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2017-03-17 15:11:44 -0400
commit7ec0116c9131a8cd58dc456ae2bd5bc9976460d1 (patch)
tree95779db3ed1419a7ab5caa68c4bff439dadf7226 /drivers/net/ethernet/intel/igb/igb_main.c
parent7bd175928280c3e5d741cb9948cffaa61b7cc7c6 (diff)
igb: Use length to determine if descriptor is done
This change makes it so that we use the length of the packet instead of the DD status bit to determine if a new descriptor is ready to be processed. The obvious advantage is that it cuts down on reads as we don't really even need the DD bit if going from a 0 to a non-zero value on size is enough to inform us that the packet has been completed. In addition I have updated the code so that we only reset the Rx descriptor length for descriptor zero when resetting a ring instead of having to do a memset with 0 over the entire ring. By doing this we can save some time on initialization. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/igb_main.c')
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index cf7ee9cdac6f..1d76d3a90a17 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -3720,6 +3720,7 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,
3720 struct igb_ring *ring) 3720 struct igb_ring *ring)
3721{ 3721{
3722 struct e1000_hw *hw = &adapter->hw; 3722 struct e1000_hw *hw = &adapter->hw;
3723 union e1000_adv_rx_desc *rx_desc;
3723 u64 rdba = ring->dma; 3724 u64 rdba = ring->dma;
3724 int reg_idx = ring->reg_idx; 3725 int reg_idx = ring->reg_idx;
3725 u32 srrctl = 0, rxdctl = 0; 3726 u32 srrctl = 0, rxdctl = 0;
@@ -3758,6 +3759,10 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,
3758 rxdctl |= IGB_RX_HTHRESH << 8; 3759 rxdctl |= IGB_RX_HTHRESH << 8;
3759 rxdctl |= IGB_RX_WTHRESH << 16; 3760 rxdctl |= IGB_RX_WTHRESH << 16;
3760 3761
3762 /* initialize Rx descriptor 0 */
3763 rx_desc = IGB_RX_DESC(ring, 0);
3764 rx_desc->wb.upper.length = 0;
3765
3761 /* enable receive descriptor fetching */ 3766 /* enable receive descriptor fetching */
3762 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE; 3767 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3763 wr32(E1000_RXDCTL(reg_idx), rxdctl); 3768 wr32(E1000_RXDCTL(reg_idx), rxdctl);
@@ -3973,9 +3978,6 @@ static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3973 size = sizeof(struct igb_rx_buffer) * rx_ring->count; 3978 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3974 memset(rx_ring->rx_buffer_info, 0, size); 3979 memset(rx_ring->rx_buffer_info, 0, size);
3975 3980
3976 /* Zero out the descriptor ring */
3977 memset(rx_ring->desc, 0, rx_ring->size);
3978
3979 rx_ring->next_to_alloc = 0; 3981 rx_ring->next_to_alloc = 0;
3980 rx_ring->next_to_clean = 0; 3982 rx_ring->next_to_clean = 0;
3981 rx_ring->next_to_use = 0; 3983 rx_ring->next_to_use = 0;
@@ -7172,7 +7174,7 @@ static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7172 7174
7173 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean); 7175 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7174 7176
7175 if (!rx_desc->wb.upper.status_error) 7177 if (!rx_desc->wb.upper.length)
7176 break; 7178 break;
7177 7179
7178 /* This memory barrier is needed to keep us from reading 7180 /* This memory barrier is needed to keep us from reading
@@ -7312,8 +7314,8 @@ void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7312 i -= rx_ring->count; 7314 i -= rx_ring->count;
7313 } 7315 }
7314 7316
7315 /* clear the status bits for the next_to_use descriptor */ 7317 /* clear the length for the next_to_use descriptor */
7316 rx_desc->wb.upper.status_error = 0; 7318 rx_desc->wb.upper.length = 0;
7317 7319
7318 cleaned_count--; 7320 cleaned_count--;
7319 } while (cleaned_count); 7321 } while (cleaned_count);