ice: Add support for adaptive interrupt moderation

Currently the driver does not support adaptive/dynamic interrupt
moderation. This patch adds support for this. Also, adaptive/dynamic
interrupt moderation is turned on by default upon driver load.

In order to support adaptive interrupt moderation, two functions were
added, ice_update_itr() and ice_itr_divisor(). These are used to
determine the current packet load and to determine a divisor based
on link speed respectively.

This patch also adds the ICE_ITR_GRAN_S define that is used in the
hot-path when setting a new ITR value. The shift is used to pet two
birds with one hand, set the ITR value while re-enabling the
interrupt. Also, the ICE_ITR_GRAN_S is defined as 1 because the device
has a ITR granularity of 2usecs.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

1 files changed, 18 insertions, 6 deletions

diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c
index a1f523a9d39d..27c3760ae5cb 100644
--- a/drivers/net/ethernet/intel/ice/ice_lib.c
+++ b/drivers/net/ethernet/intel/ice/ice_lib.c
@@ -1717,22 +1717,34 @@ static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
 static void
 ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector, u16 vector)
 {
-        u8 itr_gran = hw->itr_gran;
-
         if (q_vector->num_ring_rx) {
                 struct ice_ring_container *rc = &q_vector->rx;
 
-                rc->itr = ITR_TO_REG(ICE_DFLT_RX_ITR, itr_gran);
+                /* if this value is set then don't overwrite with default */
+                if (!rc->itr_setting)
+                        rc->itr_setting = ICE_DFLT_RX_ITR;
+
+                rc->target_itr = ITR_TO_REG(rc->itr_setting);
+                rc->next_update = jiffies + 1;
+                rc->current_itr = rc->target_itr;
                 rc->latency_range = ICE_LOW_LATENCY;
-                wr32(hw, GLINT_ITR(rc->itr_idx, vector), rc->itr);
+                wr32(hw, GLINT_ITR(rc->itr_idx, vector),
+                     ITR_REG_ALIGN(rc->current_itr) >> ICE_ITR_GRAN_S);
         }
 
         if (q_vector->num_ring_tx) {
                 struct ice_ring_container *rc = &q_vector->tx;
 
-                rc->itr = ITR_TO_REG(ICE_DFLT_TX_ITR, itr_gran);
+                /* if this value is set then don't overwrite with default */
+                if (!rc->itr_setting)
+                        rc->itr_setting = ICE_DFLT_TX_ITR;
+
+                rc->target_itr = ITR_TO_REG(rc->itr_setting);
+                rc->next_update = jiffies + 1;
+                rc->current_itr = rc->target_itr;
                 rc->latency_range = ICE_LOW_LATENCY;
-                wr32(hw, GLINT_ITR(rc->itr_idx, vector), rc->itr);
+                wr32(hw, GLINT_ITR(rc->itr_idx, vector),
+                     ITR_REG_ALIGN(rc->current_itr) >> ICE_ITR_GRAN_S);
         }
 }