diff options
author | Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> | 2018-08-09 09:29:44 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2018-08-28 12:18:47 -0400 |
commit | 22ef683b48182f4d6125a2fb2725eb8a141514ff (patch) | |
tree | c53dec7d7d5e5a7e0c72461eeb57bb7ac737d765 /drivers/net/ethernet/intel/ice/ice_common.c | |
parent | 050cdc6c9501abcd64720b8cc3e7941efee9547d (diff) |
ice: Rework flex descriptor programming
The driver can support two flex descriptor profiles, ICE_RXDID_FLEX_NIC
and ICE_RXDID_FLEX_NIC_2. This patch reworks the current flex programming
logic to add support for the latter profile.
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_common.c')
-rw-r--r-- | drivers/net/ethernet/intel/ice/ice_common.c | 102 |
1 files changed, 79 insertions, 23 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 661beea6af79..53cbfd942d03 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c | |||
@@ -7,16 +7,16 @@ | |||
7 | 7 | ||
8 | #define ICE_PF_RESET_WAIT_COUNT 200 | 8 | #define ICE_PF_RESET_WAIT_COUNT 200 |
9 | 9 | ||
10 | #define ICE_NIC_FLX_ENTRY(hw, mdid, idx) \ | 10 | #define ICE_PROG_FLEX_ENTRY(hw, rxdid, mdid, idx) \ |
11 | wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(ICE_RXDID_FLEX_NIC), \ | 11 | wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \ |
12 | ((ICE_RX_OPC_MDID << \ | 12 | ((ICE_RX_OPC_MDID << \ |
13 | GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \ | 13 | GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \ |
14 | GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \ | 14 | GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \ |
15 | (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \ | 15 | (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \ |
16 | GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M)) | 16 | GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M)) |
17 | 17 | ||
18 | #define ICE_NIC_FLX_FLG_ENTRY(hw, flg_0, flg_1, flg_2, flg_3, idx) \ | 18 | #define ICE_PROG_FLG_ENTRY(hw, rxdid, flg_0, flg_1, flg_2, flg_3, idx) \ |
19 | wr32((hw), GLFLXP_RXDID_FLAGS(ICE_RXDID_FLEX_NIC, idx), \ | 19 | wr32((hw), GLFLXP_RXDID_FLAGS(rxdid, idx), \ |
20 | (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \ | 20 | (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \ |
21 | GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \ | 21 | GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \ |
22 | (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \ | 22 | (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \ |
@@ -290,30 +290,85 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, | |||
290 | } | 290 | } |
291 | 291 | ||
292 | /** | 292 | /** |
293 | * ice_init_flex_parser - initialize rx flex parser | 293 | * ice_init_flex_flags |
294 | * @hw: pointer to the hardware structure | 294 | * @hw: pointer to the hardware structure |
295 | * @prof_id: Rx Descriptor Builder profile ID | ||
295 | * | 296 | * |
296 | * Function to initialize flex descriptors | 297 | * Function to initialize Rx flex flags |
297 | */ | 298 | */ |
298 | static void ice_init_flex_parser(struct ice_hw *hw) | 299 | static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id) |
299 | { | 300 | { |
300 | u8 idx = 0; | 301 | u8 idx = 0; |
301 | 302 | ||
302 | ICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_HASH_LOW, 0); | 303 | /* Flex-flag fields (0-2) are programmed with FLG64 bits with layout: |
303 | ICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_HASH_HIGH, 1); | 304 | * flexiflags0[5:0] - TCP flags, is_packet_fragmented, is_packet_UDP_GRE |
304 | ICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_FLOW_ID_LOWER, 2); | 305 | * flexiflags1[3:0] - Not used for flag programming |
305 | ICE_NIC_FLX_ENTRY(hw, ICE_RX_MDID_FLOW_ID_HIGH, 3); | 306 | * flexiflags2[7:0] - Tunnel and VLAN types |
306 | ICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_PKT_FRG, ICE_RXFLG_UDP_GRE, | 307 | * 2 invalid fields in last index |
307 | ICE_RXFLG_PKT_DSI, ICE_RXFLG_FIN, idx++); | 308 | */ |
308 | ICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_SYN, ICE_RXFLG_RST, | 309 | switch (prof_id) { |
309 | ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++); | 310 | /* Rx flex flags are currently programmed for the NIC profiles only. |
310 | ICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, | 311 | * Different flag bit programming configurations can be added per |
311 | ICE_RXFLG_EVLAN_x8100, ICE_RXFLG_EVLAN_x9100, | 312 | * profile as needed. |
312 | idx++); | 313 | */ |
313 | ICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_VLAN_x8100, ICE_RXFLG_TNL_VLAN, | 314 | case ICE_RXDID_FLEX_NIC: |
314 | ICE_RXFLG_TNL_MAC, ICE_RXFLG_TNL0, idx++); | 315 | case ICE_RXDID_FLEX_NIC_2: |
315 | ICE_NIC_FLX_FLG_ENTRY(hw, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2, | 316 | ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_FRG, |
316 | ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx); | 317 | ICE_RXFLG_UDP_GRE, ICE_RXFLG_PKT_DSI, |
318 | ICE_RXFLG_FIN, idx++); | ||
319 | /* flex flag 1 is not used for flexi-flag programming, skipping | ||
320 | * these four FLG64 bits. | ||
321 | */ | ||
322 | ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_SYN, ICE_RXFLG_RST, | ||
323 | ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx++); | ||
324 | ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_PKT_DSI, | ||
325 | ICE_RXFLG_PKT_DSI, ICE_RXFLG_EVLAN_x8100, | ||
326 | ICE_RXFLG_EVLAN_x9100, idx++); | ||
327 | ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_VLAN_x8100, | ||
328 | ICE_RXFLG_TNL_VLAN, ICE_RXFLG_TNL_MAC, | ||
329 | ICE_RXFLG_TNL0, idx++); | ||
330 | ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_RXFLG_TNL1, ICE_RXFLG_TNL2, | ||
331 | ICE_RXFLG_PKT_DSI, ICE_RXFLG_PKT_DSI, idx); | ||
332 | break; | ||
333 | |||
334 | default: | ||
335 | ice_debug(hw, ICE_DBG_INIT, | ||
336 | "Flag programming for profile ID %d not supported\n", | ||
337 | prof_id); | ||
338 | } | ||
339 | } | ||
340 | |||
341 | /** | ||
342 | * ice_init_flex_flds | ||
343 | * @hw: pointer to the hardware structure | ||
344 | * @prof_id: Rx Descriptor Builder profile ID | ||
345 | * | ||
346 | * Function to initialize flex descriptors | ||
347 | */ | ||
348 | static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id) | ||
349 | { | ||
350 | enum ice_flex_rx_mdid mdid; | ||
351 | |||
352 | switch (prof_id) { | ||
353 | case ICE_RXDID_FLEX_NIC: | ||
354 | case ICE_RXDID_FLEX_NIC_2: | ||
355 | ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_LOW, 0); | ||
356 | ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_HASH_HIGH, 1); | ||
357 | ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_RX_MDID_FLOW_ID_LOWER, 2); | ||
358 | |||
359 | mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ? | ||
360 | ICE_RX_MDID_SRC_VSI : ICE_RX_MDID_FLOW_ID_HIGH; | ||
361 | |||
362 | ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3); | ||
363 | |||
364 | ice_init_flex_flags(hw, prof_id); | ||
365 | break; | ||
366 | |||
367 | default: | ||
368 | ice_debug(hw, ICE_DBG_INIT, | ||
369 | "Field init for profile ID %d not supported\n", | ||
370 | prof_id); | ||
371 | } | ||
317 | } | 372 | } |
318 | 373 | ||
319 | /** | 374 | /** |
@@ -494,7 +549,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw) | |||
494 | if (status) | 549 | if (status) |
495 | goto err_unroll_fltr_mgmt_struct; | 550 | goto err_unroll_fltr_mgmt_struct; |
496 | 551 | ||
497 | ice_init_flex_parser(hw); | 552 | ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC); |
553 | ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2); | ||
498 | 554 | ||
499 | return 0; | 555 | return 0; |
500 | 556 | ||