diff options
| author | Jesse Brandeburg <jesse.brandeburg@intel.com> | 2014-04-09 01:59:02 -0400 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2014-05-29 07:13:09 -0400 |
| commit | aee8087f6b8a5021db50b134974538cfec373e88 (patch) | |
| tree | 10f67d5275d3b152e8f7b28d7f1acdfb5e373654 /drivers/net/ethernet/intel/i40e/i40e_register.h | |
| parent | 89132783016ae770a5e1f1cc7660dc312e386a85 (diff) | |
i40e/i40evf: remove storm control
The storm control features are not part of the hardware
and mistakenly were left in the code. Remove them as
they are not needed any more.
Change-ID: I6e9277c8da2c52e69348a657bae25271449c2099
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/i40e/i40e_register.h')
| -rw-r--r-- | drivers/net/ethernet/intel/i40e/i40e_register.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h index 1d40f425acf1..25c928615f55 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_register.h +++ b/drivers/net/ethernet/intel/i40e/i40e_register.h | |||
| @@ -1340,8 +1340,6 @@ | |||
| 1340 | #define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT) | 1340 | #define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT) |
| 1341 | #define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23 | 1341 | #define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23 |
| 1342 | #define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT) | 1342 | #define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT) |
| 1343 | #define I40E_PFINT_ICR0_STORM_DETECT_SHIFT 24 | ||
| 1344 | #define I40E_PFINT_ICR0_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_STORM_DETECT_SHIFT) | ||
| 1345 | #define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25 | 1343 | #define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25 |
| 1346 | #define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT) | 1344 | #define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT) |
| 1347 | #define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26 | 1345 | #define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26 |
| @@ -1367,8 +1365,6 @@ | |||
| 1367 | #define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT) | 1365 | #define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT) |
| 1368 | #define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23 | 1366 | #define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23 |
| 1369 | #define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT) | 1367 | #define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT) |
| 1370 | #define I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT 24 | ||
| 1371 | #define I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT) | ||
| 1372 | #define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25 | 1368 | #define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25 |
| 1373 | #define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT) | 1369 | #define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT) |
| 1374 | #define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26 | 1370 | #define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26 |