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authorDavid S. Miller <davem@davemloft.net>2018-03-23 11:24:57 -0400
committerDavid S. Miller <davem@davemloft.net>2018-03-23 11:31:58 -0400
commit03fe2debbb2771fb90881e4ce8109b09cf772a5c (patch)
treefbaf8738296b2e9dcba81c6daef2d515b6c4948c /drivers/net/ethernet/intel/e1000e/defines.h
parent6686c459e1449a3ee5f3fd313b0a559ace7a700e (diff)
parentf36b7534b83357cf52e747905de6d65b4f7c2512 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Fun set of conflict resolutions here... For the mac80211 stuff, these were fortunately just parallel adds. Trivially resolved. In drivers/net/phy/phy.c we had a bug fix in 'net' that moved the function phy_disable_interrupts() earlier in the file, whilst in 'net-next' the phy_error() call from this function was removed. In net/ipv4/xfrm4_policy.c, David Ahern's changes to remove the 'rt_table_id' member of rtable collided with a bug fix in 'net' that added a new struct member "rt_mtu_locked" which needs to be copied over here. The mlxsw driver conflict consisted of net-next separating the span code and definitions into separate files, whilst a 'net' bug fix made some changes to that moved code. The mlx5 infiniband conflict resolution was quite non-trivial, the RDMA tree's merge commit was used as a guide here, and here are their notes: ==================== Due to bug fixes found by the syzkaller bot and taken into the for-rc branch after development for the 4.17 merge window had already started being taken into the for-next branch, there were fairly non-trivial merge issues that would need to be resolved between the for-rc branch and the for-next branch. This merge resolves those conflicts and provides a unified base upon which ongoing development for 4.17 can be based. Conflicts: drivers/infiniband/hw/mlx5/main.c - Commit 42cea83f9524 (IB/mlx5: Fix cleanup order on unload) added to for-rc and commit b5ca15ad7e61 (IB/mlx5: Add proper representors support) add as part of the devel cycle both needed to modify the init/de-init functions used by mlx5. To support the new representors, the new functions added by the cleanup patch needed to be made non-static, and the init/de-init list added by the representors patch needed to be modified to match the init/de-init list changes made by the cleanup patch. Updates: drivers/infiniband/hw/mlx5/mlx5_ib.h - Update function prototypes added by representors patch to reflect new function names as changed by cleanup patch drivers/infiniband/hw/mlx5/ib_rep.c - Update init/de-init stage list to match new order from cleanup patch ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/defines.h')
-rw-r--r--drivers/net/ethernet/intel/e1000e/defines.h21
1 files changed, 20 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
index afb7ebe20b24..824fd44e25f0 100644
--- a/drivers/net/ethernet/intel/e1000e/defines.h
+++ b/drivers/net/ethernet/intel/e1000e/defines.h
@@ -400,6 +400,10 @@
400#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */ 400#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */
401#define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */ 401#define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */
402#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */ 402#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */
403#define E1000_ICR_MDAC 0x00000200 /* MDIO Access Complete */
404#define E1000_ICR_SRPD 0x00010000 /* Small Receive Packet Detected */
405#define E1000_ICR_ACK 0x00020000 /* Receive ACK Frame Detected */
406#define E1000_ICR_MNG 0x00040000 /* Manageability Event Detected */
403#define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */ 407#define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */
404/* If this bit asserted, the driver should claim the interrupt */ 408/* If this bit asserted, the driver should claim the interrupt */
405#define E1000_ICR_INT_ASSERTED 0x80000000 409#define E1000_ICR_INT_ASSERTED 0x80000000
@@ -407,7 +411,7 @@
407#define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */ 411#define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */
408#define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */ 412#define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */
409#define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */ 413#define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */
410#define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */ 414#define E1000_ICR_OTHER 0x01000000 /* Other Interrupt */
411 415
412/* PBA ECC Register */ 416/* PBA ECC Register */
413#define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */ 417#define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */
@@ -431,12 +435,27 @@
431 E1000_IMS_RXSEQ | \ 435 E1000_IMS_RXSEQ | \
432 E1000_IMS_LSC) 436 E1000_IMS_LSC)
433 437
438/* These are all of the events related to the OTHER interrupt.
439 */
440#define IMS_OTHER_MASK ( \
441 E1000_IMS_LSC | \
442 E1000_IMS_RXO | \
443 E1000_IMS_MDAC | \
444 E1000_IMS_SRPD | \
445 E1000_IMS_ACK | \
446 E1000_IMS_MNG)
447
434/* Interrupt Mask Set */ 448/* Interrupt Mask Set */
435#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */ 449#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
436#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */ 450#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */
437#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */ 451#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */
438#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */ 452#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */
453#define E1000_IMS_RXO E1000_ICR_RXO /* Receiver Overrun */
439#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */ 454#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */
455#define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO Access Complete */
456#define E1000_IMS_SRPD E1000_ICR_SRPD /* Small Receive Packet */
457#define E1000_IMS_ACK E1000_ICR_ACK /* Receive ACK Frame Detected */
458#define E1000_IMS_MNG E1000_ICR_MNG /* Manageability Event */
440#define E1000_IMS_ECCER E1000_ICR_ECCER /* Uncorrectable ECC Error */ 459#define E1000_IMS_ECCER E1000_ICR_ECCER /* Uncorrectable ECC Error */
441#define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */ 460#define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
442#define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */ 461#define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */