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authorFrancois Romieu <romieu@fr.zoreil.com>2012-03-09 12:09:35 -0500
committerFrancois Romieu <romieu@fr.zoreil.com>2012-04-07 05:47:17 -0400
commit5e3cc4e3aaeae953c224bbe92f0ea8d90dfb1b63 (patch)
tree17036a76bef40888a86aa24f2056ffd017157562 /drivers/net/ethernet/dlink/dl2k.c
parent65712ec016788538d27c0b0452e57b751776914e (diff)
dl2k: stop using net_device.{base_addr, irq} and convert to __iomem.
The eeprom registers always use the same PCI bar whereas the general registers may either use the same mapping as the eeprom registers or a different one. It is thus possible to simplify parse_eeprom(). Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Diffstat (limited to 'drivers/net/ethernet/dlink/dl2k.c')
-rw-r--r--drivers/net/ethernet/dlink/dl2k.c416
1 files changed, 207 insertions, 209 deletions
diff --git a/drivers/net/ethernet/dlink/dl2k.c b/drivers/net/ethernet/dlink/dl2k.c
index b2dc2c81a147..ef4499d2ee4b 100644
--- a/drivers/net/ethernet/dlink/dl2k.c
+++ b/drivers/net/ethernet/dlink/dl2k.c
@@ -16,6 +16,13 @@
16#include "dl2k.h" 16#include "dl2k.h"
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18 18
19#define dw32(reg, val) iowrite32(val, ioaddr + (reg))
20#define dw16(reg, val) iowrite16(val, ioaddr + (reg))
21#define dw8(reg, val) iowrite8(val, ioaddr + (reg))
22#define dr32(reg) ioread32(ioaddr + (reg))
23#define dr16(reg) ioread16(ioaddr + (reg))
24#define dr8(reg) ioread8(ioaddr + (reg))
25
19static char version[] __devinitdata = 26static char version[] __devinitdata =
20 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n"; 27 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
21#define MAX_UNITS 8 28#define MAX_UNITS 8
@@ -49,8 +56,13 @@ module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
49/* Enable the default interrupts */ 56/* Enable the default interrupts */
50#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \ 57#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51 UpdateStats | LinkEvent) 58 UpdateStats | LinkEvent)
52#define EnableInt() \ 59
53writew(DEFAULT_INTR, ioaddr + IntEnable) 60static void dl2k_enable_int(struct netdev_private *np)
61{
62 void __iomem *ioaddr = np->ioaddr;
63
64 dw16(IntEnable, DEFAULT_INTR);
65}
54 66
55static const int max_intrloop = 50; 67static const int max_intrloop = 50;
56static const int multicast_filter_limit = 0x40; 68static const int multicast_filter_limit = 0x40;
@@ -73,7 +85,7 @@ static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
73static int rio_close (struct net_device *dev); 85static int rio_close (struct net_device *dev);
74static int find_miiphy (struct net_device *dev); 86static int find_miiphy (struct net_device *dev);
75static int parse_eeprom (struct net_device *dev); 87static int parse_eeprom (struct net_device *dev);
76static int read_eeprom (long ioaddr, int eep_addr); 88static int read_eeprom (struct netdev_private *, int eep_addr);
77static int mii_wait_link (struct net_device *dev, int wait); 89static int mii_wait_link (struct net_device *dev, int wait);
78static int mii_set_media (struct net_device *dev); 90static int mii_set_media (struct net_device *dev);
79static int mii_get_media (struct net_device *dev); 91static int mii_get_media (struct net_device *dev);
@@ -106,7 +118,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
106 static int card_idx; 118 static int card_idx;
107 int chip_idx = ent->driver_data; 119 int chip_idx = ent->driver_data;
108 int err, irq; 120 int err, irq;
109 long ioaddr; 121 void __iomem *ioaddr;
110 static int version_printed; 122 static int version_printed;
111 void *ring_space; 123 void *ring_space;
112 dma_addr_t ring_dma; 124 dma_addr_t ring_dma;
@@ -124,26 +136,29 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
124 goto err_out_disable; 136 goto err_out_disable;
125 137
126 pci_set_master (pdev); 138 pci_set_master (pdev);
139
140 err = -ENOMEM;
141
127 dev = alloc_etherdev (sizeof (*np)); 142 dev = alloc_etherdev (sizeof (*np));
128 if (!dev) { 143 if (!dev)
129 err = -ENOMEM;
130 goto err_out_res; 144 goto err_out_res;
131 }
132 SET_NETDEV_DEV(dev, &pdev->dev); 145 SET_NETDEV_DEV(dev, &pdev->dev);
133 146
134#ifdef MEM_MAPPING 147 np = netdev_priv(dev);
135 ioaddr = pci_resource_start (pdev, 1); 148
136 ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE); 149 /* IO registers range. */
137 if (!ioaddr) { 150 ioaddr = pci_iomap(pdev, 0, 0);
138 err = -ENOMEM; 151 if (!ioaddr)
139 goto err_out_dev; 152 goto err_out_dev;
140 } 153 np->eeprom_addr = ioaddr;
141#else 154
142 ioaddr = pci_resource_start (pdev, 0); 155#ifdef MEM_MAPPING
156 /* MM registers range. */
157 ioaddr = pci_iomap(pdev, 1, 0);
158 if (!ioaddr)
159 goto err_out_iounmap;
143#endif 160#endif
144 dev->base_addr = ioaddr; 161 np->ioaddr = ioaddr;
145 dev->irq = irq;
146 np = netdev_priv(dev);
147 np->chip_id = chip_idx; 162 np->chip_id = chip_idx;
148 np->pdev = pdev; 163 np->pdev = pdev;
149 spin_lock_init (&np->tx_lock); 164 spin_lock_init (&np->tx_lock);
@@ -239,7 +254,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
239 goto err_out_unmap_rx; 254 goto err_out_unmap_rx;
240 255
241 /* Fiber device? */ 256 /* Fiber device? */
242 np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0; 257 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0;
243 np->link_status = 0; 258 np->link_status = 0;
244 /* Set media and reset PHY */ 259 /* Set media and reset PHY */
245 if (np->phy_media) { 260 if (np->phy_media) {
@@ -276,22 +291,20 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
276 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan); 291 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
277 return 0; 292 return 0;
278 293
279 err_out_unmap_rx: 294err_out_unmap_rx:
280 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma); 295 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
281 err_out_unmap_tx: 296err_out_unmap_tx:
282 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma); 297 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
283 err_out_iounmap: 298err_out_iounmap:
284#ifdef MEM_MAPPING 299#ifdef MEM_MAPPING
285 iounmap ((void *) ioaddr); 300 pci_iounmap(pdev, np->ioaddr);
286
287 err_out_dev:
288#endif 301#endif
302 pci_iounmap(pdev, np->eeprom_addr);
303err_out_dev:
289 free_netdev (dev); 304 free_netdev (dev);
290 305err_out_res:
291 err_out_res:
292 pci_release_regions (pdev); 306 pci_release_regions (pdev);
293 307err_out_disable:
294 err_out_disable:
295 pci_disable_device (pdev); 308 pci_disable_device (pdev);
296 return err; 309 return err;
297} 310}
@@ -299,11 +312,9 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
299static int 312static int
300find_miiphy (struct net_device *dev) 313find_miiphy (struct net_device *dev)
301{ 314{
315 struct netdev_private *np = netdev_priv(dev);
302 int i, phy_found = 0; 316 int i, phy_found = 0;
303 struct netdev_private *np;
304 long ioaddr;
305 np = netdev_priv(dev); 317 np = netdev_priv(dev);
306 ioaddr = dev->base_addr;
307 np->phy_addr = 1; 318 np->phy_addr = 1;
308 319
309 for (i = 31; i >= 0; i--) { 320 for (i = 31; i >= 0; i--) {
@@ -323,26 +334,19 @@ find_miiphy (struct net_device *dev)
323static int 334static int
324parse_eeprom (struct net_device *dev) 335parse_eeprom (struct net_device *dev)
325{ 336{
337 struct netdev_private *np = netdev_priv(dev);
338 void __iomem *ioaddr = np->ioaddr;
326 int i, j; 339 int i, j;
327 long ioaddr = dev->base_addr;
328 u8 sromdata[256]; 340 u8 sromdata[256];
329 u8 *psib; 341 u8 *psib;
330 u32 crc; 342 u32 crc;
331 PSROM_t psrom = (PSROM_t) sromdata; 343 PSROM_t psrom = (PSROM_t) sromdata;
332 struct netdev_private *np = netdev_priv(dev);
333 344
334 int cid, next; 345 int cid, next;
335 346
336#ifdef MEM_MAPPING 347 for (i = 0; i < 128; i++)
337 ioaddr = pci_resource_start (np->pdev, 0); 348 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i));
338#endif 349
339 /* Read eeprom */
340 for (i = 0; i < 128; i++) {
341 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom (ioaddr, i));
342 }
343#ifdef MEM_MAPPING
344 ioaddr = dev->base_addr;
345#endif
346 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */ 350 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */
347 /* Check CRC */ 351 /* Check CRC */
348 crc = ~ether_crc_le (256 - 4, sromdata); 352 crc = ~ether_crc_le (256 - 4, sromdata);
@@ -378,8 +382,7 @@ parse_eeprom (struct net_device *dev)
378 return 0; 382 return 0;
379 case 2: /* Duplex Polarity */ 383 case 2: /* Duplex Polarity */
380 np->duplex_polarity = psib[i]; 384 np->duplex_polarity = psib[i];
381 writeb (readb (ioaddr + PhyCtrl) | psib[i], 385 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);
382 ioaddr + PhyCtrl);
383 break; 386 break;
384 case 3: /* Wake Polarity */ 387 case 3: /* Wake Polarity */
385 np->wake_polarity = psib[i]; 388 np->wake_polarity = psib[i];
@@ -407,59 +410,57 @@ static int
407rio_open (struct net_device *dev) 410rio_open (struct net_device *dev)
408{ 411{
409 struct netdev_private *np = netdev_priv(dev); 412 struct netdev_private *np = netdev_priv(dev);
410 long ioaddr = dev->base_addr; 413 void __iomem *ioaddr = np->ioaddr;
414 const int irq = np->pdev->irq;
411 int i; 415 int i;
412 u16 macctrl; 416 u16 macctrl;
413 417
414 i = request_irq (dev->irq, rio_interrupt, IRQF_SHARED, dev->name, dev); 418 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
415 if (i) 419 if (i)
416 return i; 420 return i;
417 421
418 /* Reset all logic functions */ 422 /* Reset all logic functions */
419 writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset, 423 dw16(ASICCtrl + 2,
420 ioaddr + ASICCtrl + 2); 424 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);
421 mdelay(10); 425 mdelay(10);
422 426
423 /* DebugCtrl bit 4, 5, 9 must set */ 427 /* DebugCtrl bit 4, 5, 9 must set */
424 writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl); 428 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);
425 429
426 /* Jumbo frame */ 430 /* Jumbo frame */
427 if (np->jumbo != 0) 431 if (np->jumbo != 0)
428 writew (MAX_JUMBO+14, ioaddr + MaxFrameSize); 432 dw16(MaxFrameSize, MAX_JUMBO+14);
429 433
430 alloc_list (dev); 434 alloc_list (dev);
431 435
432 /* Get station address */ 436 /* Get station address */
433 for (i = 0; i < 6; i++) 437 for (i = 0; i < 6; i++)
434 writeb (dev->dev_addr[i], ioaddr + StationAddr0 + i); 438 dw8(StationAddr0 + i, dev->dev_addr[i]);
435 439
436 set_multicast (dev); 440 set_multicast (dev);
437 if (np->coalesce) { 441 if (np->coalesce) {
438 writel (np->rx_coalesce | np->rx_timeout << 16, 442 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16);
439 ioaddr + RxDMAIntCtrl);
440 } 443 }
441 /* Set RIO to poll every N*320nsec. */ 444 /* Set RIO to poll every N*320nsec. */
442 writeb (0x20, ioaddr + RxDMAPollPeriod); 445 dw8(RxDMAPollPeriod, 0x20);
443 writeb (0xff, ioaddr + TxDMAPollPeriod); 446 dw8(TxDMAPollPeriod, 0xff);
444 writeb (0x30, ioaddr + RxDMABurstThresh); 447 dw8(RxDMABurstThresh, 0x30);
445 writeb (0x30, ioaddr + RxDMAUrgentThresh); 448 dw8(RxDMAUrgentThresh, 0x30);
446 writel (0x0007ffff, ioaddr + RmonStatMask); 449 dw32(RmonStatMask, 0x0007ffff);
447 /* clear statistics */ 450 /* clear statistics */
448 clear_stats (dev); 451 clear_stats (dev);
449 452
450 /* VLAN supported */ 453 /* VLAN supported */
451 if (np->vlan) { 454 if (np->vlan) {
452 /* priority field in RxDMAIntCtrl */ 455 /* priority field in RxDMAIntCtrl */
453 writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 << 10, 456 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10);
454 ioaddr + RxDMAIntCtrl);
455 /* VLANId */ 457 /* VLANId */
456 writew (np->vlan, ioaddr + VLANId); 458 dw16(VLANId, np->vlan);
457 /* Length/Type should be 0x8100 */ 459 /* Length/Type should be 0x8100 */
458 writel (0x8100 << 16 | np->vlan, ioaddr + VLANTag); 460 dw32(VLANTag, 0x8100 << 16 | np->vlan);
459 /* Enable AutoVLANuntagging, but disable AutoVLANtagging. 461 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
460 VLAN information tagged by TFC' VID, CFI fields. */ 462 VLAN information tagged by TFC' VID, CFI fields. */
461 writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging, 463 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging);
462 ioaddr + MACCtrl);
463 } 464 }
464 465
465 init_timer (&np->timer); 466 init_timer (&np->timer);
@@ -469,20 +470,18 @@ rio_open (struct net_device *dev)
469 add_timer (&np->timer); 470 add_timer (&np->timer);
470 471
471 /* Start Tx/Rx */ 472 /* Start Tx/Rx */
472 writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable, 473 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable);
473 ioaddr + MACCtrl);
474 474
475 macctrl = 0; 475 macctrl = 0;
476 macctrl |= (np->vlan) ? AutoVLANuntagging : 0; 476 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
477 macctrl |= (np->full_duplex) ? DuplexSelect : 0; 477 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
478 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0; 478 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
479 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0; 479 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
480 writew(macctrl, ioaddr + MACCtrl); 480 dw16(MACCtrl, macctrl);
481 481
482 netif_start_queue (dev); 482 netif_start_queue (dev);
483 483
484 /* Enable default interrupts */ 484 dl2k_enable_int(np);
485 EnableInt ();
486 return 0; 485 return 0;
487} 486}
488 487
@@ -533,10 +532,11 @@ rio_timer (unsigned long data)
533static void 532static void
534rio_tx_timeout (struct net_device *dev) 533rio_tx_timeout (struct net_device *dev)
535{ 534{
536 long ioaddr = dev->base_addr; 535 struct netdev_private *np = netdev_priv(dev);
536 void __iomem *ioaddr = np->ioaddr;
537 537
538 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n", 538 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
539 dev->name, readl (ioaddr + TxStatus)); 539 dev->name, dr32(TxStatus));
540 rio_free_tx(dev, 0); 540 rio_free_tx(dev, 0);
541 dev->if_port = 0; 541 dev->if_port = 0;
542 dev->trans_start = jiffies; /* prevent tx timeout */ 542 dev->trans_start = jiffies; /* prevent tx timeout */
@@ -547,6 +547,7 @@ static void
547alloc_list (struct net_device *dev) 547alloc_list (struct net_device *dev)
548{ 548{
549 struct netdev_private *np = netdev_priv(dev); 549 struct netdev_private *np = netdev_priv(dev);
550 void __iomem *ioaddr = np->ioaddr;
550 int i; 551 int i;
551 552
552 np->cur_rx = np->cur_tx = 0; 553 np->cur_rx = np->cur_tx = 0;
@@ -594,24 +595,23 @@ alloc_list (struct net_device *dev)
594 } 595 }
595 596
596 /* Set RFDListPtr */ 597 /* Set RFDListPtr */
597 writel (np->rx_ring_dma, dev->base_addr + RFDListPtr0); 598 dw32(RFDListPtr0, np->rx_ring_dma);
598 writel (0, dev->base_addr + RFDListPtr1); 599 dw32(RFDListPtr1, 0);
599} 600}
600 601
601static netdev_tx_t 602static netdev_tx_t
602start_xmit (struct sk_buff *skb, struct net_device *dev) 603start_xmit (struct sk_buff *skb, struct net_device *dev)
603{ 604{
604 struct netdev_private *np = netdev_priv(dev); 605 struct netdev_private *np = netdev_priv(dev);
606 void __iomem *ioaddr = np->ioaddr;
605 struct netdev_desc *txdesc; 607 struct netdev_desc *txdesc;
606 unsigned entry; 608 unsigned entry;
607 u32 ioaddr;
608 u64 tfc_vlan_tag = 0; 609 u64 tfc_vlan_tag = 0;
609 610
610 if (np->link_status == 0) { /* Link Down */ 611 if (np->link_status == 0) { /* Link Down */
611 dev_kfree_skb(skb); 612 dev_kfree_skb(skb);
612 return NETDEV_TX_OK; 613 return NETDEV_TX_OK;
613 } 614 }
614 ioaddr = dev->base_addr;
615 entry = np->cur_tx % TX_RING_SIZE; 615 entry = np->cur_tx % TX_RING_SIZE;
616 np->tx_skbuff[entry] = skb; 616 np->tx_skbuff[entry] = skb;
617 txdesc = &np->tx_ring[entry]; 617 txdesc = &np->tx_ring[entry];
@@ -646,9 +646,9 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)
646 (1 << FragCountShift)); 646 (1 << FragCountShift));
647 647
648 /* TxDMAPollNow */ 648 /* TxDMAPollNow */
649 writel (readl (ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl); 649 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000);
650 /* Schedule ISR */ 650 /* Schedule ISR */
651 writel(10000, ioaddr + CountDown); 651 dw32(CountDown, 10000);
652 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE; 652 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
653 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE 653 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
654 < TX_QUEUE_LEN - 1 && np->speed != 10) { 654 < TX_QUEUE_LEN - 1 && np->speed != 10) {
@@ -658,10 +658,10 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)
658 } 658 }
659 659
660 /* The first TFDListPtr */ 660 /* The first TFDListPtr */
661 if (readl (dev->base_addr + TFDListPtr0) == 0) { 661 if (!dr32(TFDListPtr0)) {
662 writel (np->tx_ring_dma + entry * sizeof (struct netdev_desc), 662 dw32(TFDListPtr0, np->tx_ring_dma +
663 dev->base_addr + TFDListPtr0); 663 entry * sizeof (struct netdev_desc));
664 writel (0, dev->base_addr + TFDListPtr1); 664 dw32(TFDListPtr1, 0);
665 } 665 }
666 666
667 return NETDEV_TX_OK; 667 return NETDEV_TX_OK;
@@ -671,17 +671,15 @@ static irqreturn_t
671rio_interrupt (int irq, void *dev_instance) 671rio_interrupt (int irq, void *dev_instance)
672{ 672{
673 struct net_device *dev = dev_instance; 673 struct net_device *dev = dev_instance;
674 struct netdev_private *np; 674 struct netdev_private *np = netdev_priv(dev);
675 void __iomem *ioaddr = np->ioaddr;
675 unsigned int_status; 676 unsigned int_status;
676 long ioaddr;
677 int cnt = max_intrloop; 677 int cnt = max_intrloop;
678 int handled = 0; 678 int handled = 0;
679 679
680 ioaddr = dev->base_addr;
681 np = netdev_priv(dev);
682 while (1) { 680 while (1) {
683 int_status = readw (ioaddr + IntStatus); 681 int_status = dr16(IntStatus);
684 writew (int_status, ioaddr + IntStatus); 682 dw16(IntStatus, int_status);
685 int_status &= DEFAULT_INTR; 683 int_status &= DEFAULT_INTR;
686 if (int_status == 0 || --cnt < 0) 684 if (int_status == 0 || --cnt < 0)
687 break; 685 break;
@@ -692,7 +690,7 @@ rio_interrupt (int irq, void *dev_instance)
692 /* TxDMAComplete interrupt */ 690 /* TxDMAComplete interrupt */
693 if ((int_status & (TxDMAComplete|IntRequested))) { 691 if ((int_status & (TxDMAComplete|IntRequested))) {
694 int tx_status; 692 int tx_status;
695 tx_status = readl (ioaddr + TxStatus); 693 tx_status = dr32(TxStatus);
696 if (tx_status & 0x01) 694 if (tx_status & 0x01)
697 tx_error (dev, tx_status); 695 tx_error (dev, tx_status);
698 /* Free used tx skbuffs */ 696 /* Free used tx skbuffs */
@@ -705,7 +703,7 @@ rio_interrupt (int irq, void *dev_instance)
705 rio_error (dev, int_status); 703 rio_error (dev, int_status);
706 } 704 }
707 if (np->cur_tx != np->old_tx) 705 if (np->cur_tx != np->old_tx)
708 writel (100, ioaddr + CountDown); 706 dw32(CountDown, 100);
709 return IRQ_RETVAL(handled); 707 return IRQ_RETVAL(handled);
710} 708}
711 709
@@ -765,13 +763,11 @@ rio_free_tx (struct net_device *dev, int irq)
765static void 763static void
766tx_error (struct net_device *dev, int tx_status) 764tx_error (struct net_device *dev, int tx_status)
767{ 765{
768 struct netdev_private *np; 766 struct netdev_private *np = netdev_priv(dev);
769 long ioaddr = dev->base_addr; 767 void __iomem *ioaddr = np->ioaddr;
770 int frame_id; 768 int frame_id;
771 int i; 769 int i;
772 770
773 np = netdev_priv(dev);
774
775 frame_id = (tx_status & 0xffff0000); 771 frame_id = (tx_status & 0xffff0000);
776 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n", 772 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
777 dev->name, tx_status, frame_id); 773 dev->name, tx_status, frame_id);
@@ -779,23 +775,21 @@ tx_error (struct net_device *dev, int tx_status)
779 /* Ttransmit Underrun */ 775 /* Ttransmit Underrun */
780 if (tx_status & 0x10) { 776 if (tx_status & 0x10) {
781 np->stats.tx_fifo_errors++; 777 np->stats.tx_fifo_errors++;
782 writew (readw (ioaddr + TxStartThresh) + 0x10, 778 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);
783 ioaddr + TxStartThresh);
784 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */ 779 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
785 writew (TxReset | DMAReset | FIFOReset | NetworkReset, 780 dw16(ASICCtrl + 2,
786 ioaddr + ASICCtrl + 2); 781 TxReset | DMAReset | FIFOReset | NetworkReset);
787 /* Wait for ResetBusy bit clear */ 782 /* Wait for ResetBusy bit clear */
788 for (i = 50; i > 0; i--) { 783 for (i = 50; i > 0; i--) {
789 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0) 784 if (!(dr16(ASICCtrl + 2) & ResetBusy))
790 break; 785 break;
791 mdelay (1); 786 mdelay (1);
792 } 787 }
793 rio_free_tx (dev, 1); 788 rio_free_tx (dev, 1);
794 /* Reset TFDListPtr */ 789 /* Reset TFDListPtr */
795 writel (np->tx_ring_dma + 790 dw32(TFDListPtr0, np->tx_ring_dma +
796 np->old_tx * sizeof (struct netdev_desc), 791 np->old_tx * sizeof (struct netdev_desc));
797 dev->base_addr + TFDListPtr0); 792 dw32(TFDListPtr1, 0);
798 writel (0, dev->base_addr + TFDListPtr1);
799 793
800 /* Let TxStartThresh stay default value */ 794 /* Let TxStartThresh stay default value */
801 } 795 }
@@ -803,10 +797,10 @@ tx_error (struct net_device *dev, int tx_status)
803 if (tx_status & 0x04) { 797 if (tx_status & 0x04) {
804 np->stats.tx_fifo_errors++; 798 np->stats.tx_fifo_errors++;
805 /* TxReset and clear FIFO */ 799 /* TxReset and clear FIFO */
806 writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2); 800 dw16(ASICCtrl + 2, TxReset | FIFOReset);
807 /* Wait reset done */ 801 /* Wait reset done */
808 for (i = 50; i > 0; i--) { 802 for (i = 50; i > 0; i--) {
809 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0) 803 if (!(dr16(ASICCtrl + 2) & ResetBusy))
810 break; 804 break;
811 mdelay (1); 805 mdelay (1);
812 } 806 }
@@ -821,7 +815,7 @@ tx_error (struct net_device *dev, int tx_status)
821 np->stats.collisions++; 815 np->stats.collisions++;
822#endif 816#endif
823 /* Restart the Tx */ 817 /* Restart the Tx */
824 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl); 818 dw32(MACCtrl, dr16(MACCtrl) | TxEnable);
825} 819}
826 820
827static int 821static int
@@ -931,8 +925,8 @@ receive_packet (struct net_device *dev)
931static void 925static void
932rio_error (struct net_device *dev, int int_status) 926rio_error (struct net_device *dev, int int_status)
933{ 927{
934 long ioaddr = dev->base_addr;
935 struct netdev_private *np = netdev_priv(dev); 928 struct netdev_private *np = netdev_priv(dev);
929 void __iomem *ioaddr = np->ioaddr;
936 u16 macctrl; 930 u16 macctrl;
937 931
938 /* Link change event */ 932 /* Link change event */
@@ -954,7 +948,7 @@ rio_error (struct net_device *dev, int int_status)
954 TxFlowControlEnable : 0; 948 TxFlowControlEnable : 0;
955 macctrl |= (np->rx_flow) ? 949 macctrl |= (np->rx_flow) ?
956 RxFlowControlEnable : 0; 950 RxFlowControlEnable : 0;
957 writew(macctrl, ioaddr + MACCtrl); 951 dw16(MACCtrl, macctrl);
958 np->link_status = 1; 952 np->link_status = 1;
959 netif_carrier_on(dev); 953 netif_carrier_on(dev);
960 } else { 954 } else {
@@ -974,7 +968,7 @@ rio_error (struct net_device *dev, int int_status)
974 if (int_status & HostError) { 968 if (int_status & HostError) {
975 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n", 969 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
976 dev->name, int_status); 970 dev->name, int_status);
977 writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2); 971 dw16(ASICCtrl + 2, GlobalReset | HostReset);
978 mdelay (500); 972 mdelay (500);
979 } 973 }
980} 974}
@@ -982,8 +976,8 @@ rio_error (struct net_device *dev, int int_status)
982static struct net_device_stats * 976static struct net_device_stats *
983get_stats (struct net_device *dev) 977get_stats (struct net_device *dev)
984{ 978{
985 long ioaddr = dev->base_addr;
986 struct netdev_private *np = netdev_priv(dev); 979 struct netdev_private *np = netdev_priv(dev);
980 void __iomem *ioaddr = np->ioaddr;
987#ifdef MEM_MAPPING 981#ifdef MEM_MAPPING
988 int i; 982 int i;
989#endif 983#endif
@@ -992,106 +986,107 @@ get_stats (struct net_device *dev)
992 /* All statistics registers need to be acknowledged, 986 /* All statistics registers need to be acknowledged,
993 else statistic overflow could cause problems */ 987 else statistic overflow could cause problems */
994 988
995 np->stats.rx_packets += readl (ioaddr + FramesRcvOk); 989 np->stats.rx_packets += dr32(FramesRcvOk);
996 np->stats.tx_packets += readl (ioaddr + FramesXmtOk); 990 np->stats.tx_packets += dr32(FramesXmtOk);
997 np->stats.rx_bytes += readl (ioaddr + OctetRcvOk); 991 np->stats.rx_bytes += dr32(OctetRcvOk);
998 np->stats.tx_bytes += readl (ioaddr + OctetXmtOk); 992 np->stats.tx_bytes += dr32(OctetXmtOk);
999 993
1000 np->stats.multicast = readl (ioaddr + McstFramesRcvdOk); 994 np->stats.multicast = dr32(McstFramesRcvdOk);
1001 np->stats.collisions += readl (ioaddr + SingleColFrames) 995 np->stats.collisions += dr32(SingleColFrames)
1002 + readl (ioaddr + MultiColFrames); 996 + dr32(MultiColFrames);
1003 997
1004 /* detailed tx errors */ 998 /* detailed tx errors */
1005 stat_reg = readw (ioaddr + FramesAbortXSColls); 999 stat_reg = dr16(FramesAbortXSColls);
1006 np->stats.tx_aborted_errors += stat_reg; 1000 np->stats.tx_aborted_errors += stat_reg;
1007 np->stats.tx_errors += stat_reg; 1001 np->stats.tx_errors += stat_reg;
1008 1002
1009 stat_reg = readw (ioaddr + CarrierSenseErrors); 1003 stat_reg = dr16(CarrierSenseErrors);
1010 np->stats.tx_carrier_errors += stat_reg; 1004 np->stats.tx_carrier_errors += stat_reg;
1011 np->stats.tx_errors += stat_reg; 1005 np->stats.tx_errors += stat_reg;
1012 1006
1013 /* Clear all other statistic register. */ 1007 /* Clear all other statistic register. */
1014 readl (ioaddr + McstOctetXmtOk); 1008 dr32(McstOctetXmtOk);
1015 readw (ioaddr + BcstFramesXmtdOk); 1009 dr16(BcstFramesXmtdOk);
1016 readl (ioaddr + McstFramesXmtdOk); 1010 dr32(McstFramesXmtdOk);
1017 readw (ioaddr + BcstFramesRcvdOk); 1011 dr16(BcstFramesRcvdOk);
1018 readw (ioaddr + MacControlFramesRcvd); 1012 dr16(MacControlFramesRcvd);
1019 readw (ioaddr + FrameTooLongErrors); 1013 dr16(FrameTooLongErrors);
1020 readw (ioaddr + InRangeLengthErrors); 1014 dr16(InRangeLengthErrors);
1021 readw (ioaddr + FramesCheckSeqErrors); 1015 dr16(FramesCheckSeqErrors);
1022 readw (ioaddr + FramesLostRxErrors); 1016 dr16(FramesLostRxErrors);
1023 readl (ioaddr + McstOctetXmtOk); 1017 dr32(McstOctetXmtOk);
1024 readl (ioaddr + BcstOctetXmtOk); 1018 dr32(BcstOctetXmtOk);
1025 readl (ioaddr + McstFramesXmtdOk); 1019 dr32(McstFramesXmtdOk);
1026 readl (ioaddr + FramesWDeferredXmt); 1020 dr32(FramesWDeferredXmt);
1027 readl (ioaddr + LateCollisions); 1021 dr32(LateCollisions);
1028 readw (ioaddr + BcstFramesXmtdOk); 1022 dr16(BcstFramesXmtdOk);
1029 readw (ioaddr + MacControlFramesXmtd); 1023 dr16(MacControlFramesXmtd);
1030 readw (ioaddr + FramesWEXDeferal); 1024 dr16(FramesWEXDeferal);
1031 1025
1032#ifdef MEM_MAPPING 1026#ifdef MEM_MAPPING
1033 for (i = 0x100; i <= 0x150; i += 4) 1027 for (i = 0x100; i <= 0x150; i += 4)
1034 readl (ioaddr + i); 1028 dr32(i);
1035#endif 1029#endif
1036 readw (ioaddr + TxJumboFrames); 1030 dr16(TxJumboFrames);
1037 readw (ioaddr + RxJumboFrames); 1031 dr16(RxJumboFrames);
1038 readw (ioaddr + TCPCheckSumErrors); 1032 dr16(TCPCheckSumErrors);
1039 readw (ioaddr + UDPCheckSumErrors); 1033 dr16(UDPCheckSumErrors);
1040 readw (ioaddr + IPCheckSumErrors); 1034 dr16(IPCheckSumErrors);
1041 return &np->stats; 1035 return &np->stats;
1042} 1036}
1043 1037
1044static int 1038static int
1045clear_stats (struct net_device *dev) 1039clear_stats (struct net_device *dev)
1046{ 1040{
1047 long ioaddr = dev->base_addr; 1041 struct netdev_private *np = netdev_priv(dev);
1042 void __iomem *ioaddr = np->ioaddr;
1048#ifdef MEM_MAPPING 1043#ifdef MEM_MAPPING
1049 int i; 1044 int i;
1050#endif 1045#endif
1051 1046
1052 /* All statistics registers need to be acknowledged, 1047 /* All statistics registers need to be acknowledged,
1053 else statistic overflow could cause problems */ 1048 else statistic overflow could cause problems */
1054 readl (ioaddr + FramesRcvOk); 1049 dr32(FramesRcvOk);
1055 readl (ioaddr + FramesXmtOk); 1050 dr32(FramesXmtOk);
1056 readl (ioaddr + OctetRcvOk); 1051 dr32(OctetRcvOk);
1057 readl (ioaddr + OctetXmtOk); 1052 dr32(OctetXmtOk);
1058 1053
1059 readl (ioaddr + McstFramesRcvdOk); 1054 dr32(McstFramesRcvdOk);
1060 readl (ioaddr + SingleColFrames); 1055 dr32(SingleColFrames);
1061 readl (ioaddr + MultiColFrames); 1056 dr32(MultiColFrames);
1062 readl (ioaddr + LateCollisions); 1057 dr32(LateCollisions);
1063 /* detailed rx errors */ 1058 /* detailed rx errors */
1064 readw (ioaddr + FrameTooLongErrors); 1059 dr16(FrameTooLongErrors);
1065 readw (ioaddr + InRangeLengthErrors); 1060 dr16(InRangeLengthErrors);
1066 readw (ioaddr + FramesCheckSeqErrors); 1061 dr16(FramesCheckSeqErrors);
1067 readw (ioaddr + FramesLostRxErrors); 1062 dr16(FramesLostRxErrors);
1068 1063
1069 /* detailed tx errors */ 1064 /* detailed tx errors */
1070 readw (ioaddr + FramesAbortXSColls); 1065 dr16(FramesAbortXSColls);
1071 readw (ioaddr + CarrierSenseErrors); 1066 dr16(CarrierSenseErrors);
1072 1067
1073 /* Clear all other statistic register. */ 1068 /* Clear all other statistic register. */
1074 readl (ioaddr + McstOctetXmtOk); 1069 dr32(McstOctetXmtOk);
1075 readw (ioaddr + BcstFramesXmtdOk); 1070 dr16(BcstFramesXmtdOk);
1076 readl (ioaddr + McstFramesXmtdOk); 1071 dr32(McstFramesXmtdOk);
1077 readw (ioaddr + BcstFramesRcvdOk); 1072 dr16(BcstFramesRcvdOk);
1078 readw (ioaddr + MacControlFramesRcvd); 1073 dr16(MacControlFramesRcvd);
1079 readl (ioaddr + McstOctetXmtOk); 1074 dr32(McstOctetXmtOk);
1080 readl (ioaddr + BcstOctetXmtOk); 1075 dr32(BcstOctetXmtOk);
1081 readl (ioaddr + McstFramesXmtdOk); 1076 dr32(McstFramesXmtdOk);
1082 readl (ioaddr + FramesWDeferredXmt); 1077 dr32(FramesWDeferredXmt);
1083 readw (ioaddr + BcstFramesXmtdOk); 1078 dr16(BcstFramesXmtdOk);
1084 readw (ioaddr + MacControlFramesXmtd); 1079 dr16(MacControlFramesXmtd);
1085 readw (ioaddr + FramesWEXDeferal); 1080 dr16(FramesWEXDeferal);
1086#ifdef MEM_MAPPING 1081#ifdef MEM_MAPPING
1087 for (i = 0x100; i <= 0x150; i += 4) 1082 for (i = 0x100; i <= 0x150; i += 4)
1088 readl (ioaddr + i); 1083 dr32(i);
1089#endif 1084#endif
1090 readw (ioaddr + TxJumboFrames); 1085 dr16(TxJumboFrames);
1091 readw (ioaddr + RxJumboFrames); 1086 dr16(RxJumboFrames);
1092 readw (ioaddr + TCPCheckSumErrors); 1087 dr16(TCPCheckSumErrors);
1093 readw (ioaddr + UDPCheckSumErrors); 1088 dr16(UDPCheckSumErrors);
1094 readw (ioaddr + IPCheckSumErrors); 1089 dr16(IPCheckSumErrors);
1095 return 0; 1090 return 0;
1096} 1091}
1097 1092
@@ -1114,10 +1109,10 @@ change_mtu (struct net_device *dev, int new_mtu)
1114static void 1109static void
1115set_multicast (struct net_device *dev) 1110set_multicast (struct net_device *dev)
1116{ 1111{
1117 long ioaddr = dev->base_addr; 1112 struct netdev_private *np = netdev_priv(dev);
1113 void __iomem *ioaddr = np->ioaddr;
1118 u32 hash_table[2]; 1114 u32 hash_table[2];
1119 u16 rx_mode = 0; 1115 u16 rx_mode = 0;
1120 struct netdev_private *np = netdev_priv(dev);
1121 1116
1122 hash_table[0] = hash_table[1] = 0; 1117 hash_table[0] = hash_table[1] = 0;
1123 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */ 1118 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
@@ -1153,9 +1148,9 @@ set_multicast (struct net_device *dev)
1153 rx_mode |= ReceiveVLANMatch; 1148 rx_mode |= ReceiveVLANMatch;
1154 } 1149 }
1155 1150
1156 writel (hash_table[0], ioaddr + HashTable0); 1151 dw32(HashTable0, hash_table[0]);
1157 writel (hash_table[1], ioaddr + HashTable1); 1152 dw32(HashTable1, hash_table[1]);
1158 writew (rx_mode, ioaddr + ReceiveMode); 1153 dw16(ReceiveMode, rx_mode);
1159} 1154}
1160 1155
1161static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1156static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
@@ -1318,15 +1313,15 @@ rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1318#define EEP_BUSY 0x8000 1313#define EEP_BUSY 0x8000
1319/* Read the EEPROM word */ 1314/* Read the EEPROM word */
1320/* We use I/O instruction to read/write eeprom to avoid fail on some machines */ 1315/* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1321static int 1316static int read_eeprom(struct netdev_private *np, int eep_addr)
1322read_eeprom (long ioaddr, int eep_addr)
1323{ 1317{
1318 void __iomem *ioaddr = np->eeprom_addr;
1324 int i = 1000; 1319 int i = 1000;
1325 outw (EEP_READ | (eep_addr & 0xff), ioaddr + EepromCtrl); 1320
1321 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff));
1326 while (i-- > 0) { 1322 while (i-- > 0) {
1327 if (!(inw (ioaddr + EepromCtrl) & EEP_BUSY)) { 1323 if (!(dr16(EepromCtrl) & EEP_BUSY))
1328 return inw (ioaddr + EepromData); 1324 return dr16(EepromData);
1329 }
1330 } 1325 }
1331 return 0; 1326 return 0;
1332} 1327}
@@ -1336,38 +1331,40 @@ enum phy_ctrl_bits {
1336 MII_DUPLEX = 0x08, 1331 MII_DUPLEX = 0x08,
1337}; 1332};
1338 1333
1339#define mii_delay() readb(ioaddr) 1334#define mii_delay() dr8(PhyCtrl)
1340static void 1335static void
1341mii_sendbit (struct net_device *dev, u32 data) 1336mii_sendbit (struct net_device *dev, u32 data)
1342{ 1337{
1343 long ioaddr = dev->base_addr + PhyCtrl; 1338 struct netdev_private *np = netdev_priv(dev);
1344 data = (data) ? MII_DATA1 : 0; 1339 void __iomem *ioaddr = np->ioaddr;
1345 data |= MII_WRITE; 1340
1346 data |= (readb (ioaddr) & 0xf8) | MII_WRITE; 1341 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE;
1347 writeb (data, ioaddr); 1342 dw8(PhyCtrl, data);
1348 mii_delay (); 1343 mii_delay ();
1349 writeb (data | MII_CLK, ioaddr); 1344 dw8(PhyCtrl, data | MII_CLK);
1350 mii_delay (); 1345 mii_delay ();
1351} 1346}
1352 1347
1353static int 1348static int
1354mii_getbit (struct net_device *dev) 1349mii_getbit (struct net_device *dev)
1355{ 1350{
1356 long ioaddr = dev->base_addr + PhyCtrl; 1351 struct netdev_private *np = netdev_priv(dev);
1352 void __iomem *ioaddr = np->ioaddr;
1357 u8 data; 1353 u8 data;
1358 1354
1359 data = (readb (ioaddr) & 0xf8) | MII_READ; 1355 data = (dr8(PhyCtrl) & 0xf8) | MII_READ;
1360 writeb (data, ioaddr); 1356 dw8(PhyCtrl, data);
1361 mii_delay (); 1357 mii_delay ();
1362 writeb (data | MII_CLK, ioaddr); 1358 dw8(PhyCtrl, data | MII_CLK);
1363 mii_delay (); 1359 mii_delay ();
1364 return ((readb (ioaddr) >> 1) & 1); 1360 return (dr8(PhyCtrl) >> 1) & 1;
1365} 1361}
1366 1362
1367static void 1363static void
1368mii_send_bits (struct net_device *dev, u32 data, int len) 1364mii_send_bits (struct net_device *dev, u32 data, int len)
1369{ 1365{
1370 int i; 1366 int i;
1367
1371 for (i = len - 1; i >= 0; i--) { 1368 for (i = len - 1; i >= 0; i--) {
1372 mii_sendbit (dev, data & (1 << i)); 1369 mii_sendbit (dev, data & (1 << i));
1373 } 1370 }
@@ -1721,28 +1718,29 @@ mii_set_media_pcs (struct net_device *dev)
1721static int 1718static int
1722rio_close (struct net_device *dev) 1719rio_close (struct net_device *dev)
1723{ 1720{
1724 long ioaddr = dev->base_addr;
1725 struct netdev_private *np = netdev_priv(dev); 1721 struct netdev_private *np = netdev_priv(dev);
1722 void __iomem *ioaddr = np->ioaddr;
1723
1724 struct pci_dev *pdev = np->pdev;
1726 struct sk_buff *skb; 1725 struct sk_buff *skb;
1727 int i; 1726 int i;
1728 1727
1729 netif_stop_queue (dev); 1728 netif_stop_queue (dev);
1730 1729
1731 /* Disable interrupts */ 1730 /* Disable interrupts */
1732 writew (0, ioaddr + IntEnable); 1731 dw16(IntEnable, 0);
1733 1732
1734 /* Stop Tx and Rx logics */ 1733 /* Stop Tx and Rx logics */
1735 writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl); 1734 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable);
1736 1735
1737 free_irq (dev->irq, dev); 1736 free_irq(pdev->irq, dev);
1738 del_timer_sync (&np->timer); 1737 del_timer_sync (&np->timer);
1739 1738
1740 /* Free all the skbuffs in the queue. */ 1739 /* Free all the skbuffs in the queue. */
1741 for (i = 0; i < RX_RING_SIZE; i++) { 1740 for (i = 0; i < RX_RING_SIZE; i++) {
1742 skb = np->rx_skbuff[i]; 1741 skb = np->rx_skbuff[i];
1743 if (skb) { 1742 if (skb) {
1744 pci_unmap_single(np->pdev, 1743 pci_unmap_single(pdev, desc_to_dma(&np->rx_ring[i]),
1745 desc_to_dma(&np->rx_ring[i]),
1746 skb->len, PCI_DMA_FROMDEVICE); 1744 skb->len, PCI_DMA_FROMDEVICE);
1747 dev_kfree_skb (skb); 1745 dev_kfree_skb (skb);
1748 np->rx_skbuff[i] = NULL; 1746 np->rx_skbuff[i] = NULL;
@@ -1753,8 +1751,7 @@ rio_close (struct net_device *dev)
1753 for (i = 0; i < TX_RING_SIZE; i++) { 1751 for (i = 0; i < TX_RING_SIZE; i++) {
1754 skb = np->tx_skbuff[i]; 1752 skb = np->tx_skbuff[i];
1755 if (skb) { 1753 if (skb) {
1756 pci_unmap_single(np->pdev, 1754 pci_unmap_single(pdev, desc_to_dma(&np->tx_ring[i]),
1757 desc_to_dma(&np->tx_ring[i]),
1758 skb->len, PCI_DMA_TODEVICE); 1755 skb->len, PCI_DMA_TODEVICE);
1759 dev_kfree_skb (skb); 1756 dev_kfree_skb (skb);
1760 np->tx_skbuff[i] = NULL; 1757 np->tx_skbuff[i] = NULL;
@@ -1778,8 +1775,9 @@ rio_remove1 (struct pci_dev *pdev)
1778 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, 1775 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1779 np->tx_ring_dma); 1776 np->tx_ring_dma);
1780#ifdef MEM_MAPPING 1777#ifdef MEM_MAPPING
1781 iounmap ((char *) (dev->base_addr)); 1778 pci_iounmap(pdev, np->ioaddr);
1782#endif 1779#endif
1780 pci_iounmap(pdev, np->eeprom_addr);
1783 free_netdev (dev); 1781 free_netdev (dev);
1784 pci_release_regions (pdev); 1782 pci_release_regions (pdev);
1785 pci_disable_device (pdev); 1783 pci_disable_device (pdev);