e1000e: disable gig speed when in S0->Sx transition

Most of this workaround is necessary for all ICHx/PCH parts so one of
the two MAC-type checks can be removed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 5 insertions, 14 deletions

diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index c7292a1a81ef..6b5e108bb51f 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -3457,21 +3457,12 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
 {
         u32 phy_ctrl;
 
-        switch (hw->mac.type) {
-        case e1000_ich8lan:
-        case e1000_ich9lan:
-        case e1000_ich10lan:
-        case e1000_pchlan:
-                phy_ctrl = er32(PHY_CTRL);
-                phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
-                            E1000_PHY_CTRL_GBE_DISABLE;
-                ew32(PHY_CTRL, phy_ctrl);
+        phy_ctrl = er32(PHY_CTRL);
+        phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | E1000_PHY_CTRL_GBE_DISABLE;
+        ew32(PHY_CTRL, phy_ctrl);
 
-                if (hw->mac.type == e1000_pchlan)
-                        e1000_phy_hw_reset_ich8lan(hw);
-        default:
-                break;
-        }
+        if (hw->mac.type >= e1000_pchlan)
+                e1000_phy_hw_reset_ich8lan(hw);
 }
 
 /**