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authorLee Jones <lee.jones@linaro.org>2014-03-20 05:20:38 -0400
committerBrian Norris <computersforpeace@gmail.com>2014-03-20 07:17:15 -0400
commit1bd512b562dde92dae90036c4e6fd91f3870e44f (patch)
treef5efc1ad5d42d6b9c5af6752526339365c3febac /drivers/mtd/devices
parent030e82dc6386f23bcd05876b452d2618dd8046b4 (diff)
mtd: st_spi_fsm: Add support for JEDEC ID extraction
Once we start supporting devices it will be handy go detect them dynamically. This will be done using the chip's unique JEDEC ID. This patch allows us to extract a device's JEDEC ID using the a predefined FSM register write sequence. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/devices')
-rw-r--r--drivers/mtd/devices/st_spi_fsm.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c
index 73e0f2731bcb..9fc0b1911fe1 100644
--- a/drivers/mtd/devices/st_spi_fsm.c
+++ b/drivers/mtd/devices/st_spi_fsm.c
@@ -219,6 +219,22 @@ struct stfsm_seq {
219 uint32_t seq_cfg; 219 uint32_t seq_cfg;
220} __packed __aligned(4); 220} __packed __aligned(4);
221 221
222static struct stfsm_seq stfsm_seq_read_jedec = {
223 .data_size = TRANSFER_SIZE(8),
224 .seq_opc[0] = (SEQ_OPC_PADS_1 |
225 SEQ_OPC_CYCLES(8) |
226 SEQ_OPC_OPCODE(FLASH_CMD_RDID)),
227 .seq = {
228 STFSM_INST_CMD1,
229 STFSM_INST_DATA_READ,
230 STFSM_INST_STOP,
231 },
232 .seq_cfg = (SEQ_CFG_PADS_1 |
233 SEQ_CFG_READNOTWRITE |
234 SEQ_CFG_CSDEASSERT |
235 SEQ_CFG_STARTSEQ),
236};
237
222static inline int stfsm_is_idle(struct stfsm *fsm) 238static inline int stfsm_is_idle(struct stfsm *fsm)
223{ 239{
224 return readl(fsm->base + SPI_FAST_SEQ_STA) & 0x10; 240 return readl(fsm->base + SPI_FAST_SEQ_STA) & 0x10;
@@ -307,6 +323,42 @@ static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf,
307 } 323 }
308} 324}
309 325
326static void stfsm_read_jedec(struct stfsm *fsm, uint8_t *const jedec)
327{
328 const struct stfsm_seq *seq = &stfsm_seq_read_jedec;
329 uint32_t tmp[2];
330
331 stfsm_load_seq(fsm, seq);
332
333 stfsm_read_fifo(fsm, tmp, 8);
334
335 memcpy(jedec, tmp, 5);
336
337 stfsm_wait_seq(fsm);
338}
339
340static struct flash_info *stfsm_jedec_probe(struct stfsm *fsm)
341{
342 u16 ext_jedec;
343 u32 jedec;
344 u8 id[5];
345
346 stfsm_read_jedec(fsm, id);
347
348 jedec = id[0] << 16 | id[1] << 8 | id[2];
349 /*
350 * JEDEC also defines an optional "extended device information"
351 * string for after vendor-specific data, after the three bytes
352 * we use here. Supporting some chips might require using it.
353 */
354 ext_jedec = id[3] << 8 | id[4];
355
356 dev_dbg(fsm->dev, "JEDEC = 0x%08x [%02x %02x %02x %02x %02x]\n",
357 jedec, id[0], id[1], id[2], id[3], id[4]);
358
359 return NULL;
360}
361
310static int stfsm_set_mode(struct stfsm *fsm, uint32_t mode) 362static int stfsm_set_mode(struct stfsm *fsm, uint32_t mode)
311{ 363{
312 int ret, timeout = 10; 364 int ret, timeout = 10;
@@ -436,6 +488,9 @@ static int stfsm_probe(struct platform_device *pdev)
436 return ret; 488 return ret;
437 } 489 }
438 490
491 /* Detect SPI FLASH device */
492 stfsm_jedec_probe(fsm);
493
439 fsm->mtd.dev.parent = &pdev->dev; 494 fsm->mtd.dev.parent = &pdev->dev;
440 fsm->mtd.type = MTD_NORFLASH; 495 fsm->mtd.type = MTD_NORFLASH;
441 fsm->mtd.writesize = 4; 496 fsm->mtd.writesize = 4;