aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mmc/host/sdhci-pxav3.c
diff options
context:
space:
mode:
authorNadav Haklai <nadavh@marvell.com>2015-10-05 21:22:36 -0400
committerUlf Hansson <ulf.hansson@linaro.org>2015-10-08 13:24:23 -0400
commitfa7964147da57b2d40c2db2b6ed98fb7dc934bff (patch)
treebe8577cc76ab93d23811e317f8ad74ec04ea5867 /drivers/mmc/host/sdhci-pxav3.c
parent5de76bfcb1e5ac66c57b99e8e193dacac7416f0e (diff)
mmc: sdhci-pxav3: disable clock inversion for HS MMC cards
According to 'FE-2946959' erratum the clock inversion option is needed to support slow frequencies when the card input hold time requirement is high. This setting is not required for high speed MMC and might cause timing violation. Signed-off-by: Nadav Haklai <nadavh@marvell.com> Cc: <stable@vger.kernel.org> # v4.2 Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pxav3.c')
-rw-r--r--drivers/mmc/host/sdhci-pxav3.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 976cddd6d157..89a9e49e2ea8 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -291,6 +291,9 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
291 uhs == MMC_TIMING_UHS_DDR50) { 291 uhs == MMC_TIMING_UHS_DDR50) {
292 reg_val &= ~SDIO3_CONF_CLK_INV; 292 reg_val &= ~SDIO3_CONF_CLK_INV;
293 reg_val |= SDIO3_CONF_SD_FB_CLK; 293 reg_val |= SDIO3_CONF_SD_FB_CLK;
294 } else if (uhs == MMC_TIMING_MMC_HS) {
295 reg_val &= ~SDIO3_CONF_CLK_INV;
296 reg_val &= ~SDIO3_CONF_SD_FB_CLK;
294 } else { 297 } else {
295 reg_val |= SDIO3_CONF_CLK_INV; 298 reg_val |= SDIO3_CONF_CLK_INV;
296 reg_val &= ~SDIO3_CONF_SD_FB_CLK; 299 reg_val &= ~SDIO3_CONF_SD_FB_CLK;