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authorVaibhav Jain <vaibhav@linux.vnet.ibm.com>2017-10-11 08:30:20 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2017-11-06 00:48:17 -0500
commitcbb55eeb49b116bb3880137661ad8ce1ed45d672 (patch)
treeb32d3ed818fe08fd642d02b9df22616ee87a7af5 /drivers/misc
parentac0761ebcb08830d8f64b9181f6736b1a00bf746 (diff)
cxl: Rework the implementation of cxl_stop_trace_psl9()
Presently the PSL9 specific cxl_stop_trace_psl9() only stops the RX0 traces on the CXL adapter when a PSL error irq is triggered. The patch updates the function to stop all the traces arrays and move them to the FIN state. The implementation issues the mmio to TRACECFG register to stop the trace array iff it already not in FIN state. This prevents the issue of trace data being reset in case of multiple stop mmio issued for a single trace array. Also the patch does some refactoring of existing cxl_stop_trace_psl9() and cxl_stop_trace_psl8() functions by moving them to 'pci.c' from 'debugfs.c' file and marking them as static. Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/cxl/cxl.h14
-rw-r--r--drivers/misc/cxl/debugfs.c22
-rw-r--r--drivers/misc/cxl/pci.c38
3 files changed, 42 insertions, 32 deletions
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index fc98f6ad1616..e46a4062904a 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -115,6 +115,7 @@ static const cxl_p1_reg_t CXL_PSL9_TRACECFG = {0x0368};
115static const cxl_p1_reg_t CXL_PSL9_APCDEDALLOC = {0x0378}; 115static const cxl_p1_reg_t CXL_PSL9_APCDEDALLOC = {0x0378};
116static const cxl_p1_reg_t CXL_PSL9_APCDEDTYPE = {0x0380}; 116static const cxl_p1_reg_t CXL_PSL9_APCDEDTYPE = {0x0380};
117static const cxl_p1_reg_t CXL_PSL9_TNR_ADDR = {0x0388}; 117static const cxl_p1_reg_t CXL_PSL9_TNR_ADDR = {0x0388};
118static const cxl_p1_reg_t CXL_PSL9_CTCCFG = {0x0390};
118static const cxl_p1_reg_t CXL_PSL9_GP_CT = {0x0398}; 119static const cxl_p1_reg_t CXL_PSL9_GP_CT = {0x0398};
119static const cxl_p1_reg_t CXL_XSL9_IERAT = {0x0588}; 120static const cxl_p1_reg_t CXL_XSL9_IERAT = {0x0588};
120static const cxl_p1_reg_t CXL_XSL9_ILPP = {0x0590}; 121static const cxl_p1_reg_t CXL_XSL9_ILPP = {0x0590};
@@ -417,6 +418,9 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
417#define CXL_CARD_MINOR(adapter) (adapter->adapter_num * CXL_DEV_MINORS) 418#define CXL_CARD_MINOR(adapter) (adapter->adapter_num * CXL_DEV_MINORS)
418#define CXL_DEVT_ADAPTER(dev) (MINOR(dev) / CXL_DEV_MINORS) 419#define CXL_DEVT_ADAPTER(dev) (MINOR(dev) / CXL_DEV_MINORS)
419 420
421#define CXL_PSL9_TRACEID_MAX 0xAU
422#define CXL_PSL9_TRACESTATE_FIN 0x3U
423
420enum cxl_context_status { 424enum cxl_context_status {
421 CLOSED, 425 CLOSED,
422 OPENED, 426 OPENED,
@@ -941,8 +945,6 @@ int cxl_debugfs_adapter_add(struct cxl *adapter);
941void cxl_debugfs_adapter_remove(struct cxl *adapter); 945void cxl_debugfs_adapter_remove(struct cxl *adapter);
942int cxl_debugfs_afu_add(struct cxl_afu *afu); 946int cxl_debugfs_afu_add(struct cxl_afu *afu);
943void cxl_debugfs_afu_remove(struct cxl_afu *afu); 947void cxl_debugfs_afu_remove(struct cxl_afu *afu);
944void cxl_stop_trace_psl9(struct cxl *cxl);
945void cxl_stop_trace_psl8(struct cxl *cxl);
946void cxl_debugfs_add_adapter_regs_psl9(struct cxl *adapter, struct dentry *dir); 948void cxl_debugfs_add_adapter_regs_psl9(struct cxl *adapter, struct dentry *dir);
947void cxl_debugfs_add_adapter_regs_psl8(struct cxl *adapter, struct dentry *dir); 949void cxl_debugfs_add_adapter_regs_psl8(struct cxl *adapter, struct dentry *dir);
948void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir); 950void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir);
@@ -978,14 +980,6 @@ static inline void cxl_debugfs_afu_remove(struct cxl_afu *afu)
978{ 980{
979} 981}
980 982
981static inline void cxl_stop_trace_psl9(struct cxl *cxl)
982{
983}
984
985static inline void cxl_stop_trace_psl8(struct cxl *cxl)
986{
987}
988
989static inline void cxl_debugfs_add_adapter_regs_psl9(struct cxl *adapter, 983static inline void cxl_debugfs_add_adapter_regs_psl9(struct cxl *adapter,
990 struct dentry *dir) 984 struct dentry *dir)
991{ 985{
diff --git a/drivers/misc/cxl/debugfs.c b/drivers/misc/cxl/debugfs.c
index dbb9b58077f6..1643850d2302 100644
--- a/drivers/misc/cxl/debugfs.c
+++ b/drivers/misc/cxl/debugfs.c
@@ -15,28 +15,6 @@
15 15
16static struct dentry *cxl_debugfs; 16static struct dentry *cxl_debugfs;
17 17
18void cxl_stop_trace_psl9(struct cxl *adapter)
19{
20 /* Stop the trace */
21 cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x4480000000000000ULL);
22}
23
24void cxl_stop_trace_psl8(struct cxl *adapter)
25{
26 int slice;
27
28 /* Stop the trace */
29 cxl_p1_write(adapter, CXL_PSL_TRACE, 0x8000000000000017LL);
30
31 /* Stop the slice traces */
32 spin_lock(&adapter->afu_list_lock);
33 for (slice = 0; slice < adapter->slices; slice++) {
34 if (adapter->afu[slice])
35 cxl_p1n_write(adapter->afu[slice], CXL_PSL_SLICE_TRACE, 0x8000000000000000LL);
36 }
37 spin_unlock(&adapter->afu_list_lock);
38}
39
40/* Helpers to export CXL mmaped IO registers via debugfs */ 18/* Helpers to export CXL mmaped IO registers via debugfs */
41static int debugfs_io_u64_get(void *data, u64 *val) 19static int debugfs_io_u64_get(void *data, u64 *val)
42{ 20{
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index d185b47eb536..bb7fd3f4edab 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1747,6 +1747,44 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
1747 pci_disable_device(pdev); 1747 pci_disable_device(pdev);
1748} 1748}
1749 1749
1750static void cxl_stop_trace_psl9(struct cxl *adapter)
1751{
1752 int traceid;
1753 u64 trace_state, trace_mask;
1754 struct pci_dev *dev = to_pci_dev(adapter->dev.parent);
1755
1756 /* read each tracearray state and issue mmio to stop them is needed */
1757 for (traceid = 0; traceid <= CXL_PSL9_TRACEID_MAX; ++traceid) {
1758 trace_state = cxl_p1_read(adapter, CXL_PSL9_CTCCFG);
1759 trace_mask = (0x3ULL << (62 - traceid * 2));
1760 trace_state = (trace_state & trace_mask) >> (62 - traceid * 2);
1761 dev_dbg(&dev->dev, "cxl: Traceid-%d trace_state=0x%0llX\n",
1762 traceid, trace_state);
1763
1764 /* issue mmio if the trace array isn't in FIN state */
1765 if (trace_state != CXL_PSL9_TRACESTATE_FIN)
1766 cxl_p1_write(adapter, CXL_PSL9_TRACECFG,
1767 0x8400000000000000ULL | traceid);
1768 }
1769}
1770
1771static void cxl_stop_trace_psl8(struct cxl *adapter)
1772{
1773 int slice;
1774
1775 /* Stop the trace */
1776 cxl_p1_write(adapter, CXL_PSL_TRACE, 0x8000000000000017LL);
1777
1778 /* Stop the slice traces */
1779 spin_lock(&adapter->afu_list_lock);
1780 for (slice = 0; slice < adapter->slices; slice++) {
1781 if (adapter->afu[slice])
1782 cxl_p1n_write(adapter->afu[slice], CXL_PSL_SLICE_TRACE,
1783 0x8000000000000000LL);
1784 }
1785 spin_unlock(&adapter->afu_list_lock);
1786}
1787
1750static const struct cxl_service_layer_ops psl9_ops = { 1788static const struct cxl_service_layer_ops psl9_ops = {
1751 .adapter_regs_init = init_implementation_adapter_regs_psl9, 1789 .adapter_regs_init = init_implementation_adapter_regs_psl9,
1752 .invalidate_all = cxl_invalidate_all_psl9, 1790 .invalidate_all = cxl_invalidate_all_psl9,